wakeup_cp | min_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
274 |
1 |
|
|
T13 |
14 |
|
T15 |
1 |
|
T24 |
14 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
214 |
1 |
|
|
T105 |
1 |
|
T164 |
1 |
|
T37 |
1 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
257 |
1 |
|
|
T98 |
1 |
|
T102 |
7 |
|
T209 |
11 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
193 |
1 |
|
|
T100 |
10 |
|
T133 |
15 |
|
T204 |
12 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
155 |
1 |
|
|
T14 |
8 |
|
T94 |
13 |
|
T101 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
228 |
1 |
|
|
T12 |
11 |
|
T24 |
3 |
|
T164 |
1 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
1369 |
1 |
|
|
T16 |
3 |
|
T203 |
3 |
|
T111 |
2 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
190 |
1 |
|
|
T104 |
2 |
|
T93 |
1 |
|
T239 |
1 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
170 |
1 |
|
|
T113 |
1 |
|
T216 |
16 |
|
T98 |
1 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
282 |
1 |
|
|
T12 |
29 |
|
T105 |
19 |
|
T106 |
1 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
143 |
1 |
|
|
T106 |
9 |
|
T100 |
13 |
|
T202 |
1 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
187 |
1 |
|
|
T14 |
11 |
|
T22 |
1 |
|
T95 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
183 |
1 |
|
|
T209 |
11 |
|
T217 |
9 |
|
T240 |
3 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
214 |
1 |
|
|
T17 |
12 |
|
T92 |
13 |
|
T43 |
5 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
133 |
1 |
|
|
T13 |
13 |
|
T21 |
1 |
|
T23 |
1 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
187 |
1 |
|
|
T13 |
17 |
|
T17 |
19 |
|
T100 |
3 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
230 |
1 |
|
|
T104 |
1 |
|
T35 |
9 |
|
T217 |
11 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
314 |
1 |
|
|
T199 |
1 |
|
T36 |
12 |
|
T209 |
3 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
76 |
1 |
|
|
T101 |
1 |
|
T108 |
10 |
|
T241 |
4 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
58 |
1 |
|
|
T133 |
12 |
|
T44 |
2 |
|
T118 |
12 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
16735 |
1 |
|
|
T6 |
2 |
|
T26 |
2 |
|
T31 |
1 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_OUT] |
61 |
1 |
|
|
T19 |
1 |
|
T106 |
15 |
|
T205 |
3 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
120 |
1 |
|
|
T13 |
12 |
|
T149 |
4 |
|
T128 |
9 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
128 |
1 |
|
|
T164 |
10 |
|
T87 |
3 |
|
T181 |
13 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
152 |
1 |
|
|
T209 |
11 |
|
T217 |
10 |
|
T200 |
6 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
147 |
1 |
|
|
T133 |
11 |
|
T204 |
2 |
|
T232 |
10 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
111 |
1 |
|
|
T14 |
2 |
|
T94 |
12 |
|
T245 |
1 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
188 |
1 |
|
|
T12 |
6 |
|
T24 |
11 |
|
T164 |
10 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
921 |
1 |
|
|
T16 |
9 |
|
T111 |
12 |
|
T246 |
11 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
184 |
1 |
|
|
T104 |
6 |
|
T36 |
10 |
|
T98 |
4 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
100 |
1 |
|
|
T98 |
1 |
|
T126 |
10 |
|
T180 |
4 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
203 |
1 |
|
|
T12 |
28 |
|
T106 |
2 |
|
T115 |
13 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
143 |
1 |
|
|
T106 |
9 |
|
T202 |
7 |
|
T150 |
9 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
159 |
1 |
|
|
T14 |
12 |
|
T114 |
9 |
|
T204 |
15 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
131 |
1 |
|
|
T209 |
12 |
|
T217 |
7 |
|
T236 |
11 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
108 |
1 |
|
|
T17 |
9 |
|
T92 |
9 |
|
T43 |
5 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
88 |
1 |
|
|
T13 |
11 |
|
T164 |
1 |
|
T199 |
4 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
160 |
1 |
|
|
T13 |
11 |
|
T17 |
18 |
|
T53 |
8 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
170 |
1 |
|
|
T104 |
8 |
|
T35 |
2 |
|
T231 |
14 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
269 |
1 |
|
|
T199 |
12 |
|
T36 |
5 |
|
T209 |
11 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
44 |
1 |
|
|
T108 |
4 |
|
T241 |
3 |
|
T242 |
13 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
30 |
1 |
|
|
T133 |
8 |
|
T247 |
6 |
|
T221 |
1 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
48 |
1 |
|
|
T236 |
15 |
|
T248 |
6 |
|
T222 |
13 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_OUT] |
55 |
1 |
|
|
T106 |
13 |
|
T57 |
13 |
|
T129 |
11 |
wakeup_cp | max_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
82 |
1 |
|
|
T101 |
1 |
|
T108 |
10 |
|
T243 |
8 |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_OUT] |
60 |
1 |
|
|
T133 |
12 |
|
T44 |
2 |
|
T129 |
1 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
1 |
1 |
|
|
T238 |
1 |
|
- |
- |
|
- |
- |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
234 |
1 |
|
|
T13 |
14 |
|
T22 |
1 |
|
T24 |
14 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
250 |
1 |
|
|
T19 |
1 |
|
T105 |
1 |
|
T106 |
15 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
304 |
1 |
|
|
T15 |
1 |
|
T209 |
11 |
|
T217 |
11 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
209 |
1 |
|
|
T12 |
11 |
|
T100 |
10 |
|
T164 |
1 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
141 |
1 |
|
|
T14 |
8 |
|
T94 |
13 |
|
T98 |
1 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
159 |
1 |
|
|
T164 |
1 |
|
T116 |
11 |
|
T208 |
3 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
126 |
1 |
|
|
T113 |
1 |
|
T96 |
1 |
|
T114 |
11 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
198 |
1 |
|
|
T24 |
3 |
|
T104 |
2 |
|
T36 |
12 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
1428 |
1 |
|
|
T16 |
3 |
|
T203 |
3 |
|
T111 |
2 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
295 |
1 |
|
|
T93 |
1 |
|
T105 |
19 |
|
T106 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
128 |
1 |
|
|
T106 |
9 |
|
T100 |
13 |
|
T95 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
217 |
1 |
|
|
T12 |
29 |
|
T14 |
11 |
|
T95 |
1 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
162 |
1 |
|
|
T202 |
1 |
|
T86 |
6 |
|
T217 |
9 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
205 |
1 |
|
|
T17 |
12 |
|
T22 |
1 |
|
T92 |
13 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
168 |
1 |
|
|
T13 |
13 |
|
T23 |
1 |
|
T105 |
5 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
142 |
1 |
|
|
T13 |
17 |
|
T17 |
13 |
|
T100 |
3 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
260 |
1 |
|
|
T21 |
1 |
|
T104 |
1 |
|
T35 |
9 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
393 |
1 |
|
|
T17 |
6 |
|
T199 |
1 |
|
T36 |
12 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
16691 |
1 |
|
|
T6 |
2 |
|
T26 |
2 |
|
T31 |
1 |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
47 |
1 |
|
|
T108 |
4 |
|
T243 |
3 |
|
T244 |
6 |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_OUT] |
61 |
1 |
|
|
T133 |
8 |
|
T129 |
11 |
|
T249 |
11 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
110 |
1 |
|
|
T13 |
12 |
|
T149 |
4 |
|
T236 |
15 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
157 |
1 |
|
|
T106 |
13 |
|
T87 |
3 |
|
T232 |
10 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
201 |
1 |
|
|
T209 |
11 |
|
T217 |
10 |
|
T200 |
6 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
139 |
1 |
|
|
T12 |
6 |
|
T164 |
10 |
|
T181 |
13 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
102 |
1 |
|
|
T14 |
2 |
|
T94 |
12 |
|
T245 |
1 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
146 |
1 |
|
|
T164 |
10 |
|
T116 |
10 |
|
T208 |
1 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
112 |
1 |
|
|
T114 |
11 |
|
T120 |
12 |
|
T235 |
8 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
206 |
1 |
|
|
T24 |
11 |
|
T104 |
6 |
|
T36 |
10 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
896 |
1 |
|
|
T16 |
9 |
|
T111 |
12 |
|
T246 |
11 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
222 |
1 |
|
|
T106 |
2 |
|
T115 |
13 |
|
T228 |
6 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
129 |
1 |
|
|
T106 |
9 |
|
T150 |
9 |
|
T117 |
13 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
181 |
1 |
|
|
T12 |
28 |
|
T14 |
12 |
|
T114 |
9 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
128 |
1 |
|
|
T202 |
7 |
|
T217 |
7 |
|
T236 |
11 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
82 |
1 |
|
|
T17 |
9 |
|
T92 |
9 |
|
T43 |
5 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
106 |
1 |
|
|
T13 |
11 |
|
T164 |
1 |
|
T199 |
4 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
110 |
1 |
|
|
T13 |
11 |
|
T17 |
12 |
|
T114 |
5 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
197 |
1 |
|
|
T104 |
8 |
|
T35 |
2 |
|
T231 |
14 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
327 |
1 |
|
|
T17 |
6 |
|
T199 |
12 |
|
T36 |
5 |