interrupt_cp | min_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
173 |
1 |
|
|
T16 |
1 |
|
T208 |
1 |
|
T242 |
12 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
139 |
1 |
|
|
T2 |
1 |
|
T29 |
13 |
|
T127 |
1 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
138 |
1 |
|
|
T3 |
8 |
|
T168 |
3 |
|
T139 |
13 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
1605 |
1 |
|
|
T6 |
3 |
|
T7 |
2 |
|
T10 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
227 |
1 |
|
|
T7 |
2 |
|
T8 |
21 |
|
T134 |
13 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
105 |
1 |
|
|
T33 |
7 |
|
T13 |
1 |
|
T41 |
11 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
167 |
1 |
|
|
T8 |
16 |
|
T27 |
1 |
|
T271 |
1 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
231 |
1 |
|
|
T126 |
1 |
|
T137 |
1 |
|
T15 |
5 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
221 |
1 |
|
|
T7 |
3 |
|
T127 |
17 |
|
T128 |
1 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
226 |
1 |
|
|
T40 |
10 |
|
T14 |
8 |
|
T128 |
1 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
174 |
1 |
|
|
T101 |
1 |
|
T30 |
1 |
|
T134 |
10 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
238 |
1 |
|
|
T125 |
15 |
|
T126 |
1 |
|
T34 |
3 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
279 |
1 |
|
|
T5 |
12 |
|
T33 |
1 |
|
T126 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
135 |
1 |
|
|
T168 |
26 |
|
T176 |
1 |
|
T177 |
9 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
135 |
1 |
|
|
T11 |
3 |
|
T23 |
7 |
|
T159 |
1 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
211 |
1 |
|
|
T9 |
12 |
|
T125 |
1 |
|
T128 |
1 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
281 |
1 |
|
|
T3 |
1 |
|
T33 |
2 |
|
T125 |
13 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
255 |
1 |
|
|
T9 |
14 |
|
T13 |
2 |
|
T135 |
25 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
22 |
1 |
|
|
T135 |
12 |
|
T287 |
10 |
|
- |
- |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
34 |
1 |
|
|
T159 |
1 |
|
T296 |
1 |
|
T155 |
12 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
17396 |
1 |
|
|
T1 |
124 |
|
T2 |
33 |
|
T3 |
20 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_OUT] |
139 |
1 |
|
|
T30 |
1 |
|
T178 |
1 |
|
T130 |
13 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
178 |
1 |
|
|
T16 |
10 |
|
T242 |
12 |
|
T250 |
9 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
119 |
1 |
|
|
T29 |
22 |
|
T127 |
1 |
|
T272 |
6 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
131 |
1 |
|
|
T3 |
6 |
|
T168 |
11 |
|
T139 |
15 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
1027 |
1 |
|
|
T6 |
22 |
|
T7 |
1 |
|
T10 |
8 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
141 |
1 |
|
|
T7 |
1 |
|
T134 |
12 |
|
T137 |
10 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
74 |
1 |
|
|
T33 |
1 |
|
T13 |
1 |
|
T41 |
10 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
109 |
1 |
|
|
T271 |
4 |
|
T16 |
4 |
|
T158 |
2 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
170 |
1 |
|
|
T137 |
9 |
|
T15 |
1 |
|
T269 |
11 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
160 |
1 |
|
|
T7 |
5 |
|
T127 |
11 |
|
T139 |
6 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
175 |
1 |
|
|
T40 |
10 |
|
T14 |
1 |
|
T198 |
2 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
111 |
1 |
|
|
T30 |
5 |
|
T134 |
9 |
|
T129 |
10 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
155 |
1 |
|
|
T125 |
12 |
|
T34 |
1 |
|
T17 |
1 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
230 |
1 |
|
|
T5 |
10 |
|
T33 |
12 |
|
T178 |
10 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
159 |
1 |
|
|
T168 |
32 |
|
T176 |
11 |
|
T177 |
11 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
76 |
1 |
|
|
T159 |
7 |
|
T147 |
9 |
|
T297 |
5 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
173 |
1 |
|
|
T9 |
11 |
|
T279 |
11 |
|
T91 |
1 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
220 |
1 |
|
|
T3 |
2 |
|
T33 |
1 |
|
T125 |
11 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
239 |
1 |
|
|
T9 |
4 |
|
T13 |
1 |
|
T150 |
12 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
12 |
1 |
|
|
T287 |
12 |
|
- |
- |
|
- |
- |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
56 |
1 |
|
|
T159 |
10 |
|
T296 |
10 |
|
T155 |
17 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
176 |
1 |
|
|
T2 |
1 |
|
T33 |
2 |
|
T36 |
1 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_OUT] |
107 |
1 |
|
|
T30 |
2 |
|
T178 |
5 |
|
T188 |
13 |
interrupt_cp | max_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
79 |
1 |
|
|
T150 |
6 |
|
T276 |
10 |
|
T254 |
13 |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_OUT] |
108 |
1 |
|
|
T9 |
14 |
|
T13 |
2 |
|
T132 |
1 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
2 |
1 |
|
|
T93 |
1 |
|
T183 |
1 |
|
- |
- |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
23 |
1 |
|
|
T178 |
1 |
|
T130 |
13 |
|
T301 |
9 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
164 |
1 |
|
|
T197 |
1 |
|
T208 |
1 |
|
T139 |
1 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
217 |
1 |
|
|
T30 |
1 |
|
T138 |
2 |
|
T272 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
166 |
1 |
|
|
T3 |
8 |
|
T168 |
3 |
|
T16 |
1 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
194 |
1 |
|
|
T2 |
1 |
|
T7 |
2 |
|
T29 |
13 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
125 |
1 |
|
|
T8 |
21 |
|
T134 |
9 |
|
T137 |
1 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
125 |
1 |
|
|
T29 |
16 |
|
T127 |
12 |
|
T146 |
11 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
242 |
1 |
|
|
T7 |
2 |
|
T8 |
16 |
|
T27 |
1 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
213 |
1 |
|
|
T33 |
7 |
|
T13 |
1 |
|
T41 |
11 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
250 |
1 |
|
|
T7 |
3 |
|
T127 |
17 |
|
T128 |
1 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
223 |
1 |
|
|
T40 |
10 |
|
T14 |
8 |
|
T128 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
169 |
1 |
|
|
T101 |
1 |
|
T30 |
1 |
|
T129 |
12 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
233 |
1 |
|
|
T125 |
15 |
|
T126 |
1 |
|
T34 |
3 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
221 |
1 |
|
|
T5 |
12 |
|
T33 |
1 |
|
T134 |
10 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
164 |
1 |
|
|
T168 |
14 |
|
T177 |
9 |
|
T294 |
11 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
182 |
1 |
|
|
T11 |
3 |
|
T23 |
7 |
|
T159 |
1 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
227 |
1 |
|
|
T9 |
12 |
|
T125 |
1 |
|
T168 |
12 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
248 |
1 |
|
|
T3 |
1 |
|
T33 |
2 |
|
T125 |
13 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
1591 |
1 |
|
|
T6 |
3 |
|
T10 |
1 |
|
T37 |
2 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
17365 |
1 |
|
|
T1 |
124 |
|
T2 |
33 |
|
T3 |
20 |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
77 |
1 |
|
|
T150 |
9 |
|
T276 |
15 |
|
T254 |
12 |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_OUT] |
119 |
1 |
|
|
T9 |
4 |
|
T13 |
1 |
|
T327 |
3 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
7 |
1 |
|
|
T183 |
7 |
|
- |
- |
|
- |
- |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
5 |
1 |
|
|
T178 |
5 |
|
- |
- |
|
- |
- |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
187 |
1 |
|
|
T197 |
12 |
|
T139 |
14 |
|
T242 |
12 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
181 |
1 |
|
|
T30 |
2 |
|
T272 |
6 |
|
T198 |
5 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
141 |
1 |
|
|
T3 |
6 |
|
T168 |
11 |
|
T16 |
10 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
191 |
1 |
|
|
T7 |
1 |
|
T29 |
22 |
|
T127 |
1 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
100 |
1 |
|
|
T134 |
8 |
|
T137 |
10 |
|
T210 |
2 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
74 |
1 |
|
|
T29 |
14 |
|
T127 |
2 |
|
T158 |
3 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
158 |
1 |
|
|
T7 |
1 |
|
T134 |
4 |
|
T271 |
4 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
132 |
1 |
|
|
T33 |
1 |
|
T13 |
1 |
|
T41 |
10 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
152 |
1 |
|
|
T7 |
5 |
|
T127 |
11 |
|
T16 |
4 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
178 |
1 |
|
|
T40 |
10 |
|
T14 |
1 |
|
T15 |
1 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
105 |
1 |
|
|
T30 |
5 |
|
T129 |
10 |
|
T210 |
16 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
144 |
1 |
|
|
T125 |
12 |
|
T34 |
1 |
|
T17 |
1 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
168 |
1 |
|
|
T5 |
10 |
|
T33 |
12 |
|
T134 |
9 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
170 |
1 |
|
|
T168 |
16 |
|
T177 |
11 |
|
T294 |
10 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
152 |
1 |
|
|
T159 |
7 |
|
T147 |
9 |
|
T297 |
5 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
201 |
1 |
|
|
T9 |
11 |
|
T168 |
16 |
|
T176 |
11 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
166 |
1 |
|
|
T3 |
2 |
|
T33 |
1 |
|
T125 |
11 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
1059 |
1 |
|
|
T6 |
22 |
|
T10 |
8 |
|
T37 |
21 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
131 |
1 |
|
|
T2 |
1 |
|
T33 |
2 |
|
T36 |
1 |
wakeup_cp | min_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
224 |
1 |
|
|
T16 |
11 |
|
T208 |
1 |
|
T242 |
13 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
153 |
1 |
|
|
T2 |
1 |
|
T29 |
23 |
|
T127 |
2 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
172 |
1 |
|
|
T3 |
7 |
|
T168 |
12 |
|
T139 |
16 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
1380 |
1 |
|
|
T6 |
25 |
|
T7 |
3 |
|
T10 |
9 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
176 |
1 |
|
|
T7 |
2 |
|
T8 |
2 |
|
T134 |
14 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
101 |
1 |
|
|
T33 |
5 |
|
T13 |
2 |
|
T41 |
11 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
143 |
1 |
|
|
T8 |
1 |
|
T27 |
1 |
|
T271 |
5 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
212 |
1 |
|
|
T126 |
1 |
|
T137 |
10 |
|
T15 |
5 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
205 |
1 |
|
|
T7 |
6 |
|
T127 |
12 |
|
T128 |
1 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
218 |
1 |
|
|
T40 |
11 |
|
T14 |
4 |
|
T128 |
1 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
165 |
1 |
|
|
T101 |
1 |
|
T30 |
6 |
|
T134 |
10 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
194 |
1 |
|
|
T125 |
13 |
|
T126 |
1 |
|
T34 |
4 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
281 |
1 |
|
|
T5 |
11 |
|
T33 |
13 |
|
T126 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
196 |
1 |
|
|
T168 |
34 |
|
T176 |
12 |
|
T177 |
12 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
103 |
1 |
|
|
T11 |
1 |
|
T23 |
1 |
|
T159 |
8 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
208 |
1 |
|
|
T9 |
12 |
|
T125 |
1 |
|
T128 |
1 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
273 |
1 |
|
|
T3 |
3 |
|
T33 |
2 |
|
T125 |
12 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
280 |
1 |
|
|
T9 |
5 |
|
T13 |
2 |
|
T135 |
2 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
14 |
1 |
|
|
T135 |
1 |
|
T287 |
13 |
|
- |
- |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
62 |
1 |
|
|
T159 |
11 |
|
T296 |
11 |
|
T155 |
18 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
17551 |
1 |
|
|
T1 |
124 |
|
T2 |
34 |
|
T3 |
20 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_OUT] |
126 |
1 |
|
|
T30 |
3 |
|
T178 |
6 |
|
T130 |
1 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
127 |
1 |
|
|
T242 |
11 |
|
T250 |
11 |
|
T244 |
12 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
105 |
1 |
|
|
T29 |
12 |
|
T198 |
6 |
|
T130 |
14 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
97 |
1 |
|
|
T3 |
7 |
|
T168 |
2 |
|
T139 |
12 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
1252 |
1 |
|
|
T29 |
15 |
|
T103 |
28 |
|
T127 |
11 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
192 |
1 |
|
|
T7 |
1 |
|
T8 |
19 |
|
T134 |
11 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
78 |
1 |
|
|
T33 |
3 |
|
T41 |
10 |
|
T146 |
10 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
133 |
1 |
|
|
T8 |
15 |
|
T16 |
1 |
|
T251 |
7 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
189 |
1 |
|
|
T15 |
1 |
|
T269 |
13 |
|
T251 |
14 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
176 |
1 |
|
|
T7 |
2 |
|
T127 |
16 |
|
T139 |
7 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
183 |
1 |
|
|
T40 |
9 |
|
T14 |
5 |
|
T198 |
9 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
120 |
1 |
|
|
T134 |
9 |
|
T129 |
11 |
|
T210 |
14 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
199 |
1 |
|
|
T125 |
14 |
|
T17 |
3 |
|
T35 |
1 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
228 |
1 |
|
|
T5 |
11 |
|
T243 |
7 |
|
T242 |
11 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
98 |
1 |
|
|
T168 |
24 |
|
T177 |
8 |
|
T299 |
10 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
108 |
1 |
|
|
T11 |
2 |
|
T23 |
6 |
|
T187 |
14 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
176 |
1 |
|
|
T9 |
11 |
|
T279 |
10 |
|
T281 |
9 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
228 |
1 |
|
|
T33 |
1 |
|
T125 |
12 |
|
T146 |
8 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
214 |
1 |
|
|
T9 |
13 |
|
T13 |
1 |
|
T135 |
23 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
20 |
1 |
|
|
T135 |
11 |
|
T287 |
9 |
|
- |
- |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
28 |
1 |
|
|
T155 |
11 |
|
T291 |
8 |
|
T300 |
9 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
21 |
1 |
|
|
T298 |
12 |
|
T262 |
2 |
|
T315 |
3 |
auto[1] |
minimum |
auto[ADC_CTRL_FILTER_COND_OUT] |
120 |
1 |
|
|
T130 |
12 |
|
T188 |
8 |
|
T150 |
10 |
wakeup_cp | max_v_cp | cond_cp | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
90 |
1 |
|
|
T150 |
10 |
|
T276 |
16 |
|
T254 |
13 |
auto[0] |
maximum |
auto[ADC_CTRL_FILTER_COND_OUT] |
135 |
1 |
|
|
T9 |
5 |
|
T13 |
2 |
|
T132 |
1 |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_IN] |
9 |
1 |
|
|
T93 |
1 |
|
T183 |
8 |
|
- |
- |
auto[0] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
8 |
1 |
|
|
T178 |
6 |
|
T130 |
1 |
|
T301 |
1 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
235 |
1 |
|
|
T197 |
13 |
|
T208 |
1 |
|
T139 |
15 |
auto[0] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
219 |
1 |
|
|
T30 |
3 |
|
T138 |
2 |
|
T272 |
7 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
182 |
1 |
|
|
T3 |
7 |
|
T168 |
12 |
|
T16 |
11 |
auto[0] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
236 |
1 |
|
|
T2 |
1 |
|
T7 |
3 |
|
T29 |
23 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
126 |
1 |
|
|
T8 |
2 |
|
T134 |
9 |
|
T137 |
11 |
auto[0] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
103 |
1 |
|
|
T29 |
15 |
|
T127 |
3 |
|
T146 |
1 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
199 |
1 |
|
|
T7 |
2 |
|
T8 |
1 |
|
T27 |
1 |
auto[0] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
168 |
1 |
|
|
T33 |
5 |
|
T13 |
2 |
|
T41 |
11 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
198 |
1 |
|
|
T7 |
6 |
|
T127 |
12 |
|
T128 |
1 |
auto[0] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
229 |
1 |
|
|
T40 |
11 |
|
T14 |
4 |
|
T128 |
1 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
162 |
1 |
|
|
T101 |
1 |
|
T30 |
6 |
|
T129 |
11 |
auto[0] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
182 |
1 |
|
|
T125 |
13 |
|
T126 |
1 |
|
T34 |
4 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
213 |
1 |
|
|
T5 |
11 |
|
T33 |
13 |
|
T134 |
10 |
auto[0] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
208 |
1 |
|
|
T168 |
17 |
|
T177 |
12 |
|
T294 |
11 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
182 |
1 |
|
|
T11 |
1 |
|
T23 |
1 |
|
T159 |
8 |
auto[0] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
238 |
1 |
|
|
T9 |
12 |
|
T125 |
1 |
|
T168 |
17 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
215 |
1 |
|
|
T3 |
3 |
|
T33 |
2 |
|
T125 |
12 |
auto[0] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
1404 |
1 |
|
|
T6 |
25 |
|
T10 |
9 |
|
T37 |
23 |
auto[0] |
minimum |
auto[ADC_CTRL_FILTER_COND_IN] |
17496 |
1 |
|
|
T1 |
124 |
|
T2 |
34 |
|
T3 |
20 |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_IN] |
66 |
1 |
|
|
T150 |
5 |
|
T276 |
9 |
|
T254 |
12 |
auto[1] |
maximum |
auto[ADC_CTRL_FILTER_COND_OUT] |
92 |
1 |
|
|
T9 |
13 |
|
T13 |
1 |
|
T155 |
11 |
auto[1] |
values[0] |
auto[ADC_CTRL_FILTER_COND_OUT] |
20 |
1 |
|
|
T130 |
12 |
|
T301 |
8 |
|
- |
- |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_IN] |
116 |
1 |
|
|
T242 |
11 |
|
T298 |
12 |
|
T250 |
11 |
auto[1] |
values[1] |
auto[ADC_CTRL_FILTER_COND_OUT] |
179 |
1 |
|
|
T198 |
6 |
|
T130 |
14 |
|
T188 |
8 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_IN] |
125 |
1 |
|
|
T3 |
7 |
|
T168 |
2 |
|
T139 |
12 |
auto[1] |
values[2] |
auto[ADC_CTRL_FILTER_COND_OUT] |
149 |
1 |
|
|
T29 |
12 |
|
T187 |
5 |
|
T242 |
4 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_IN] |
99 |
1 |
|
|
T8 |
19 |
|
T134 |
8 |
|
T142 |
15 |
auto[1] |
values[3] |
auto[ADC_CTRL_FILTER_COND_OUT] |
96 |
1 |
|
|
T29 |
15 |
|
T127 |
11 |
|
T146 |
10 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_IN] |
201 |
1 |
|
|
T7 |
1 |
|
T8 |
15 |
|
T134 |
3 |
auto[1] |
values[4] |
auto[ADC_CTRL_FILTER_COND_OUT] |
177 |
1 |
|
|
T33 |
3 |
|
T41 |
10 |
|
T251 |
14 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_IN] |
204 |
1 |
|
|
T7 |
2 |
|
T127 |
16 |
|
T16 |
1 |
auto[1] |
values[5] |
auto[ADC_CTRL_FILTER_COND_OUT] |
172 |
1 |
|
|
T40 |
9 |
|
T14 |
5 |
|
T15 |
1 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_IN] |
112 |
1 |
|
|
T129 |
11 |
|
T210 |
14 |
|
T141 |
9 |
auto[1] |
values[6] |
auto[ADC_CTRL_FILTER_COND_OUT] |
195 |
1 |
|
|
T125 |
14 |
|
T17 |
3 |
|
T35 |
1 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_IN] |
176 |
1 |
|
|
T5 |
11 |
|
T134 |
9 |
|
T243 |
7 |
auto[1] |
values[7] |
auto[ADC_CTRL_FILTER_COND_OUT] |
126 |
1 |
|
|
T168 |
13 |
|
T177 |
8 |
|
T294 |
10 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_IN] |
152 |
1 |
|
|
T11 |
2 |
|
T23 |
6 |
|
T187 |
14 |
auto[1] |
values[8] |
auto[ADC_CTRL_FILTER_COND_OUT] |
190 |
1 |
|
|
T9 |
11 |
|
T168 |
11 |
|
T279 |
10 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_IN] |
199 |
1 |
|
|
T33 |
1 |
|
T125 |
12 |
|
T135 |
11 |
auto[1] |
values[9] |
auto[ADC_CTRL_FILTER_COND_OUT] |
1246 |
1 |
|
|
T103 |
28 |
|
T135 |
23 |
|
T136 |
8 |