ASSERT | PROPERTIES | SEQUENCES | |
Total | 556 | 0 | 0 |
Category 0 | 556 | 0 | 0 |
ASSERT | PROPERTIES | SEQUENCES | |
Total | 556 | 0 | 0 |
Severity 0 | 556 | 0 | 0 |
NUMBER | PERCENT | |
Total Number | 556 | 100.00 |
Uncovered | 13 | 2.34 |
Success | 543 | 97.66 |
Failure | 0 | 0.00 |
Incomplete | 64 | 11.51 |
Without Attempts | 2 | 0.36 |
ASSERTIONS | CATEGORY | SEVERITY | ATTEMPTS | REAL SUCCESSES | FAILURES | INCOMPLETE | SRC |
tb.dut.gen_esc_sev[0].i_esc_sender.PingCheck_A | 0 | 0 | 2147483647 | 0 | 0 | 919 | |
tb.dut.gen_esc_sev[0].i_esc_sender.SigIntCheck2_A | 0 | 0 | 2147483647 | 0 | 0 | 919 | |
tb.dut.gen_esc_sev[1].i_esc_sender.PingCheck_A | 0 | 0 | 2147483647 | 0 | 0 | 919 | |
tb.dut.gen_esc_sev[1].i_esc_sender.SigIntCheck2_A | 0 | 0 | 2147483647 | 0 | 0 | 919 | |
tb.dut.gen_esc_sev[2].i_esc_sender.EscPingCheck_A | 0 | 0 | 2147483647 | 0 | 0 | 0 | |
tb.dut.gen_esc_sev[2].i_esc_sender.PingCheck_A | 0 | 0 | 2147483647 | 0 | 0 | 919 | |
tb.dut.gen_esc_sev[2].i_esc_sender.SigIntCheck2_A | 0 | 0 | 2147483647 | 0 | 0 | 919 | |
tb.dut.gen_esc_sev[3].i_esc_sender.PingCheck_A | 0 | 0 | 2147483647 | 0 | 0 | 919 | |
tb.dut.gen_esc_sev[3].i_esc_sender.SigIntCheck2_A | 0 | 0 | 2147483647 | 0 | 0 | 919 | |
tb.dut.i_ping_timer.i_prim_lfsr.gen_lockup_mechanism_sva.LfsrLockupCheck_A | 0 | 0 | 2147483647 | 0 | 0 | 0 | |
tb.dut.i_ping_timer.i_prim_lfsr.gen_max_len_sva.MaximalLengthCheck1_A | 0 | 0 | 2147483647 | 0 | 0 | 0 | |
uvm_pkg.\uvm_reg_map::do_read .unnamed$$_0.unnamed$$_1 | 0 | 0 | 0 | 0 | 0 | 0 | |
uvm_pkg.\uvm_reg_map::do_write .unnamed$$_0.unnamed$$_1 | 0 | 0 | 0 | 0 | 0 | 0 |
ASSERTIONS | CATEGORY | SEVERITY | ATTEMPTS | REAL SUCCESSES | FAILURES | INCOMPLETE | SRC |
uvm_pkg.\uvm_reg_map::do_read .unnamed$$_0.unnamed$$_1 | 0 | 0 | 0 | 0 | 0 | 0 | |
uvm_pkg.\uvm_reg_map::do_write .unnamed$$_0.unnamed$$_1 | 0 | 0 | 0 | 0 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |