ALERT_HANDLER Simulation Results

Thursday June 18 2020 03:43:07AM UTC

Testplan

Simulator: VCS

Milestone Name Tests Passing Total Pass Rate
V1 sanity alert_handler_sanity 0 50 0.00
V1 csr_hw_reset alert_handler_csr_hw_reset 0 50 0.00
V1 csr_rw alert_handler_csr_rw 0 50 0.00
V1 csr_bit_bash alert_handler_csr_bit_bash 0 50 0.00
V1 csr_aliasing alert_handler_csr_aliasing 0 50 0.00
V1 csr_mem_rw_with_rand_reset alert_handler_csr_mem_rw_with_rand_reset 0 50 0.00
V1 TOTAL 0 300 0.00
V2 esc_accum alert_handler_esc_alert_accum 0 50 0.00
V2 esc_timeout alert_handler_esc_intr_timeout 0 50 0.00
V2 entropy alert_handler_entropy 0 50 0.00
V2 sig_int_fail alert_handler_sig_int_fail 0 50 0.00
V2 ping_rsp_fail alert_handler_ping_rsp_fail 0 50 0.00
V2 clk_skew alert_handler_sanity 0 50 0.00
V2 random_alerts alert_handler_random_alerts 0 50 0.00
V2 random_classes alert_handler_random_classes 0 50 0.00
V2 stress_all alert_handler_stress_all 0 50 0.00
V2 intr_test alert_handler_intr_test 0 50 0.00
V2 enable_reg alert_handler_csr_rw 0 50 0.00
alert_handler_csr_bit_bash 0 50 0.00
alert_handler_csr_aliasing 0 50 0.00
V2 stress_all_with_rand_reset alert_handler_stress_all_with_rand_reset 0 100 0.00
V2 oob_addr_access alert_handler_tl_errors 0 20 0.00
V2 illegal_access alert_handler_tl_errors 0 20 0.00
V2 outstanding_access alert_handler_csr_hw_reset 0 50 0.00
alert_handler_csr_rw 0 50 0.00
alert_handler_csr_aliasing 0 50 0.00
alert_handler_same_csr_outstanding 0 50 0.00
V2 partial_access alert_handler_csr_hw_reset 0 50 0.00
alert_handler_csr_rw 0 50 0.00
alert_handler_csr_aliasing 0 50 0.00
V2 TOTAL 0 1140 0.00
TOTAL 0 1440 0.00

List of Failures

BUILD: default
LOG: $scratch_path/default/build.log
Last 10 lines of the log:

greater than the highest version.
Please contact VCS Customer Support at 1-800-VERILOG for more information.

[Thu Jun 18 05:34:08] Queuing for License......

 HIT CTRL-C to exit

 Failed to obtain license...
CPU time: 1.174 seconds to compile
make: *** [/usr/local/google/home/chencindy/daily_ot/hw/dv/data/sim.mk:31: compile] Error 255

COV_MERGE: alert_handler
LOG: $scratch_path//edascratch/chencindy-opentitan/nightly_openTitan/alert_handler.sim.vcs/cov_merge/cov_merge.log
Last 10 lines of the log:

  could not be found: No such file or directory.
  Please verify all the directories given to the -dir option are valid.


Error-[URG-ND] No source data
  No source data was supplied to URG.
  You may use options like '-dir', '-plan' or '-trend' to specify the source 
  data. Please run 'urg -help' for information.

make: *** [/usr/local/google/home/chencindy/daily_ot/hw/dv/data/sim.mk:113: cov_merge] Error 1

Past Results