Group : dv_base_reg_pkg::dv_base_shadowed_field_cov::shadow_field_errs_cg
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Group Instance : clkmgr_reg_block.io_div2_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_div2_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div2_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_div4_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_div4_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_div4_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.io_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.io_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.main_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.main_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.main_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.usb_meas_ctrl_shadowed.hi_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.hi_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.hi_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0



Group Instance : clkmgr_reg_block.usb_meas_ctrl_shadowed.lo_shadowed_errs_cov
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.lo_shadowed_errs_cov

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance clkmgr_reg_block.usb_meas_ctrl_shadowed.lo_shadowed_errs_cov
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_storage_err 1 0 1 100.00 100 1 1 0
cp_update_err 1 0 1 100.00 100 1 1 0


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 32645 1 T5 32 T32 13 T35 47



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 36 1 T32 2 T66 2 T67 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 32645 1 T5 32 T32 13 T35 47



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 34 1 T32 2 T66 3 T71 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 32679 1 T5 32 T35 46 T44 22



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 35 1 T66 2 T71 2 T69 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 32679 1 T5 32 T35 46 T44 22



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 40 1 T66 2 T71 2 T72 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 32662 1 T5 32 T32 10 T35 44



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 44 1 T32 2 T66 2 T67 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 32662 1 T5 32 T32 10 T35 44



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 36 1 T32 1 T66 2 T67 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 32860 1 T5 32 T32 14 T35 46



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 35 1 T66 1 T67 3 T69 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 32860 1 T5 32 T32 14 T35 46



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 26 1 T32 1 T66 1 T67 2


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 32595 1 T5 32 T32 8 T35 46



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 41 1 T32 1 T66 1 T67 1


Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_storage_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
storage_err 32595 1 T5 32 T32 8 T35 46



Summary for Variable cp_update_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_update_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
update_err 36 1 T67 2 T69 1 T70 1

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