Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.51 99.15 95.79 100.00 100.00 98.81 97.01 98.80


Total test records in report: 1010
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T804 /workspace/coverage/default/24.clkmgr_smoke.1133477571 Feb 29 12:49:13 PM PST 24 Feb 29 12:49:14 PM PST 24 22966363 ps
T805 /workspace/coverage/default/43.clkmgr_alert_test.846170775 Feb 29 12:50:53 PM PST 24 Feb 29 12:50:55 PM PST 24 36657793 ps
T806 /workspace/coverage/default/46.clkmgr_extclk.1943003028 Feb 29 12:50:55 PM PST 24 Feb 29 12:50:57 PM PST 24 29134178 ps
T807 /workspace/coverage/default/19.clkmgr_alert_test.1523213135 Feb 29 12:48:57 PM PST 24 Feb 29 12:48:58 PM PST 24 17130403 ps
T808 /workspace/coverage/default/12.clkmgr_frequency_timeout.4193697788 Feb 29 12:48:59 PM PST 24 Feb 29 12:49:16 PM PST 24 2413117090 ps
T809 /workspace/coverage/default/45.clkmgr_clk_handshake_intersig_mubi.1757564970 Feb 29 12:51:08 PM PST 24 Feb 29 12:51:09 PM PST 24 30786975 ps
T810 /workspace/coverage/default/15.clkmgr_div_intersig_mubi.1775702330 Feb 29 12:49:01 PM PST 24 Feb 29 12:49:02 PM PST 24 20123336 ps
T811 /workspace/coverage/default/24.clkmgr_clk_status.857175457 Feb 29 12:49:05 PM PST 24 Feb 29 12:49:06 PM PST 24 14175880 ps
T812 /workspace/coverage/default/45.clkmgr_stress_all.2475413927 Feb 29 12:51:12 PM PST 24 Feb 29 12:52:01 PM PST 24 8957093629 ps
T813 /workspace/coverage/default/17.clkmgr_peri.2255029972 Feb 29 12:49:14 PM PST 24 Feb 29 12:49:15 PM PST 24 24902193 ps
T814 /workspace/coverage/default/28.clkmgr_trans.2674605515 Feb 29 12:49:48 PM PST 24 Feb 29 12:49:49 PM PST 24 255544305 ps
T815 /workspace/coverage/default/33.clkmgr_extclk.1321917650 Feb 29 12:50:16 PM PST 24 Feb 29 12:50:17 PM PST 24 71556842 ps
T39 /workspace/coverage/default/3.clkmgr_stress_all.2740566261 Feb 29 12:48:33 PM PST 24 Feb 29 12:48:46 PM PST 24 2839812727 ps
T816 /workspace/coverage/default/29.clkmgr_stress_all_with_rand_reset.1972559954 Feb 29 12:49:40 PM PST 24 Feb 29 01:00:29 PM PST 24 36491618084 ps
T43 /workspace/coverage/default/3.clkmgr_sec_cm.2023626283 Feb 29 12:48:46 PM PST 24 Feb 29 12:48:50 PM PST 24 149400330 ps
T817 /workspace/coverage/default/11.clkmgr_clk_status.3179134027 Feb 29 12:49:09 PM PST 24 Feb 29 12:49:10 PM PST 24 15193537 ps
T818 /workspace/coverage/default/17.clkmgr_frequency_timeout.3444416331 Feb 29 12:49:16 PM PST 24 Feb 29 12:49:22 PM PST 24 736597615 ps
T819 /workspace/coverage/default/34.clkmgr_frequency.4125045435 Feb 29 12:50:07 PM PST 24 Feb 29 12:50:10 PM PST 24 202520110 ps
T820 /workspace/coverage/default/4.clkmgr_frequency_timeout.2582792568 Feb 29 12:48:40 PM PST 24 Feb 29 12:48:51 PM PST 24 1574057543 ps
T821 /workspace/coverage/default/8.clkmgr_frequency.3646907997 Feb 29 12:48:56 PM PST 24 Feb 29 12:49:05 PM PST 24 1034682728 ps
T822 /workspace/coverage/default/39.clkmgr_div_intersig_mubi.2909662767 Feb 29 12:50:26 PM PST 24 Feb 29 12:50:27 PM PST 24 27191734 ps
T823 /workspace/coverage/default/13.clkmgr_regwen.4129271204 Feb 29 12:49:15 PM PST 24 Feb 29 12:49:17 PM PST 24 331067088 ps
T824 /workspace/coverage/default/35.clkmgr_lc_ctrl_intersig_mubi.1931479195 Feb 29 12:50:10 PM PST 24 Feb 29 12:50:11 PM PST 24 22429545 ps
T825 /workspace/coverage/default/16.clkmgr_idle_intersig_mubi.2361634993 Feb 29 12:49:03 PM PST 24 Feb 29 12:49:04 PM PST 24 106482968 ps
T826 /workspace/coverage/default/22.clkmgr_regwen.1515866288 Feb 29 12:49:18 PM PST 24 Feb 29 12:49:23 PM PST 24 740514035 ps
T827 /workspace/coverage/default/39.clkmgr_extclk.430598094 Feb 29 12:50:33 PM PST 24 Feb 29 12:50:34 PM PST 24 11532757 ps
T828 /workspace/coverage/default/33.clkmgr_stress_all.3734126873 Feb 29 12:50:04 PM PST 24 Feb 29 12:50:49 PM PST 24 6017133327 ps
T829 /workspace/coverage/default/49.clkmgr_lc_clk_byp_req_intersig_mubi.833317612 Feb 29 12:51:20 PM PST 24 Feb 29 12:51:22 PM PST 24 79889731 ps
T830 /workspace/coverage/default/6.clkmgr_lc_clk_byp_req_intersig_mubi.829709871 Feb 29 12:49:05 PM PST 24 Feb 29 12:49:06 PM PST 24 27605075 ps
T831 /workspace/coverage/default/42.clkmgr_stress_all_with_rand_reset.3888558552 Feb 29 12:50:34 PM PST 24 Feb 29 12:57:18 PM PST 24 26364575051 ps
T832 /workspace/coverage/default/31.clkmgr_regwen.556176943 Feb 29 12:50:12 PM PST 24 Feb 29 12:50:15 PM PST 24 613480705 ps
T833 /workspace/coverage/default/9.clkmgr_div_intersig_mubi.385627874 Feb 29 12:48:52 PM PST 24 Feb 29 12:48:59 PM PST 24 49219102 ps
T834 /workspace/coverage/default/19.clkmgr_stress_all_with_rand_reset.4154593970 Feb 29 12:48:53 PM PST 24 Feb 29 01:21:32 PM PST 24 497105327328 ps
T835 /workspace/coverage/default/30.clkmgr_alert_test.1020729711 Feb 29 12:49:46 PM PST 24 Feb 29 12:49:48 PM PST 24 46116779 ps
T836 /workspace/coverage/default/24.clkmgr_peri.21543684 Feb 29 12:49:15 PM PST 24 Feb 29 12:49:15 PM PST 24 26669506 ps
T837 /workspace/coverage/default/46.clkmgr_lc_ctrl_intersig_mubi.321562492 Feb 29 12:51:07 PM PST 24 Feb 29 12:51:08 PM PST 24 29413828 ps
T838 /workspace/coverage/default/2.clkmgr_stress_all.1153212733 Feb 29 12:48:55 PM PST 24 Feb 29 12:49:04 PM PST 24 1122245999 ps
T839 /workspace/coverage/default/25.clkmgr_peri.2566598167 Feb 29 12:49:29 PM PST 24 Feb 29 12:49:30 PM PST 24 70676321 ps
T840 /workspace/coverage/default/29.clkmgr_trans.1494191867 Feb 29 12:49:38 PM PST 24 Feb 29 12:49:40 PM PST 24 84547904 ps
T44 /workspace/coverage/default/1.clkmgr_sec_cm.1237117849 Feb 29 12:48:37 PM PST 24 Feb 29 12:48:42 PM PST 24 560650305 ps
T841 /workspace/coverage/default/11.clkmgr_peri.3138896140 Feb 29 12:48:45 PM PST 24 Feb 29 12:48:47 PM PST 24 14675046 ps
T842 /workspace/coverage/default/36.clkmgr_trans.2733049794 Feb 29 12:50:13 PM PST 24 Feb 29 12:50:15 PM PST 24 25574216 ps
T843 /workspace/coverage/default/30.clkmgr_extclk.4277671505 Feb 29 12:49:45 PM PST 24 Feb 29 12:49:46 PM PST 24 17038400 ps
T844 /workspace/coverage/default/47.clkmgr_frequency.2445884446 Feb 29 12:51:05 PM PST 24 Feb 29 12:51:13 PM PST 24 1938740344 ps
T845 /workspace/coverage/default/44.clkmgr_smoke.973510802 Feb 29 12:50:48 PM PST 24 Feb 29 12:50:49 PM PST 24 44140953 ps
T846 /workspace/coverage/default/33.clkmgr_smoke.2288652076 Feb 29 12:49:43 PM PST 24 Feb 29 12:49:44 PM PST 24 70028305 ps
T847 /workspace/coverage/default/46.clkmgr_frequency_timeout.2244823320 Feb 29 12:50:56 PM PST 24 Feb 29 12:51:01 PM PST 24 1170533363 ps
T848 /workspace/coverage/default/23.clkmgr_extclk.181308433 Feb 29 12:49:07 PM PST 24 Feb 29 12:49:08 PM PST 24 19846684 ps
T849 /workspace/coverage/default/19.clkmgr_frequency_timeout.3109532145 Feb 29 12:49:20 PM PST 24 Feb 29 12:49:24 PM PST 24 495935923 ps
T850 /workspace/coverage/default/2.clkmgr_smoke.3043473454 Feb 29 12:48:45 PM PST 24 Feb 29 12:48:47 PM PST 24 16895512 ps
T851 /workspace/coverage/default/42.clkmgr_div_intersig_mubi.2142935974 Feb 29 12:50:40 PM PST 24 Feb 29 12:50:41 PM PST 24 49536611 ps
T852 /workspace/coverage/default/6.clkmgr_clk_status.3220716209 Feb 29 12:48:41 PM PST 24 Feb 29 12:48:41 PM PST 24 17013771 ps
T853 /workspace/coverage/default/45.clkmgr_clk_status.415554166 Feb 29 12:51:20 PM PST 24 Feb 29 12:51:21 PM PST 24 13078496 ps
T854 /workspace/coverage/default/48.clkmgr_peri.3515620919 Feb 29 12:51:11 PM PST 24 Feb 29 12:51:17 PM PST 24 21316866 ps
T855 /workspace/coverage/default/21.clkmgr_lc_ctrl_intersig_mubi.335334465 Feb 29 12:49:08 PM PST 24 Feb 29 12:49:09 PM PST 24 50089872 ps
T856 /workspace/coverage/cover_reg_top/40.clkmgr_intr_test.342933539 Feb 29 12:42:43 PM PST 24 Feb 29 12:42:44 PM PST 24 29748252 ps
T857 /workspace/coverage/cover_reg_top/12.clkmgr_intr_test.3679608330 Feb 29 12:42:51 PM PST 24 Feb 29 12:42:52 PM PST 24 24643158 ps
T858 /workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.3600250301 Feb 29 12:42:45 PM PST 24 Feb 29 12:42:47 PM PST 24 162305076 ps
T859 /workspace/coverage/cover_reg_top/1.clkmgr_intr_test.364914794 Feb 29 12:42:41 PM PST 24 Feb 29 12:42:42 PM PST 24 12240861 ps
T860 /workspace/coverage/cover_reg_top/42.clkmgr_intr_test.420766076 Feb 29 12:43:01 PM PST 24 Feb 29 12:43:03 PM PST 24 42832455 ps
T100 /workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.4109445234 Feb 29 12:42:38 PM PST 24 Feb 29 12:42:39 PM PST 24 80204174 ps
T94 /workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.3251246416 Feb 29 12:42:55 PM PST 24 Feb 29 12:42:58 PM PST 24 224680755 ps
T101 /workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.2921083794 Feb 29 12:42:44 PM PST 24 Feb 29 12:42:47 PM PST 24 139937932 ps
T861 /workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.1672430398 Feb 29 12:43:08 PM PST 24 Feb 29 12:43:09 PM PST 24 94938380 ps
T862 /workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.1231603338 Feb 29 12:43:01 PM PST 24 Feb 29 12:43:06 PM PST 24 489612633 ps
T73 /workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.4043539640 Feb 29 12:42:31 PM PST 24 Feb 29 12:42:33 PM PST 24 97309845 ps
T95 /workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.1492797204 Feb 29 12:42:54 PM PST 24 Feb 29 12:42:56 PM PST 24 81947848 ps
T96 /workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.3474662724 Feb 29 12:42:40 PM PST 24 Feb 29 12:42:42 PM PST 24 79966365 ps
T74 /workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.3855027481 Feb 29 12:42:57 PM PST 24 Feb 29 12:42:59 PM PST 24 90491417 ps
T58 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.4063951200 Feb 29 12:42:40 PM PST 24 Feb 29 12:42:42 PM PST 24 153956520 ps
T863 /workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.1375670067 Feb 29 12:42:33 PM PST 24 Feb 29 12:42:34 PM PST 24 98439861 ps
T864 /workspace/coverage/cover_reg_top/5.clkmgr_intr_test.2936318918 Feb 29 12:42:45 PM PST 24 Feb 29 12:42:46 PM PST 24 30259674 ps
T55 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.3169670476 Feb 29 12:42:54 PM PST 24 Feb 29 12:42:56 PM PST 24 101129175 ps
T865 /workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.3861290597 Feb 29 12:42:36 PM PST 24 Feb 29 12:42:38 PM PST 24 39200883 ps
T866 /workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.3200699113 Feb 29 12:42:36 PM PST 24 Feb 29 12:42:41 PM PST 24 278372425 ps
T56 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.3813343689 Feb 29 12:42:33 PM PST 24 Feb 29 12:42:36 PM PST 24 511134516 ps
T867 /workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.2599571530 Feb 29 12:43:02 PM PST 24 Feb 29 12:43:03 PM PST 24 26661848 ps
T868 /workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.582189905 Feb 29 12:42:47 PM PST 24 Feb 29 12:42:51 PM PST 24 126871197 ps
T869 /workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.2930173911 Feb 29 12:42:53 PM PST 24 Feb 29 12:42:55 PM PST 24 108727191 ps
T97 /workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.478723807 Feb 29 12:43:05 PM PST 24 Feb 29 12:43:07 PM PST 24 77309605 ps
T75 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.331496651 Feb 29 12:42:58 PM PST 24 Feb 29 12:43:00 PM PST 24 40179288 ps
T76 /workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.3799648951 Feb 29 12:42:46 PM PST 24 Feb 29 12:42:48 PM PST 24 54668915 ps
T60 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.2144560307 Feb 29 12:42:57 PM PST 24 Feb 29 12:43:00 PM PST 24 437125344 ps
T77 /workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.1081076412 Feb 29 12:42:38 PM PST 24 Feb 29 12:42:39 PM PST 24 59486344 ps
T870 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.3703099781 Feb 29 12:42:34 PM PST 24 Feb 29 12:42:41 PM PST 24 36306026 ps
T871 /workspace/coverage/cover_reg_top/21.clkmgr_intr_test.3849126918 Feb 29 12:42:58 PM PST 24 Feb 29 12:43:00 PM PST 24 29481710 ps
T872 /workspace/coverage/cover_reg_top/41.clkmgr_intr_test.1400717478 Feb 29 12:43:01 PM PST 24 Feb 29 12:43:03 PM PST 24 26582433 ps
T57 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.1098260916 Feb 29 12:42:36 PM PST 24 Feb 29 12:42:38 PM PST 24 67127177 ps
T78 /workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.424742016 Feb 29 12:42:36 PM PST 24 Feb 29 12:42:37 PM PST 24 21476242 ps
T873 /workspace/coverage/cover_reg_top/2.clkmgr_intr_test.1339264379 Feb 29 12:42:54 PM PST 24 Feb 29 12:42:55 PM PST 24 12067255 ps
T874 /workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.1740443115 Feb 29 12:43:03 PM PST 24 Feb 29 12:43:05 PM PST 24 15110682 ps
T875 /workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.3225313802 Feb 29 12:42:59 PM PST 24 Feb 29 12:43:01 PM PST 24 124758748 ps
T876 /workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.1908743321 Feb 29 12:43:08 PM PST 24 Feb 29 12:43:09 PM PST 24 31727294 ps
T63 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.1097842424 Feb 29 12:43:04 PM PST 24 Feb 29 12:43:06 PM PST 24 87685541 ps
T61 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.34638334 Feb 29 12:42:43 PM PST 24 Feb 29 12:42:45 PM PST 24 152584073 ps
T79 /workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.698796485 Feb 29 12:42:40 PM PST 24 Feb 29 12:42:41 PM PST 24 64113005 ps
T105 /workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.58216205 Feb 29 12:42:38 PM PST 24 Feb 29 12:42:41 PM PST 24 120336843 ps
T103 /workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.3042851529 Feb 29 12:42:43 PM PST 24 Feb 29 12:42:45 PM PST 24 54207195 ps
T877 /workspace/coverage/cover_reg_top/15.clkmgr_intr_test.476233947 Feb 29 12:42:59 PM PST 24 Feb 29 12:43:02 PM PST 24 13135785 ps
T878 /workspace/coverage/cover_reg_top/6.clkmgr_intr_test.1959420054 Feb 29 12:42:53 PM PST 24 Feb 29 12:42:54 PM PST 24 13712145 ps
T879 /workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.622353969 Feb 29 12:42:38 PM PST 24 Feb 29 12:42:39 PM PST 24 52720742 ps
T62 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.1727099598 Feb 29 12:42:42 PM PST 24 Feb 29 12:42:46 PM PST 24 203836133 ps
T880 /workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.3287791567 Feb 29 12:42:43 PM PST 24 Feb 29 12:42:44 PM PST 24 33777559 ps
T881 /workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.2006187505 Feb 29 12:42:39 PM PST 24 Feb 29 12:42:42 PM PST 24 89267065 ps
T882 /workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.715346800 Feb 29 12:43:04 PM PST 24 Feb 29 12:43:05 PM PST 24 41203955 ps
T883 /workspace/coverage/cover_reg_top/35.clkmgr_intr_test.3640331255 Feb 29 12:43:19 PM PST 24 Feb 29 12:43:21 PM PST 24 18269624 ps
T884 /workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.770429303 Feb 29 12:42:44 PM PST 24 Feb 29 12:42:45 PM PST 24 59140740 ps
T102 /workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.1702599898 Feb 29 12:42:50 PM PST 24 Feb 29 12:42:52 PM PST 24 79119641 ps
T115 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.3225990405 Feb 29 12:42:52 PM PST 24 Feb 29 12:42:55 PM PST 24 105761983 ps
T885 /workspace/coverage/cover_reg_top/10.clkmgr_intr_test.3559188136 Feb 29 12:42:41 PM PST 24 Feb 29 12:42:43 PM PST 24 29832680 ps
T886 /workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.2147766685 Feb 29 12:42:40 PM PST 24 Feb 29 12:42:44 PM PST 24 106763497 ps
T887 /workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.4035590416 Feb 29 12:42:46 PM PST 24 Feb 29 12:42:49 PM PST 24 248278054 ps
T888 /workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.1158309714 Feb 29 12:42:49 PM PST 24 Feb 29 12:42:53 PM PST 24 130595865 ps
T155 /workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.71734716 Feb 29 12:42:54 PM PST 24 Feb 29 12:42:56 PM PST 24 126254618 ps
T889 /workspace/coverage/cover_reg_top/7.clkmgr_intr_test.2789786571 Feb 29 12:42:36 PM PST 24 Feb 29 12:42:37 PM PST 24 12435219 ps
T890 /workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.977785731 Feb 29 12:42:43 PM PST 24 Feb 29 12:42:47 PM PST 24 126851642 ps
T104 /workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.3619822280 Feb 29 12:42:40 PM PST 24 Feb 29 12:42:42 PM PST 24 114927953 ps
T891 /workspace/coverage/cover_reg_top/26.clkmgr_intr_test.2214362016 Feb 29 12:43:02 PM PST 24 Feb 29 12:43:03 PM PST 24 12199567 ps
T64 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.518897548 Feb 29 12:42:40 PM PST 24 Feb 29 12:42:43 PM PST 24 611222555 ps
T892 /workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.3311301027 Feb 29 12:42:47 PM PST 24 Feb 29 12:42:48 PM PST 24 44656871 ps
T893 /workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.3808804007 Feb 29 12:42:38 PM PST 24 Feb 29 12:42:39 PM PST 24 39580900 ps
T116 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.1322576924 Feb 29 12:42:53 PM PST 24 Feb 29 12:42:55 PM PST 24 236648366 ps
T894 /workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.3985393590 Feb 29 12:42:45 PM PST 24 Feb 29 12:42:48 PM PST 24 83101155 ps
T895 /workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.162143695 Feb 29 12:42:36 PM PST 24 Feb 29 12:42:43 PM PST 24 689708560 ps
T896 /workspace/coverage/cover_reg_top/29.clkmgr_intr_test.640577396 Feb 29 12:43:10 PM PST 24 Feb 29 12:43:11 PM PST 24 21571812 ps
T897 /workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.4214801523 Feb 29 12:42:51 PM PST 24 Feb 29 12:42:53 PM PST 24 64547318 ps
T898 /workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.1236072300 Feb 29 12:42:46 PM PST 24 Feb 29 12:42:48 PM PST 24 34126848 ps
T899 /workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.640723623 Feb 29 12:42:56 PM PST 24 Feb 29 12:42:58 PM PST 24 23740965 ps
T900 /workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.2535316385 Feb 29 12:43:18 PM PST 24 Feb 29 12:43:20 PM PST 24 19610846 ps
T901 /workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.2175927004 Feb 29 12:42:40 PM PST 24 Feb 29 12:42:42 PM PST 24 56215447 ps
T902 /workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.622477311 Feb 29 12:42:47 PM PST 24 Feb 29 12:42:49 PM PST 24 40626539 ps
T903 /workspace/coverage/cover_reg_top/30.clkmgr_intr_test.1550928423 Feb 29 12:43:02 PM PST 24 Feb 29 12:43:03 PM PST 24 27550531 ps
T904 /workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.3529717135 Feb 29 12:43:08 PM PST 24 Feb 29 12:43:09 PM PST 24 87285095 ps
T905 /workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.3393706880 Feb 29 12:42:44 PM PST 24 Feb 29 12:42:46 PM PST 24 87582914 ps
T906 /workspace/coverage/cover_reg_top/48.clkmgr_intr_test.236599821 Feb 29 12:43:06 PM PST 24 Feb 29 12:43:07 PM PST 24 53905580 ps
T907 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.973011654 Feb 29 12:43:04 PM PST 24 Feb 29 12:43:06 PM PST 24 58397209 ps
T908 /workspace/coverage/cover_reg_top/17.clkmgr_intr_test.684883222 Feb 29 12:43:02 PM PST 24 Feb 29 12:43:03 PM PST 24 12100321 ps
T909 /workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.3082297885 Feb 29 12:42:31 PM PST 24 Feb 29 12:42:34 PM PST 24 118233403 ps
T910 /workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.2231178238 Feb 29 12:42:37 PM PST 24 Feb 29 12:42:39 PM PST 24 58071752 ps
T911 /workspace/coverage/cover_reg_top/36.clkmgr_intr_test.1549762939 Feb 29 12:43:02 PM PST 24 Feb 29 12:43:04 PM PST 24 29424662 ps
T912 /workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.3284219563 Feb 29 12:42:37 PM PST 24 Feb 29 12:42:38 PM PST 24 42648312 ps
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