Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.52 99.15 95.84 100.00 100.00 98.81 97.01 98.80


Total test records in report: 1010
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T798 /workspace/coverage/default/19.clkmgr_frequency_timeout.2092965184 Mar 03 02:18:33 PM PST 24 Mar 03 02:18:36 PM PST 24 505034730 ps
T799 /workspace/coverage/default/16.clkmgr_frequency_timeout.1955668176 Mar 03 02:18:20 PM PST 24 Mar 03 02:18:30 PM PST 24 1339809139 ps
T800 /workspace/coverage/default/7.clkmgr_regwen.1078041207 Mar 03 02:17:46 PM PST 24 Mar 03 02:17:54 PM PST 24 1228135900 ps
T801 /workspace/coverage/default/18.clkmgr_div_intersig_mubi.154187410 Mar 03 02:18:25 PM PST 24 Mar 03 02:18:26 PM PST 24 26866894 ps
T802 /workspace/coverage/default/5.clkmgr_extclk.1837053319 Mar 03 02:17:35 PM PST 24 Mar 03 02:17:35 PM PST 24 38441802 ps
T803 /workspace/coverage/default/35.clkmgr_lc_clk_byp_req_intersig_mubi.3529097795 Mar 03 02:19:18 PM PST 24 Mar 03 02:19:19 PM PST 24 19782759 ps
T804 /workspace/coverage/default/10.clkmgr_clk_status.37731233 Mar 03 02:18:00 PM PST 24 Mar 03 02:18:01 PM PST 24 32941648 ps
T805 /workspace/coverage/default/31.clkmgr_idle_intersig_mubi.825498779 Mar 03 02:19:07 PM PST 24 Mar 03 02:19:08 PM PST 24 26772325 ps
T806 /workspace/coverage/default/1.clkmgr_peri.1002504180 Mar 03 02:17:18 PM PST 24 Mar 03 02:17:19 PM PST 24 26505121 ps
T807 /workspace/coverage/default/35.clkmgr_alert_test.1112804329 Mar 03 02:19:20 PM PST 24 Mar 03 02:19:21 PM PST 24 13603203 ps
T808 /workspace/coverage/default/2.clkmgr_lc_clk_byp_req_intersig_mubi.3589171036 Mar 03 02:17:23 PM PST 24 Mar 03 02:17:24 PM PST 24 16149263 ps
T809 /workspace/coverage/default/12.clkmgr_stress_all_with_rand_reset.1551449354 Mar 03 02:18:08 PM PST 24 Mar 03 02:54:24 PM PST 24 634951111452 ps
T810 /workspace/coverage/default/25.clkmgr_lc_clk_byp_req_intersig_mubi.2074040241 Mar 03 02:18:52 PM PST 24 Mar 03 02:18:53 PM PST 24 65625984 ps
T811 /workspace/coverage/default/41.clkmgr_extclk.2178853393 Mar 03 02:19:34 PM PST 24 Mar 03 02:19:36 PM PST 24 150330138 ps
T812 /workspace/coverage/default/19.clkmgr_clk_handshake_intersig_mubi.3109209620 Mar 03 02:18:31 PM PST 24 Mar 03 02:18:32 PM PST 24 29826376 ps
T813 /workspace/coverage/default/25.clkmgr_alert_test.821958546 Mar 03 02:18:51 PM PST 24 Mar 03 02:18:52 PM PST 24 16715717 ps
T814 /workspace/coverage/default/14.clkmgr_extclk.1443165239 Mar 03 02:18:10 PM PST 24 Mar 03 02:18:12 PM PST 24 80922251 ps
T815 /workspace/coverage/default/44.clkmgr_div_intersig_mubi.2963352388 Mar 03 02:19:37 PM PST 24 Mar 03 02:19:39 PM PST 24 94742281 ps
T816 /workspace/coverage/default/5.clkmgr_peri.3932899373 Mar 03 02:17:39 PM PST 24 Mar 03 02:17:40 PM PST 24 14171822 ps
T10 /workspace/coverage/default/24.clkmgr_regwen.1152154404 Mar 03 02:18:50 PM PST 24 Mar 03 02:18:56 PM PST 24 1018717742 ps
T817 /workspace/coverage/default/28.clkmgr_stress_all.3397960374 Mar 03 02:18:55 PM PST 24 Mar 03 02:19:08 PM PST 24 3146711244 ps
T818 /workspace/coverage/default/39.clkmgr_peri.446808739 Mar 03 02:19:30 PM PST 24 Mar 03 02:19:31 PM PST 24 24767066 ps
T819 /workspace/coverage/default/2.clkmgr_regwen.1841568743 Mar 03 02:17:23 PM PST 24 Mar 03 02:17:28 PM PST 24 1244880621 ps
T820 /workspace/coverage/default/5.clkmgr_idle_intersig_mubi.936169387 Mar 03 02:17:41 PM PST 24 Mar 03 02:17:42 PM PST 24 153204712 ps
T821 /workspace/coverage/default/46.clkmgr_clk_handshake_intersig_mubi.819064055 Mar 03 02:19:48 PM PST 24 Mar 03 02:19:49 PM PST 24 71640945 ps
T822 /workspace/coverage/default/47.clkmgr_lc_ctrl_intersig_mubi.2633477907 Mar 03 02:19:44 PM PST 24 Mar 03 02:19:45 PM PST 24 15975717 ps
T823 /workspace/coverage/default/15.clkmgr_alert_test.1477053897 Mar 03 02:18:17 PM PST 24 Mar 03 02:18:18 PM PST 24 78254785 ps
T824 /workspace/coverage/default/12.clkmgr_trans.12834656 Mar 03 02:18:07 PM PST 24 Mar 03 02:18:08 PM PST 24 30642628 ps
T825 /workspace/coverage/default/41.clkmgr_trans.3947225101 Mar 03 02:19:31 PM PST 24 Mar 03 02:19:33 PM PST 24 26312298 ps
T826 /workspace/coverage/default/46.clkmgr_extclk.2706291525 Mar 03 02:19:53 PM PST 24 Mar 03 02:19:54 PM PST 24 16977860 ps
T827 /workspace/coverage/default/49.clkmgr_smoke.1795486588 Mar 03 02:19:53 PM PST 24 Mar 03 02:19:54 PM PST 24 21609015 ps
T828 /workspace/coverage/default/23.clkmgr_smoke.37724233 Mar 03 02:18:48 PM PST 24 Mar 03 02:18:49 PM PST 24 16550494 ps
T829 /workspace/coverage/default/3.clkmgr_div_intersig_mubi.600117283 Mar 03 02:17:28 PM PST 24 Mar 03 02:17:29 PM PST 24 32455859 ps
T830 /workspace/coverage/default/14.clkmgr_div_intersig_mubi.230020069 Mar 03 02:18:11 PM PST 24 Mar 03 02:18:12 PM PST 24 13961902 ps
T831 /workspace/coverage/default/40.clkmgr_div_intersig_mubi.4105193611 Mar 03 02:19:29 PM PST 24 Mar 03 02:19:30 PM PST 24 48989946 ps
T832 /workspace/coverage/default/25.clkmgr_smoke.3540581850 Mar 03 02:18:50 PM PST 24 Mar 03 02:18:51 PM PST 24 69625562 ps
T833 /workspace/coverage/default/16.clkmgr_lc_ctrl_intersig_mubi.3203637173 Mar 03 02:18:22 PM PST 24 Mar 03 02:18:25 PM PST 24 380884278 ps
T834 /workspace/coverage/default/10.clkmgr_regwen.916607008 Mar 03 02:17:58 PM PST 24 Mar 03 02:18:01 PM PST 24 548733468 ps
T835 /workspace/coverage/default/15.clkmgr_frequency_timeout.1557129208 Mar 03 02:18:13 PM PST 24 Mar 03 02:18:15 PM PST 24 261379195 ps
T836 /workspace/coverage/default/46.clkmgr_clk_status.3652167073 Mar 03 02:19:42 PM PST 24 Mar 03 02:19:43 PM PST 24 56268869 ps
T837 /workspace/coverage/default/18.clkmgr_idle_intersig_mubi.3151229753 Mar 03 02:18:27 PM PST 24 Mar 03 02:18:28 PM PST 24 68044175 ps
T838 /workspace/coverage/default/5.clkmgr_lc_clk_byp_req_intersig_mubi.4208902246 Mar 03 02:17:50 PM PST 24 Mar 03 02:17:51 PM PST 24 42483552 ps
T839 /workspace/coverage/default/33.clkmgr_clk_status.469892868 Mar 03 02:19:13 PM PST 24 Mar 03 02:19:14 PM PST 24 27544174 ps
T840 /workspace/coverage/default/7.clkmgr_stress_all.425227962 Mar 03 02:17:46 PM PST 24 Mar 03 02:18:02 PM PST 24 3472711219 ps
T841 /workspace/coverage/default/29.clkmgr_stress_all.1744773959 Mar 03 02:19:06 PM PST 24 Mar 03 02:19:20 PM PST 24 1688435664 ps
T842 /workspace/coverage/default/37.clkmgr_smoke.1601316660 Mar 03 02:19:15 PM PST 24 Mar 03 02:19:16 PM PST 24 24726991 ps
T843 /workspace/coverage/default/0.clkmgr_extclk.2978594055 Mar 03 02:17:07 PM PST 24 Mar 03 02:17:08 PM PST 24 18778542 ps
T844 /workspace/coverage/default/37.clkmgr_stress_all_with_rand_reset.2655560977 Mar 03 02:19:26 PM PST 24 Mar 03 02:31:53 PM PST 24 108381643509 ps
T845 /workspace/coverage/default/41.clkmgr_clk_status.13160941 Mar 03 02:19:32 PM PST 24 Mar 03 02:19:34 PM PST 24 36329790 ps
T846 /workspace/coverage/default/14.clkmgr_lc_ctrl_intersig_mubi.571801326 Mar 03 02:18:11 PM PST 24 Mar 03 02:18:12 PM PST 24 253329356 ps
T847 /workspace/coverage/default/14.clkmgr_frequency.2727030457 Mar 03 02:18:13 PM PST 24 Mar 03 02:18:16 PM PST 24 467241979 ps
T848 /workspace/coverage/default/11.clkmgr_stress_all.1073375134 Mar 03 02:18:07 PM PST 24 Mar 03 02:18:24 PM PST 24 3304488758 ps
T849 /workspace/coverage/default/20.clkmgr_stress_all.827747930 Mar 03 02:18:37 PM PST 24 Mar 03 02:18:56 PM PST 24 2426035336 ps
T850 /workspace/coverage/default/20.clkmgr_clk_status.4189429415 Mar 03 02:18:37 PM PST 24 Mar 03 02:18:38 PM PST 24 16993258 ps
T851 /workspace/coverage/default/4.clkmgr_idle_intersig_mubi.2613457296 Mar 03 02:17:34 PM PST 24 Mar 03 02:17:35 PM PST 24 14191465 ps
T65 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.2642343338 Mar 03 02:05:26 PM PST 24 Mar 03 02:05:28 PM PST 24 23840928 ps
T852 /workspace/coverage/cover_reg_top/2.clkmgr_intr_test.485788126 Mar 03 02:05:13 PM PST 24 Mar 03 02:05:14 PM PST 24 28503294 ps
T66 /workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.3859065438 Mar 03 02:05:27 PM PST 24 Mar 03 02:05:29 PM PST 24 25240384 ps
T67 /workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.2900855231 Mar 03 02:05:03 PM PST 24 Mar 03 02:05:05 PM PST 24 116668797 ps
T50 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.2010105725 Mar 03 02:05:19 PM PST 24 Mar 03 02:05:22 PM PST 24 143671623 ps
T51 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.1057450258 Mar 03 02:05:16 PM PST 24 Mar 03 02:05:19 PM PST 24 259628825 ps
T68 /workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.4173676281 Mar 03 02:05:34 PM PST 24 Mar 03 02:05:35 PM PST 24 54647746 ps
T82 /workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.4058169622 Mar 03 02:05:25 PM PST 24 Mar 03 02:05:29 PM PST 24 192495037 ps
T52 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.2870171100 Mar 03 02:05:28 PM PST 24 Mar 03 02:05:31 PM PST 24 352142129 ps
T83 /workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.4024997620 Mar 03 02:05:14 PM PST 24 Mar 03 02:05:18 PM PST 24 212692833 ps
T69 /workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.677009534 Mar 03 02:05:26 PM PST 24 Mar 03 02:05:28 PM PST 24 20907257 ps
T853 /workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.2310286694 Mar 03 02:05:18 PM PST 24 Mar 03 02:05:20 PM PST 24 40896207 ps
T54 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.212613972 Mar 03 02:05:18 PM PST 24 Mar 03 02:05:20 PM PST 24 178631806 ps
T53 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.2494924785 Mar 03 02:05:15 PM PST 24 Mar 03 02:05:18 PM PST 24 213896705 ps
T854 /workspace/coverage/cover_reg_top/28.clkmgr_intr_test.622552383 Mar 03 02:05:38 PM PST 24 Mar 03 02:05:39 PM PST 24 10912587 ps
T855 /workspace/coverage/cover_reg_top/34.clkmgr_intr_test.1394448542 Mar 03 02:05:32 PM PST 24 Mar 03 02:05:33 PM PST 24 12450511 ps
T856 /workspace/coverage/cover_reg_top/49.clkmgr_intr_test.1816207476 Mar 03 02:05:39 PM PST 24 Mar 03 02:05:40 PM PST 24 16594616 ps
T857 /workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.2828000518 Mar 03 02:05:18 PM PST 24 Mar 03 02:05:29 PM PST 24 2470620885 ps
T84 /workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.693096098 Mar 03 02:05:31 PM PST 24 Mar 03 02:05:33 PM PST 24 67124617 ps
T56 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.3712601490 Mar 03 02:05:34 PM PST 24 Mar 03 02:05:36 PM PST 24 92400421 ps
T858 /workspace/coverage/cover_reg_top/47.clkmgr_intr_test.399123534 Mar 03 02:05:38 PM PST 24 Mar 03 02:05:41 PM PST 24 24650880 ps
T859 /workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.1141891350 Mar 03 02:05:24 PM PST 24 Mar 03 02:05:28 PM PST 24 61264933 ps
T860 /workspace/coverage/cover_reg_top/46.clkmgr_intr_test.2137688534 Mar 03 02:05:38 PM PST 24 Mar 03 02:05:40 PM PST 24 34108448 ps
T861 /workspace/coverage/cover_reg_top/4.clkmgr_intr_test.216021442 Mar 03 02:05:12 PM PST 24 Mar 03 02:05:14 PM PST 24 25905549 ps
T862 /workspace/coverage/cover_reg_top/25.clkmgr_intr_test.1210017387 Mar 03 02:05:30 PM PST 24 Mar 03 02:05:31 PM PST 24 14196425 ps
T863 /workspace/coverage/cover_reg_top/42.clkmgr_intr_test.1541795494 Mar 03 02:05:39 PM PST 24 Mar 03 02:05:40 PM PST 24 11178361 ps
T70 /workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.3973126599 Mar 03 02:05:19 PM PST 24 Mar 03 02:05:20 PM PST 24 27754939 ps
T55 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.515516850 Mar 03 02:05:05 PM PST 24 Mar 03 02:05:07 PM PST 24 325165248 ps
T71 /workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.523532659 Mar 03 02:05:30 PM PST 24 Mar 03 02:05:32 PM PST 24 177127031 ps
T864 /workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.2380901973 Mar 03 02:05:38 PM PST 24 Mar 03 02:05:39 PM PST 24 22632280 ps
T90 /workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.353769385 Mar 03 02:05:25 PM PST 24 Mar 03 02:05:30 PM PST 24 263592722 ps
T72 /workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.2068015073 Mar 03 02:05:15 PM PST 24 Mar 03 02:05:17 PM PST 24 437777023 ps
T865 /workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.642436406 Mar 03 02:05:16 PM PST 24 Mar 03 02:05:18 PM PST 24 23305415 ps
T104 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.4230509982 Mar 03 02:05:19 PM PST 24 Mar 03 02:05:21 PM PST 24 210945840 ps
T866 /workspace/coverage/cover_reg_top/41.clkmgr_intr_test.1895512901 Mar 03 02:05:37 PM PST 24 Mar 03 02:05:38 PM PST 24 36389744 ps
T867 /workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.3931896428 Mar 03 02:05:19 PM PST 24 Mar 03 02:05:20 PM PST 24 24142645 ps
T170 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.2831583743 Mar 03 02:05:27 PM PST 24 Mar 03 02:05:30 PM PST 24 255948584 ps
T85 /workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.1959193187 Mar 03 02:05:19 PM PST 24 Mar 03 02:05:22 PM PST 24 97131193 ps
T868 /workspace/coverage/cover_reg_top/15.clkmgr_intr_test.2510119598 Mar 03 02:05:25 PM PST 24 Mar 03 02:05:28 PM PST 24 32793657 ps
T869 /workspace/coverage/cover_reg_top/26.clkmgr_intr_test.1568672600 Mar 03 02:05:34 PM PST 24 Mar 03 02:05:35 PM PST 24 15257770 ps
T870 /workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.3882257139 Mar 03 02:05:19 PM PST 24 Mar 03 02:05:20 PM PST 24 32636984 ps
T57 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.518434319 Mar 03 02:05:19 PM PST 24 Mar 03 02:05:21 PM PST 24 271851710 ps
T871 /workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.58766663 Mar 03 02:05:26 PM PST 24 Mar 03 02:05:31 PM PST 24 194650878 ps
T872 /workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.3845486712 Mar 03 02:05:13 PM PST 24 Mar 03 02:05:17 PM PST 24 182237161 ps
T873 /workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.3399496264 Mar 03 02:05:02 PM PST 24 Mar 03 02:05:03 PM PST 24 58083839 ps
T874 /workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.2648468214 Mar 03 02:05:25 PM PST 24 Mar 03 02:05:29 PM PST 24 95516786 ps
T875 /workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.1813764694 Mar 03 02:05:27 PM PST 24 Mar 03 02:05:28 PM PST 24 107176197 ps
T876 /workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.346198822 Mar 03 02:05:17 PM PST 24 Mar 03 02:05:18 PM PST 24 17306271 ps
T105 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.3380740768 Mar 03 02:05:27 PM PST 24 Mar 03 02:05:31 PM PST 24 323016365 ps
T877 /workspace/coverage/cover_reg_top/6.clkmgr_intr_test.1278097573 Mar 03 02:05:17 PM PST 24 Mar 03 02:05:18 PM PST 24 32974596 ps
T878 /workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.299959652 Mar 03 02:05:31 PM PST 24 Mar 03 02:05:33 PM PST 24 223985378 ps
T879 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.602976909 Mar 03 02:05:10 PM PST 24 Mar 03 02:05:13 PM PST 24 99950391 ps
T880 /workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.3140778511 Mar 03 02:05:06 PM PST 24 Mar 03 02:05:08 PM PST 24 57265758 ps
T881 /workspace/coverage/cover_reg_top/18.clkmgr_intr_test.3726689177 Mar 03 02:05:41 PM PST 24 Mar 03 02:05:42 PM PST 24 55548080 ps
T882 /workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.2564459553 Mar 03 02:05:07 PM PST 24 Mar 03 02:05:08 PM PST 24 101409294 ps
T883 /workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.4275101721 Mar 03 02:05:04 PM PST 24 Mar 03 02:05:05 PM PST 24 27032115 ps
T884 /workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.3053431146 Mar 03 02:05:27 PM PST 24 Mar 03 02:05:31 PM PST 24 177111913 ps
T885 /workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.179533632 Mar 03 02:05:12 PM PST 24 Mar 03 02:05:14 PM PST 24 133227258 ps
T106 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.3879250882 Mar 03 02:05:05 PM PST 24 Mar 03 02:05:06 PM PST 24 61102029 ps
T886 /workspace/coverage/cover_reg_top/21.clkmgr_intr_test.1281857321 Mar 03 02:05:38 PM PST 24 Mar 03 02:05:40 PM PST 24 36073925 ps
T887 /workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.2758015716 Mar 03 02:05:12 PM PST 24 Mar 03 02:05:17 PM PST 24 529607010 ps
T86 /workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.2792148052 Mar 03 02:05:03 PM PST 24 Mar 03 02:05:07 PM PST 24 132063127 ps
T888 /workspace/coverage/cover_reg_top/32.clkmgr_intr_test.2853696877 Mar 03 02:05:32 PM PST 24 Mar 03 02:05:33 PM PST 24 23487897 ps
T889 /workspace/coverage/cover_reg_top/38.clkmgr_intr_test.1628053548 Mar 03 02:05:36 PM PST 24 Mar 03 02:05:38 PM PST 24 25935915 ps
T890 /workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.3080577158 Mar 03 02:05:11 PM PST 24 Mar 03 02:05:13 PM PST 24 156473670 ps
T891 /workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.3563447519 Mar 03 02:05:19 PM PST 24 Mar 03 02:05:21 PM PST 24 43805607 ps
T892 /workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.2153427485 Mar 03 02:05:10 PM PST 24 Mar 03 02:05:13 PM PST 24 57219967 ps
T107 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.1742315691 Mar 03 02:05:12 PM PST 24 Mar 03 02:05:16 PM PST 24 414795499 ps
T119 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.643326472 Mar 03 02:05:25 PM PST 24 Mar 03 02:05:29 PM PST 24 58913884 ps
T893 /workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.2033372284 Mar 03 02:05:38 PM PST 24 Mar 03 02:05:39 PM PST 24 47539122 ps
T92 /workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.2713816669 Mar 03 02:05:19 PM PST 24 Mar 03 02:05:21 PM PST 24 262903567 ps
T894 /workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.2980489496 Mar 03 02:05:31 PM PST 24 Mar 03 02:05:33 PM PST 24 26461712 ps
T895 /workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.3170719573 Mar 03 02:05:26 PM PST 24 Mar 03 02:05:29 PM PST 24 23058651 ps
T112 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.1350810013 Mar 03 02:05:30 PM PST 24 Mar 03 02:05:33 PM PST 24 266098422 ps
T896 /workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.1482781065 Mar 03 02:05:18 PM PST 24 Mar 03 02:05:19 PM PST 24 46299767 ps
T897 /workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.3159738203 Mar 03 02:05:13 PM PST 24 Mar 03 02:05:18 PM PST 24 167646576 ps
T108 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.1078284178 Mar 03 02:05:12 PM PST 24 Mar 03 02:05:14 PM PST 24 209701781 ps
T120 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.3213019880 Mar 03 02:05:10 PM PST 24 Mar 03 02:05:14 PM PST 24 152615900 ps
T898 /workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.2172520625 Mar 03 02:05:13 PM PST 24 Mar 03 02:05:16 PM PST 24 239428605 ps
T899 /workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.2242348164 Mar 03 02:05:18 PM PST 24 Mar 03 02:05:19 PM PST 24 23354174 ps
T900 /workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.520411399 Mar 03 02:05:26 PM PST 24 Mar 03 02:05:28 PM PST 24 21651500 ps
T116 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.534970688 Mar 03 02:05:26 PM PST 24 Mar 03 02:05:29 PM PST 24 130383137 ps
T901 /workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.109806978 Mar 03 02:05:25 PM PST 24 Mar 03 02:05:29 PM PST 24 85990002 ps
T902 /workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.923213908 Mar 03 02:05:05 PM PST 24 Mar 03 02:05:07 PM PST 24 184603850 ps
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