T798 |
/workspace/coverage/default/24.clkmgr_lc_ctrl_intersig_mubi.19301460 |
|
|
Mar 07 12:58:14 PM PST 24 |
Mar 07 12:58:20 PM PST 24 |
17976535 ps |
T799 |
/workspace/coverage/default/36.clkmgr_extclk.1507595369 |
|
|
Mar 07 12:58:47 PM PST 24 |
Mar 07 12:58:48 PM PST 24 |
36353686 ps |
T800 |
/workspace/coverage/default/44.clkmgr_frequency.2174418427 |
|
|
Mar 07 12:58:49 PM PST 24 |
Mar 07 12:58:57 PM PST 24 |
1043468390 ps |
T801 |
/workspace/coverage/default/49.clkmgr_stress_all.894993323 |
|
|
Mar 07 12:59:06 PM PST 24 |
Mar 07 12:59:56 PM PST 24 |
7028184432 ps |
T802 |
/workspace/coverage/default/7.clkmgr_stress_all_with_rand_reset.3920083954 |
|
|
Mar 07 12:57:40 PM PST 24 |
Mar 07 01:11:02 PM PST 24 |
54221400451 ps |
T803 |
/workspace/coverage/default/44.clkmgr_stress_all_with_rand_reset.2596100698 |
|
|
Mar 07 12:58:56 PM PST 24 |
Mar 07 01:01:14 PM PST 24 |
9824741222 ps |
T804 |
/workspace/coverage/default/33.clkmgr_regwen.949090139 |
|
|
Mar 07 12:58:34 PM PST 24 |
Mar 07 12:58:41 PM PST 24 |
1133176233 ps |
T805 |
/workspace/coverage/default/20.clkmgr_stress_all_with_rand_reset.713338403 |
|
|
Mar 07 12:58:06 PM PST 24 |
Mar 07 01:00:17 PM PST 24 |
11613561540 ps |
T806 |
/workspace/coverage/default/12.clkmgr_smoke.3443069131 |
|
|
Mar 07 12:57:32 PM PST 24 |
Mar 07 12:57:33 PM PST 24 |
39355698 ps |
T807 |
/workspace/coverage/default/20.clkmgr_regwen.2677618990 |
|
|
Mar 07 12:58:07 PM PST 24 |
Mar 07 12:58:08 PM PST 24 |
222832697 ps |
T808 |
/workspace/coverage/default/45.clkmgr_frequency_timeout.720203331 |
|
|
Mar 07 12:59:02 PM PST 24 |
Mar 07 12:59:13 PM PST 24 |
1459213180 ps |
T809 |
/workspace/coverage/default/20.clkmgr_clk_handshake_intersig_mubi.2357128352 |
|
|
Mar 07 12:58:12 PM PST 24 |
Mar 07 12:58:13 PM PST 24 |
22834513 ps |
T810 |
/workspace/coverage/default/11.clkmgr_extclk.3426729680 |
|
|
Mar 07 12:57:44 PM PST 24 |
Mar 07 12:57:45 PM PST 24 |
34988682 ps |
T811 |
/workspace/coverage/default/1.clkmgr_stress_all.69248433 |
|
|
Mar 07 12:57:29 PM PST 24 |
Mar 07 12:58:13 PM PST 24 |
5968179751 ps |
T812 |
/workspace/coverage/default/35.clkmgr_frequency.736175750 |
|
|
Mar 07 12:58:39 PM PST 24 |
Mar 07 12:58:47 PM PST 24 |
1991208127 ps |
T813 |
/workspace/coverage/default/31.clkmgr_peri.145781170 |
|
|
Mar 07 12:58:24 PM PST 24 |
Mar 07 12:58:30 PM PST 24 |
32265893 ps |
T814 |
/workspace/coverage/default/38.clkmgr_frequency.2927184036 |
|
|
Mar 07 12:58:47 PM PST 24 |
Mar 07 12:58:55 PM PST 24 |
1400991273 ps |
T815 |
/workspace/coverage/default/47.clkmgr_stress_all.650131701 |
|
|
Mar 07 12:59:04 PM PST 24 |
Mar 07 12:59:20 PM PST 24 |
2298840490 ps |
T816 |
/workspace/coverage/default/32.clkmgr_stress_all_with_rand_reset.2638180699 |
|
|
Mar 07 12:58:50 PM PST 24 |
Mar 07 01:07:46 PM PST 24 |
35643843430 ps |
T817 |
/workspace/coverage/default/13.clkmgr_idle_intersig_mubi.2314023046 |
|
|
Mar 07 12:57:54 PM PST 24 |
Mar 07 12:57:55 PM PST 24 |
67176383 ps |
T818 |
/workspace/coverage/default/15.clkmgr_lc_ctrl_intersig_mubi.3668444063 |
|
|
Mar 07 12:57:46 PM PST 24 |
Mar 07 12:57:47 PM PST 24 |
19452225 ps |
T819 |
/workspace/coverage/default/10.clkmgr_trans.337732664 |
|
|
Mar 07 12:57:25 PM PST 24 |
Mar 07 12:57:26 PM PST 24 |
66521122 ps |
T820 |
/workspace/coverage/default/4.clkmgr_lc_clk_byp_req_intersig_mubi.505312237 |
|
|
Mar 07 12:57:27 PM PST 24 |
Mar 07 12:57:28 PM PST 24 |
14061335 ps |
T821 |
/workspace/coverage/default/4.clkmgr_trans.3845477591 |
|
|
Mar 07 12:57:45 PM PST 24 |
Mar 07 12:57:46 PM PST 24 |
80538012 ps |
T822 |
/workspace/coverage/default/16.clkmgr_stress_all.2940599415 |
|
|
Mar 07 12:58:14 PM PST 24 |
Mar 07 12:58:16 PM PST 24 |
204952982 ps |
T823 |
/workspace/coverage/default/2.clkmgr_lc_clk_byp_req_intersig_mubi.3945913924 |
|
|
Mar 07 12:57:15 PM PST 24 |
Mar 07 12:57:16 PM PST 24 |
55294864 ps |
T824 |
/workspace/coverage/default/40.clkmgr_idle_intersig_mubi.1510765442 |
|
|
Mar 07 12:58:37 PM PST 24 |
Mar 07 12:58:38 PM PST 24 |
33840722 ps |
T825 |
/workspace/coverage/default/13.clkmgr_trans.1736520142 |
|
|
Mar 07 12:57:41 PM PST 24 |
Mar 07 12:57:42 PM PST 24 |
109258053 ps |
T826 |
/workspace/coverage/default/8.clkmgr_div_intersig_mubi.2534847437 |
|
|
Mar 07 12:57:57 PM PST 24 |
Mar 07 12:57:58 PM PST 24 |
17469342 ps |
T827 |
/workspace/coverage/default/29.clkmgr_alert_test.1175031114 |
|
|
Mar 07 12:58:35 PM PST 24 |
Mar 07 12:58:36 PM PST 24 |
53405098 ps |
T828 |
/workspace/coverage/default/24.clkmgr_regwen.189942099 |
|
|
Mar 07 12:58:26 PM PST 24 |
Mar 07 12:58:30 PM PST 24 |
969202406 ps |
T829 |
/workspace/coverage/default/12.clkmgr_frequency.4188427 |
|
|
Mar 07 12:57:51 PM PST 24 |
Mar 07 12:58:02 PM PST 24 |
1517334955 ps |
T830 |
/workspace/coverage/default/38.clkmgr_clk_status.3448044251 |
|
|
Mar 07 12:58:21 PM PST 24 |
Mar 07 12:58:23 PM PST 24 |
137608898 ps |
T831 |
/workspace/coverage/default/10.clkmgr_stress_all.2508784881 |
|
|
Mar 07 12:57:49 PM PST 24 |
Mar 07 12:57:52 PM PST 24 |
624709373 ps |
T832 |
/workspace/coverage/default/9.clkmgr_lc_clk_byp_req_intersig_mubi.3540165994 |
|
|
Mar 07 12:57:48 PM PST 24 |
Mar 07 12:57:49 PM PST 24 |
17893421 ps |
T833 |
/workspace/coverage/default/40.clkmgr_clk_handshake_intersig_mubi.210141664 |
|
|
Mar 07 12:58:49 PM PST 24 |
Mar 07 12:58:51 PM PST 24 |
118153477 ps |
T834 |
/workspace/coverage/default/1.clkmgr_clk_status.2155573559 |
|
|
Mar 07 12:57:19 PM PST 24 |
Mar 07 12:57:20 PM PST 24 |
49916296 ps |
T835 |
/workspace/coverage/default/19.clkmgr_clk_status.4228742216 |
|
|
Mar 07 12:58:11 PM PST 24 |
Mar 07 12:58:11 PM PST 24 |
17833352 ps |
T836 |
/workspace/coverage/default/42.clkmgr_trans.3328873827 |
|
|
Mar 07 12:58:56 PM PST 24 |
Mar 07 12:58:57 PM PST 24 |
15603922 ps |
T837 |
/workspace/coverage/default/42.clkmgr_div_intersig_mubi.175648014 |
|
|
Mar 07 12:59:04 PM PST 24 |
Mar 07 12:59:05 PM PST 24 |
86066502 ps |
T838 |
/workspace/coverage/default/0.clkmgr_frequency.1721961800 |
|
|
Mar 07 12:57:16 PM PST 24 |
Mar 07 12:57:29 PM PST 24 |
2366650570 ps |
T839 |
/workspace/coverage/default/47.clkmgr_lc_ctrl_intersig_mubi.520960343 |
|
|
Mar 07 12:59:07 PM PST 24 |
Mar 07 12:59:09 PM PST 24 |
246747381 ps |
T840 |
/workspace/coverage/default/43.clkmgr_div_intersig_mubi.3016930115 |
|
|
Mar 07 12:58:57 PM PST 24 |
Mar 07 12:58:59 PM PST 24 |
255178342 ps |
T841 |
/workspace/coverage/default/45.clkmgr_extclk.1087677323 |
|
|
Mar 07 12:58:57 PM PST 24 |
Mar 07 12:58:58 PM PST 24 |
43752168 ps |
T842 |
/workspace/coverage/default/20.clkmgr_smoke.3880995977 |
|
|
Mar 07 12:58:05 PM PST 24 |
Mar 07 12:58:06 PM PST 24 |
27431355 ps |
T843 |
/workspace/coverage/default/1.clkmgr_peri.2957497471 |
|
|
Mar 07 12:57:10 PM PST 24 |
Mar 07 12:57:12 PM PST 24 |
25284576 ps |
T844 |
/workspace/coverage/default/1.clkmgr_clk_handshake_intersig_mubi.2716501123 |
|
|
Mar 07 12:57:19 PM PST 24 |
Mar 07 12:57:20 PM PST 24 |
46276418 ps |
T845 |
/workspace/coverage/default/45.clkmgr_div_intersig_mubi.2276841243 |
|
|
Mar 07 12:59:03 PM PST 24 |
Mar 07 12:59:09 PM PST 24 |
42740541 ps |
T846 |
/workspace/coverage/default/42.clkmgr_clk_status.1954900272 |
|
|
Mar 07 12:58:58 PM PST 24 |
Mar 07 12:58:59 PM PST 24 |
23488851 ps |
T847 |
/workspace/coverage/default/40.clkmgr_stress_all.1027707743 |
|
|
Mar 07 12:58:58 PM PST 24 |
Mar 07 12:59:30 PM PST 24 |
4247165488 ps |
T848 |
/workspace/coverage/default/23.clkmgr_lc_ctrl_intersig_mubi.3221584222 |
|
|
Mar 07 12:58:16 PM PST 24 |
Mar 07 12:58:27 PM PST 24 |
31909893 ps |
T849 |
/workspace/coverage/default/35.clkmgr_alert_test.3825647722 |
|
|
Mar 07 12:58:29 PM PST 24 |
Mar 07 12:58:30 PM PST 24 |
16575619 ps |
T850 |
/workspace/coverage/default/37.clkmgr_idle_intersig_mubi.1108015410 |
|
|
Mar 07 12:58:31 PM PST 24 |
Mar 07 12:58:32 PM PST 24 |
24671255 ps |
T851 |
/workspace/coverage/default/14.clkmgr_smoke.3966290800 |
|
|
Mar 07 12:57:53 PM PST 24 |
Mar 07 12:57:59 PM PST 24 |
18466876 ps |
T852 |
/workspace/coverage/default/16.clkmgr_idle_intersig_mubi.4218036737 |
|
|
Mar 07 12:58:04 PM PST 24 |
Mar 07 12:58:06 PM PST 24 |
138869871 ps |
T853 |
/workspace/coverage/cover_reg_top/32.clkmgr_intr_test.435249036 |
|
|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
39134750 ps |
T854 |
/workspace/coverage/cover_reg_top/24.clkmgr_intr_test.235223547 |
|
|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
14384211 ps |
T855 |
/workspace/coverage/cover_reg_top/40.clkmgr_intr_test.183480217 |
|
|
Mar 07 12:52:53 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
28517934 ps |
T113 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.674061907 |
|
|
Mar 07 12:52:45 PM PST 24 |
Mar 07 12:52:46 PM PST 24 |
55679992 ps |
T92 |
/workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.1560030971 |
|
|
Mar 07 12:52:35 PM PST 24 |
Mar 07 12:52:36 PM PST 24 |
36658223 ps |
T856 |
/workspace/coverage/cover_reg_top/44.clkmgr_intr_test.1315923241 |
|
|
Mar 07 12:52:53 PM PST 24 |
Mar 07 12:52:54 PM PST 24 |
18015060 ps |
T857 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.1674490487 |
|
|
Mar 07 12:52:46 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
182962949 ps |
T858 |
/workspace/coverage/cover_reg_top/6.clkmgr_intr_test.2647423528 |
|
|
Mar 07 12:52:26 PM PST 24 |
Mar 07 12:52:28 PM PST 24 |
40550664 ps |
T65 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.3502917333 |
|
|
Mar 07 12:52:48 PM PST 24 |
Mar 07 12:52:49 PM PST 24 |
49672341 ps |
T859 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.862660313 |
|
|
Mar 07 12:52:35 PM PST 24 |
Mar 07 12:52:39 PM PST 24 |
373718084 ps |
T93 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.850582634 |
|
|
Mar 07 12:52:46 PM PST 24 |
Mar 07 12:52:47 PM PST 24 |
22507765 ps |
T860 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.194526680 |
|
|
Mar 07 12:52:44 PM PST 24 |
Mar 07 12:52:47 PM PST 24 |
358479152 ps |
T861 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.4181639170 |
|
|
Mar 07 12:52:28 PM PST 24 |
Mar 07 12:52:29 PM PST 24 |
67349610 ps |
T66 |
/workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.3240174430 |
|
|
Mar 07 12:52:50 PM PST 24 |
Mar 07 12:52:52 PM PST 24 |
79885574 ps |
T94 |
/workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.4210198722 |
|
|
Mar 07 12:52:48 PM PST 24 |
Mar 07 12:52:50 PM PST 24 |
153292828 ps |
T67 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.1801252843 |
|
|
Mar 07 12:52:38 PM PST 24 |
Mar 07 12:52:43 PM PST 24 |
468858368 ps |
T862 |
/workspace/coverage/cover_reg_top/25.clkmgr_intr_test.939128438 |
|
|
Mar 07 12:52:47 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
11609259 ps |
T95 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.2108122964 |
|
|
Mar 07 12:52:48 PM PST 24 |
Mar 07 12:52:50 PM PST 24 |
71498941 ps |
T68 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.2503991069 |
|
|
Mar 07 12:52:42 PM PST 24 |
Mar 07 12:52:44 PM PST 24 |
64509350 ps |
T863 |
/workspace/coverage/cover_reg_top/17.clkmgr_intr_test.1626541388 |
|
|
Mar 07 12:52:55 PM PST 24 |
Mar 07 12:52:56 PM PST 24 |
15105448 ps |
T864 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.89935056 |
|
|
Mar 07 12:52:31 PM PST 24 |
Mar 07 12:52:36 PM PST 24 |
226917181 ps |
T96 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.207067159 |
|
|
Mar 07 12:52:35 PM PST 24 |
Mar 07 12:52:36 PM PST 24 |
17377629 ps |
T97 |
/workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.4129907196 |
|
|
Mar 07 12:52:25 PM PST 24 |
Mar 07 12:52:26 PM PST 24 |
51632523 ps |
T98 |
/workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.1929485081 |
|
|
Mar 07 12:52:50 PM PST 24 |
Mar 07 12:52:52 PM PST 24 |
92679717 ps |
T69 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.826518941 |
|
|
Mar 07 12:52:36 PM PST 24 |
Mar 07 12:52:40 PM PST 24 |
389843728 ps |
T865 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.1385463133 |
|
|
Mar 07 12:52:34 PM PST 24 |
Mar 07 12:52:37 PM PST 24 |
392517518 ps |
T866 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.3264113240 |
|
|
Mar 07 12:52:50 PM PST 24 |
Mar 07 12:52:52 PM PST 24 |
86574682 ps |
T867 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.2592105077 |
|
|
Mar 07 12:52:47 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
46867056 ps |
T70 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.2726139210 |
|
|
Mar 07 12:52:33 PM PST 24 |
Mar 07 12:52:35 PM PST 24 |
62264111 ps |
T868 |
/workspace/coverage/cover_reg_top/9.clkmgr_intr_test.2561509213 |
|
|
Mar 07 12:52:37 PM PST 24 |
Mar 07 12:52:37 PM PST 24 |
46171926 ps |
T869 |
/workspace/coverage/cover_reg_top/28.clkmgr_intr_test.1396534756 |
|
|
Mar 07 12:53:01 PM PST 24 |
Mar 07 12:53:01 PM PST 24 |
27873746 ps |
T870 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.1746946350 |
|
|
Mar 07 12:52:37 PM PST 24 |
Mar 07 12:52:39 PM PST 24 |
98424395 ps |
T107 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.257093752 |
|
|
Mar 07 12:52:18 PM PST 24 |
Mar 07 12:52:21 PM PST 24 |
145809984 ps |
T871 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.3857131201 |
|
|
Mar 07 12:52:30 PM PST 24 |
Mar 07 12:52:31 PM PST 24 |
38690455 ps |
T71 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.2676853894 |
|
|
Mar 07 12:52:38 PM PST 24 |
Mar 07 12:52:41 PM PST 24 |
132455361 ps |
T872 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.3286022624 |
|
|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
79094181 ps |
T873 |
/workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.2801216219 |
|
|
Mar 07 12:52:54 PM PST 24 |
Mar 07 12:52:55 PM PST 24 |
54331036 ps |
T72 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.877977866 |
|
|
Mar 07 12:52:15 PM PST 24 |
Mar 07 12:52:16 PM PST 24 |
68973409 ps |
T73 |
/workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.115276385 |
|
|
Mar 07 12:52:40 PM PST 24 |
Mar 07 12:52:42 PM PST 24 |
112397118 ps |
T108 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.4100178248 |
|
|
Mar 07 12:52:24 PM PST 24 |
Mar 07 12:52:27 PM PST 24 |
105003196 ps |
T75 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.2585214341 |
|
|
Mar 07 12:52:43 PM PST 24 |
Mar 07 12:52:45 PM PST 24 |
160240213 ps |
T874 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.2865113272 |
|
|
Mar 07 12:52:41 PM PST 24 |
Mar 07 12:52:45 PM PST 24 |
157736337 ps |
T875 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.305749921 |
|
|
Mar 07 12:52:55 PM PST 24 |
Mar 07 12:52:56 PM PST 24 |
145782814 ps |
T876 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.4232557357 |
|
|
Mar 07 12:52:14 PM PST 24 |
Mar 07 12:52:15 PM PST 24 |
23779933 ps |
T877 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.2222401854 |
|
|
Mar 07 12:52:29 PM PST 24 |
Mar 07 12:52:30 PM PST 24 |
61536693 ps |
T878 |
/workspace/coverage/cover_reg_top/22.clkmgr_intr_test.2609237576 |
|
|
Mar 07 12:52:54 PM PST 24 |
Mar 07 12:52:55 PM PST 24 |
34975965 ps |
T74 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.732682676 |
|
|
Mar 07 12:52:15 PM PST 24 |
Mar 07 12:52:18 PM PST 24 |
148641924 ps |
T879 |
/workspace/coverage/cover_reg_top/11.clkmgr_intr_test.4195550889 |
|
|
Mar 07 12:52:47 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
35243177 ps |
T134 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.2323630215 |
|
|
Mar 07 12:52:53 PM PST 24 |
Mar 07 12:52:56 PM PST 24 |
412958141 ps |
T880 |
/workspace/coverage/cover_reg_top/47.clkmgr_intr_test.10674775 |
|
|
Mar 07 12:53:05 PM PST 24 |
Mar 07 12:53:06 PM PST 24 |
34817277 ps |
T881 |
/workspace/coverage/cover_reg_top/43.clkmgr_intr_test.4155120619 |
|
|
Mar 07 12:52:48 PM PST 24 |
Mar 07 12:52:50 PM PST 24 |
27121736 ps |
T144 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.1301560948 |
|
|
Mar 07 12:52:47 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
1124420798 ps |
T882 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.4155439586 |
|
|
Mar 07 12:52:36 PM PST 24 |
Mar 07 12:52:37 PM PST 24 |
38454850 ps |
T883 |
/workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.3603114888 |
|
|
Mar 07 12:52:39 PM PST 24 |
Mar 07 12:52:42 PM PST 24 |
759174419 ps |
T884 |
/workspace/coverage/cover_reg_top/12.clkmgr_intr_test.811146955 |
|
|
Mar 07 12:52:39 PM PST 24 |
Mar 07 12:52:40 PM PST 24 |
21827088 ps |
T885 |
/workspace/coverage/cover_reg_top/46.clkmgr_intr_test.1916678506 |
|
|
Mar 07 12:52:44 PM PST 24 |
Mar 07 12:52:45 PM PST 24 |
34872139 ps |
T886 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.35059874 |
|
|
Mar 07 12:52:54 PM PST 24 |
Mar 07 12:52:57 PM PST 24 |
543897487 ps |
T887 |
/workspace/coverage/cover_reg_top/15.clkmgr_intr_test.2091113705 |
|
|
Mar 07 12:52:47 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
12362940 ps |
T109 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.2910983900 |
|
|
Mar 07 12:52:18 PM PST 24 |
Mar 07 12:52:21 PM PST 24 |
202696413 ps |
T888 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.3743940067 |
|
|
Mar 07 12:52:31 PM PST 24 |
Mar 07 12:52:33 PM PST 24 |
55990574 ps |
T889 |
/workspace/coverage/cover_reg_top/19.clkmgr_intr_test.2087007680 |
|
|
Mar 07 12:52:55 PM PST 24 |
Mar 07 12:52:56 PM PST 24 |
13802262 ps |
T890 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.1009824556 |
|
|
Mar 07 12:52:31 PM PST 24 |
Mar 07 12:52:33 PM PST 24 |
40855930 ps |
T891 |
/workspace/coverage/cover_reg_top/36.clkmgr_intr_test.3689088987 |
|
|
Mar 07 12:52:51 PM PST 24 |
Mar 07 12:52:52 PM PST 24 |
10788158 ps |
T892 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.1877868173 |
|
|
Mar 07 12:52:28 PM PST 24 |
Mar 07 12:52:30 PM PST 24 |
64428454 ps |
T135 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.1953382250 |
|
|
Mar 07 12:52:37 PM PST 24 |
Mar 07 12:52:39 PM PST 24 |
123719250 ps |
T893 |
/workspace/coverage/cover_reg_top/48.clkmgr_intr_test.3858996132 |
|
|
Mar 07 12:53:06 PM PST 24 |
Mar 07 12:53:07 PM PST 24 |
49144433 ps |
T894 |
/workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.220276370 |
|
|
Mar 07 12:52:46 PM PST 24 |
Mar 07 12:52:47 PM PST 24 |
73890164 ps |
T895 |
/workspace/coverage/cover_reg_top/37.clkmgr_intr_test.2344841961 |
|
|
Mar 07 12:52:53 PM PST 24 |
Mar 07 12:52:54 PM PST 24 |
26162843 ps |
T896 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.1108735786 |
|
|
Mar 07 12:52:41 PM PST 24 |
Mar 07 12:52:43 PM PST 24 |
37597243 ps |
T110 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.1196006876 |
|
|
Mar 07 12:52:49 PM PST 24 |
Mar 07 12:52:51 PM PST 24 |
137563288 ps |
T897 |
/workspace/coverage/cover_reg_top/33.clkmgr_intr_test.2303244487 |
|
|
Mar 07 12:52:43 PM PST 24 |
Mar 07 12:52:44 PM PST 24 |
14878110 ps |
T138 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.1782083618 |
|
|
Mar 07 12:52:38 PM PST 24 |
Mar 07 12:52:40 PM PST 24 |
62992569 ps |
T898 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.1827766082 |
|
|
Mar 07 12:52:53 PM PST 24 |
Mar 07 12:52:54 PM PST 24 |
17910041 ps |
T899 |
/workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.1085006561 |
|
|
Mar 07 12:52:36 PM PST 24 |
Mar 07 12:52:37 PM PST 24 |
20926605 ps |
T900 |
/workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.940112079 |
|
|
Mar 07 12:52:33 PM PST 24 |
Mar 07 12:52:34 PM PST 24 |
32754231 ps |
T901 |
/workspace/coverage/cover_reg_top/20.clkmgr_intr_test.1500805082 |
|
|
Mar 07 12:52:56 PM PST 24 |
Mar 07 12:52:57 PM PST 24 |
10768837 ps |
T136 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.1371195448 |
|
|
Mar 07 12:52:56 PM PST 24 |
Mar 07 12:52:58 PM PST 24 |
72373503 ps |
T902 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.760333617 |
|
|
Mar 07 12:52:53 PM PST 24 |
Mar 07 12:52:54 PM PST 24 |
64312415 ps |
T903 |
/workspace/coverage/cover_reg_top/8.clkmgr_intr_test.3644275806 |
|
|
Mar 07 12:52:50 PM PST 24 |
Mar 07 12:52:51 PM PST 24 |
36186948 ps |
T137 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.174544116 |
|
|
Mar 07 12:52:37 PM PST 24 |
Mar 07 12:52:39 PM PST 24 |
86372190 ps |
T143 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.3937189659 |
|
|
Mar 07 12:52:53 PM PST 24 |
Mar 07 12:52:55 PM PST 24 |
107086481 ps |
T904 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.3170682690 |
|
|
Mar 07 12:52:15 PM PST 24 |
Mar 07 12:52:16 PM PST 24 |
17675660 ps |
T905 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.1126533758 |
|
|
Mar 07 12:52:39 PM PST 24 |
Mar 07 12:52:40 PM PST 24 |
63525594 ps |
T117 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.2716749306 |
|
|
Mar 07 12:52:49 PM PST 24 |
Mar 07 12:52:52 PM PST 24 |
145514150 ps |
T906 |
/workspace/coverage/cover_reg_top/2.clkmgr_intr_test.1584577638 |
|
|
Mar 07 12:52:44 PM PST 24 |
Mar 07 12:52:45 PM PST 24 |
15498571 ps |
T907 |
/workspace/coverage/cover_reg_top/1.clkmgr_intr_test.3664825051 |
|
|
Mar 07 12:52:29 PM PST 24 |
Mar 07 12:52:30 PM PST 24 |
51768482 ps |
T145 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.632428904 |
|
|
Mar 07 12:52:38 PM PST 24 |
Mar 07 12:52:39 PM PST 24 |
66179341 ps |
T139 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.1699643124 |
|
|
Mar 07 12:52:44 PM PST 24 |
Mar 07 12:52:46 PM PST 24 |
120822097 ps |
T908 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.2695417338 |
|
|
Mar 07 12:52:20 PM PST 24 |
Mar 07 12:52:21 PM PST 24 |
26658184 ps |
T909 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.583628892 |
|
|
Mar 07 12:52:43 PM PST 24 |
Mar 07 12:52:45 PM PST 24 |
73914720 ps |
T910 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.3549610008 |
|
|
Mar 07 12:52:31 PM PST 24 |
Mar 07 12:52:36 PM PST 24 |
383508704 ps |
T911 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.4049078309 |
|
|
Mar 07 12:52:45 PM PST 24 |
Mar 07 12:52:47 PM PST 24 |
39209163 ps |
T912 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.563139385 |
|
|
Mar 07 12:53:18 PM PST 24 |
Mar 07 12:53:19 PM PST 24 |
32791232 ps |
T913 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.951326760 |
|
|
Mar 07 12:52:43 PM PST 24 |
Mar 07 12:52:44 PM PST 24 |
18206696 ps |
T914 |
/workspace/coverage/cover_reg_top/38.clkmgr_intr_test.2244713829 |
|
|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
32590862 ps |
T915 |
/workspace/coverage/cover_reg_top/10.clkmgr_intr_test.3719002894 |
|
|
Mar 07 12:52:44 PM PST 24 |
Mar 07 12:52:45 PM PST 24 |
25500057 ps |
T916 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.2643016215 |
|
|
Mar 07 12:52:39 PM PST 24 |
Mar 07 12:52:41 PM PST 24 |
72680003 ps |
T917 |
/workspace/coverage/cover_reg_top/4.clkmgr_intr_test.4080634139 |
|
|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
15182203 ps |
T918 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.2561308495 |
|
|
Mar 07 12:52:34 PM PST 24 |
Mar 07 12:52:36 PM PST 24 |
130575955 ps |
T116 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.2374703195 |
|
|
Mar 07 12:52:48 PM PST 24 |
Mar 07 12:52:51 PM PST 24 |
143952292 ps |
T146 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.4218167050 |
|
|
Mar 07 12:52:34 PM PST 24 |
Mar 07 12:52:37 PM PST 24 |
290618426 ps |
T919 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.2512551917 |
|
|
Mar 07 12:52:34 PM PST 24 |
Mar 07 12:52:36 PM PST 24 |
75254979 ps |
T920 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.1753006327 |
|
|
Mar 07 12:52:48 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
14785629 ps |
T921 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.1450557242 |
|
|
Mar 07 12:52:24 PM PST 24 |
Mar 07 12:52:31 PM PST 24 |
73851125 ps |
T922 |
/workspace/coverage/cover_reg_top/26.clkmgr_intr_test.1028960373 |
|
|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
32601710 ps |
T923 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.697723426 |
|
|
Mar 07 12:52:58 PM PST 24 |
Mar 07 12:52:59 PM PST 24 |
28984603 ps |
T924 |
/workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.795749830 |
|
|
Mar 07 12:52:50 PM PST 24 |
Mar 07 12:52:51 PM PST 24 |
29926604 ps |
T925 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.84267453 |
|
|
Mar 07 12:52:45 PM PST 24 |
Mar 07 12:52:47 PM PST 24 |
23626590 ps |
T926 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.879082676 |
|
|
Mar 07 12:52:34 PM PST 24 |
Mar 07 12:52:36 PM PST 24 |
43379361 ps |
T927 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.2606252818 |
|
|
Mar 07 12:52:47 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
17497102 ps |
T141 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.3176806629 |
|
|
Mar 07 12:52:46 PM PST 24 |
Mar 07 12:52:50 PM PST 24 |
174162135 ps |
T928 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.4075232013 |
|
|
Mar 07 12:52:17 PM PST 24 |
Mar 07 12:52:18 PM PST 24 |
41785817 ps |
T929 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.4050329564 |
|
|
Mar 07 12:52:54 PM PST 24 |
Mar 07 12:52:55 PM PST 24 |
12793200 ps |
T930 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.3753561556 |
|
|
Mar 07 12:52:30 PM PST 24 |
Mar 07 12:52:35 PM PST 24 |
351204858 ps |
T111 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.2141867266 |
|
|
Mar 07 12:52:46 PM PST 24 |
Mar 07 12:52:52 PM PST 24 |
1250481027 ps |
T931 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.1207022162 |
|
|
Mar 07 12:52:41 PM PST 24 |
Mar 07 12:52:43 PM PST 24 |
72390361 ps |
T932 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.2933251307 |
|
|
Mar 07 12:52:24 PM PST 24 |
Mar 07 12:52:30 PM PST 24 |
939582297 ps |
T140 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.1838980269 |
|
|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:54 PM PST 24 |
90493818 ps |
T933 |
/workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.1837848120 |
|
|
Mar 07 12:52:46 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
216070825 ps |
T934 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.1319187451 |
|
|
Mar 07 12:52:53 PM PST 24 |
Mar 07 12:52:57 PM PST 24 |
129623358 ps |
T935 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.889681197 |
|
|
Mar 07 12:52:50 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
163681426 ps |
T936 |
/workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.2636021775 |
|
|
Mar 07 12:52:20 PM PST 24 |
Mar 07 12:52:21 PM PST 24 |
68105541 ps |
T937 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.1908686952 |
|
|
Mar 07 12:52:33 PM PST 24 |
Mar 07 12:52:35 PM PST 24 |
66715982 ps |
T938 |
/workspace/coverage/cover_reg_top/30.clkmgr_intr_test.1957724595 |
|
|
Mar 07 12:52:48 PM PST 24 |
Mar 07 12:52:49 PM PST 24 |
16964138 ps |
T939 |
/workspace/coverage/cover_reg_top/16.clkmgr_intr_test.4035253380 |
|
|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:54 PM PST 24 |
120656559 ps |
T940 |
/workspace/coverage/cover_reg_top/14.clkmgr_intr_test.2465425287 |
|
|
Mar 07 12:52:38 PM PST 24 |
Mar 07 12:52:39 PM PST 24 |
12225747 ps |
T173 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.1312607482 |
|
|
Mar 07 12:52:50 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
331942339 ps |
T941 |
/workspace/coverage/cover_reg_top/45.clkmgr_intr_test.2055704385 |
|
|
Mar 07 12:53:07 PM PST 24 |
Mar 07 12:53:08 PM PST 24 |
18733753 ps |
T942 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.2585470782 |
|
|
Mar 07 12:53:09 PM PST 24 |
Mar 07 12:53:12 PM PST 24 |
234505512 ps |
T943 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.1928850246 |
|
|
Mar 07 12:52:32 PM PST 24 |
Mar 07 12:52:33 PM PST 24 |
29931900 ps |
T114 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.1698559524 |
|
|
Mar 07 12:52:47 PM PST 24 |
Mar 07 12:52:51 PM PST 24 |
281378673 ps |
T944 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.2319741803 |
|
|
Mar 07 12:52:48 PM PST 24 |
Mar 07 12:52:50 PM PST 24 |
36059520 ps |
T945 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.4166352069 |
|
|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:55 PM PST 24 |
216105185 ps |
T946 |
/workspace/coverage/cover_reg_top/49.clkmgr_intr_test.1429696471 |
|
|
Mar 07 12:53:12 PM PST 24 |
Mar 07 12:53:13 PM PST 24 |
96559968 ps |
T142 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.622614619 |
|
|
Mar 07 12:52:06 PM PST 24 |
Mar 07 12:52:08 PM PST 24 |
131137544 ps |
T947 |
/workspace/coverage/cover_reg_top/34.clkmgr_intr_test.4118556857 |
|
|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
33753526 ps |
T948 |
/workspace/coverage/cover_reg_top/31.clkmgr_intr_test.786051417 |
|
|
Mar 07 12:52:50 PM PST 24 |
Mar 07 12:52:51 PM PST 24 |
13834249 ps |
T949 |
/workspace/coverage/cover_reg_top/42.clkmgr_intr_test.875351605 |
|
|
Mar 07 12:52:53 PM PST 24 |
Mar 07 12:52:54 PM PST 24 |
13851811 ps |
T950 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.716005682 |
|
|
Mar 07 12:52:48 PM PST 24 |
Mar 07 12:52:50 PM PST 24 |
19545997 ps |
T951 |
/workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.1609253962 |
|
|
Mar 07 12:52:34 PM PST 24 |
Mar 07 12:52:35 PM PST 24 |
64432781 ps |
T112 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.3549263328 |
|
|
Mar 07 12:52:45 PM PST 24 |
Mar 07 12:52:49 PM PST 24 |
131916180 ps |
T952 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.2855512827 |
|
|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:55 PM PST 24 |
82750852 ps |
T953 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_errors.1857605243 |
|
|
Mar 07 12:52:15 PM PST 24 |
Mar 07 12:52:17 PM PST 24 |
56964291 ps |
T954 |
/workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.2279958973 |
|
|
Mar 07 12:52:47 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
70275576 ps |
T955 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.1569510074 |
|
|
Mar 07 12:52:50 PM PST 24 |
Mar 07 12:52:52 PM PST 24 |
128646845 ps |
T956 |
/workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.2814285695 |
|
|
Mar 07 12:52:49 PM PST 24 |
Mar 07 12:52:50 PM PST 24 |
95328702 ps |
T118 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.1051263538 |
|
|
Mar 07 12:52:45 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
219410134 ps |
T957 |
/workspace/coverage/cover_reg_top/13.clkmgr_intr_test.4126951060 |
|
|
Mar 07 12:52:46 PM PST 24 |
Mar 07 12:52:47 PM PST 24 |
23348705 ps |
T958 |
/workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.3825287131 |
|
|
Mar 07 12:52:07 PM PST 24 |
Mar 07 12:52:09 PM PST 24 |
83093777 ps |
T959 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.3338687322 |
|
|
Mar 07 12:52:45 PM PST 24 |
Mar 07 12:52:46 PM PST 24 |
14025577 ps |
T960 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.1879795726 |
|
|
Mar 07 12:52:47 PM PST 24 |
Mar 07 12:52:50 PM PST 24 |
137650058 ps |
T961 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.2974431872 |
|
|
Mar 07 12:52:46 PM PST 24 |
Mar 07 12:52:49 PM PST 24 |
116856516 ps |
T119 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.887398293 |
|
|
Mar 07 12:52:49 PM PST 24 |
Mar 07 12:52:51 PM PST 24 |
66270004 ps |
T962 |
/workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.3050540620 |
|
|
Mar 07 12:52:35 PM PST 24 |
Mar 07 12:52:37 PM PST 24 |
30090133 ps |
T963 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.2066720233 |
|
|
Mar 07 12:53:19 PM PST 24 |
Mar 07 12:53:22 PM PST 24 |
186152504 ps |
T964 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.1356940634 |
|
|
Mar 07 12:52:34 PM PST 24 |
Mar 07 12:52:37 PM PST 24 |
365679181 ps |
T965 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.1147203771 |
|
|
Mar 07 12:52:42 PM PST 24 |
Mar 07 12:52:47 PM PST 24 |
214992319 ps |
T120 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.1962759841 |
|
|
Mar 07 12:52:39 PM PST 24 |
Mar 07 12:52:40 PM PST 24 |
77545986 ps |
T966 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.2917295745 |
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|
Mar 07 12:52:43 PM PST 24 |
Mar 07 12:52:44 PM PST 24 |
239867359 ps |
T967 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.1312649448 |
|
|
Mar 07 12:52:28 PM PST 24 |
Mar 07 12:52:30 PM PST 24 |
90316047 ps |
T968 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.1362813409 |
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|
Mar 07 12:52:18 PM PST 24 |
Mar 07 12:52:19 PM PST 24 |
37439443 ps |
T969 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.3268154749 |
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|
Mar 07 12:52:29 PM PST 24 |
Mar 07 12:52:32 PM PST 24 |
225387859 ps |
T970 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.2351905898 |
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|
Mar 07 12:52:46 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
66144653 ps |
T971 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.3546956679 |
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|
Mar 07 12:52:48 PM PST 24 |
Mar 07 12:52:51 PM PST 24 |
85708409 ps |
T972 |
/workspace/coverage/cover_reg_top/3.clkmgr_intr_test.909228531 |
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|
Mar 07 12:52:25 PM PST 24 |
Mar 07 12:52:26 PM PST 24 |
29388750 ps |
T973 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.1663001517 |
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|
Mar 07 12:53:04 PM PST 24 |
Mar 07 12:53:06 PM PST 24 |
178508934 ps |
T974 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.3134808170 |
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|
Mar 07 12:52:31 PM PST 24 |
Mar 07 12:52:36 PM PST 24 |
517766687 ps |
T121 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.241767994 |
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|
Mar 07 12:52:34 PM PST 24 |
Mar 07 12:52:35 PM PST 24 |
58885893 ps |
T975 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.3414783942 |
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|
Mar 07 12:52:18 PM PST 24 |
Mar 07 12:52:21 PM PST 24 |
208491247 ps |
T976 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.2869761682 |
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|
Mar 07 12:52:44 PM PST 24 |
Mar 07 12:52:46 PM PST 24 |
298869848 ps |
T977 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.3029206115 |
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|
Mar 07 12:52:47 PM PST 24 |
Mar 07 12:52:48 PM PST 24 |
23114886 ps |
T978 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.3204523189 |
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|
Mar 07 12:52:25 PM PST 24 |
Mar 07 12:52:28 PM PST 24 |
143066853 ps |
T979 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.3771591882 |
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|
Mar 07 12:52:41 PM PST 24 |
Mar 07 12:52:42 PM PST 24 |
96340649 ps |
T980 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.331690015 |
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|
Mar 07 12:52:47 PM PST 24 |
Mar 07 12:52:50 PM PST 24 |
203743413 ps |
T981 |
/workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.2600512211 |
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|
Mar 07 12:52:54 PM PST 24 |
Mar 07 12:52:56 PM PST 24 |
159356812 ps |
T982 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.1106302997 |
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|
Mar 07 12:52:15 PM PST 24 |
Mar 07 12:52:16 PM PST 24 |
33671486 ps |
T983 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.694699367 |
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|
Mar 07 12:52:18 PM PST 24 |
Mar 07 12:52:21 PM PST 24 |
126063744 ps |
T984 |
/workspace/coverage/cover_reg_top/0.clkmgr_intr_test.3987902197 |
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|
Mar 07 12:52:28 PM PST 24 |
Mar 07 12:52:29 PM PST 24 |
11779520 ps |
T985 |
/workspace/coverage/cover_reg_top/41.clkmgr_intr_test.3685502432 |
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|
Mar 07 12:53:10 PM PST 24 |
Mar 07 12:53:10 PM PST 24 |
13477229 ps |
T986 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.709161091 |
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|
Mar 07 12:52:31 PM PST 24 |
Mar 07 12:52:41 PM PST 24 |
2425116462 ps |
T987 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.668898832 |
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|
Mar 07 12:52:56 PM PST 24 |
Mar 07 12:52:57 PM PST 24 |
36839954 ps |
T115 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.364931297 |
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|
Mar 07 12:52:43 PM PST 24 |
Mar 07 12:52:45 PM PST 24 |
104472657 ps |
T988 |
/workspace/coverage/cover_reg_top/35.clkmgr_intr_test.2796282661 |
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|
Mar 07 12:52:51 PM PST 24 |
Mar 07 12:52:52 PM PST 24 |
11767032 ps |
T989 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.3054837886 |
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|
Mar 07 12:53:04 PM PST 24 |
Mar 07 12:53:06 PM PST 24 |
210612349 ps |
T990 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.22278280 |
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|
Mar 07 12:52:24 PM PST 24 |
Mar 07 12:52:25 PM PST 24 |
18462943 ps |
T991 |
/workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.542700139 |
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|
Mar 07 12:52:35 PM PST 24 |
Mar 07 12:52:37 PM PST 24 |
130720873 ps |
T992 |
/workspace/coverage/cover_reg_top/21.clkmgr_intr_test.302359429 |
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|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
14130106 ps |
T993 |
/workspace/coverage/cover_reg_top/27.clkmgr_intr_test.483351541 |
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|
Mar 07 12:52:49 PM PST 24 |
Mar 07 12:52:50 PM PST 24 |
11991896 ps |
T994 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.2346420993 |
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|
Mar 07 12:52:31 PM PST 24 |
Mar 07 12:52:34 PM PST 24 |
129778702 ps |
T995 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.1608103210 |
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|
Mar 07 12:52:59 PM PST 24 |
Mar 07 12:53:02 PM PST 24 |
241180923 ps |
T996 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.2503286557 |
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|
Mar 07 12:52:27 PM PST 24 |
Mar 07 12:52:28 PM PST 24 |
24837983 ps |
T997 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.3852326749 |
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|
Mar 07 12:52:28 PM PST 24 |
Mar 07 12:52:30 PM PST 24 |
136242443 ps |
T998 |
/workspace/coverage/cover_reg_top/29.clkmgr_intr_test.1110852424 |
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|
Mar 07 12:52:58 PM PST 24 |
Mar 07 12:52:59 PM PST 24 |
30526874 ps |
T999 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.659944473 |
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|
Mar 07 12:52:25 PM PST 24 |
Mar 07 12:52:26 PM PST 24 |
217473636 ps |
T1000 |
/workspace/coverage/cover_reg_top/39.clkmgr_intr_test.4162840302 |
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|
Mar 07 12:52:52 PM PST 24 |
Mar 07 12:52:53 PM PST 24 |
34565563 ps |