Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.45 99.11 95.67 100.00 100.00 98.71 97.01 98.63


Total test records in report: 1010
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T798 /workspace/coverage/default/10.clkmgr_clk_handshake_intersig_mubi.1107403372 Mar 10 01:45:48 PM PDT 24 Mar 10 01:45:49 PM PDT 24 86900560 ps
T799 /workspace/coverage/default/0.clkmgr_frequency_timeout.1739264254 Mar 10 01:44:18 PM PDT 24 Mar 10 01:44:19 PM PDT 24 272682919 ps
T800 /workspace/coverage/default/23.clkmgr_alert_test.2042860348 Mar 10 01:46:58 PM PDT 24 Mar 10 01:47:00 PM PDT 24 44707005 ps
T801 /workspace/coverage/default/21.clkmgr_lc_clk_byp_req_intersig_mubi.3512847449 Mar 10 01:46:47 PM PDT 24 Mar 10 01:46:48 PM PDT 24 74039190 ps
T802 /workspace/coverage/default/2.clkmgr_trans.2779901894 Mar 10 01:44:44 PM PDT 24 Mar 10 01:44:45 PM PDT 24 56092424 ps
T803 /workspace/coverage/default/23.clkmgr_extclk.2380891262 Mar 10 01:46:53 PM PDT 24 Mar 10 01:46:54 PM PDT 24 36646746 ps
T804 /workspace/coverage/default/29.clkmgr_trans.4009778852 Mar 10 01:47:26 PM PDT 24 Mar 10 01:47:27 PM PDT 24 29262434 ps
T805 /workspace/coverage/default/10.clkmgr_peri.1379673351 Mar 10 01:45:48 PM PDT 24 Mar 10 01:45:49 PM PDT 24 21324346 ps
T806 /workspace/coverage/default/2.clkmgr_stress_all.2312041446 Mar 10 01:44:58 PM PDT 24 Mar 10 01:45:13 PM PDT 24 2146380164 ps
T807 /workspace/coverage/default/45.clkmgr_div_intersig_mubi.1178473590 Mar 10 01:48:30 PM PDT 24 Mar 10 01:48:31 PM PDT 24 15619091 ps
T808 /workspace/coverage/default/48.clkmgr_frequency.1693880667 Mar 10 01:48:40 PM PDT 24 Mar 10 01:48:55 PM PDT 24 1875605450 ps
T809 /workspace/coverage/default/28.clkmgr_stress_all.1932392638 Mar 10 01:47:23 PM PDT 24 Mar 10 01:47:25 PM PDT 24 187242739 ps
T810 /workspace/coverage/default/13.clkmgr_regwen.733724040 Mar 10 01:46:10 PM PDT 24 Mar 10 01:46:16 PM PDT 24 1374265815 ps
T811 /workspace/coverage/default/45.clkmgr_frequency_timeout.2410663506 Mar 10 01:48:26 PM PDT 24 Mar 10 01:48:38 PM PDT 24 2308688624 ps
T812 /workspace/coverage/default/6.clkmgr_clk_handshake_intersig_mubi.3141508290 Mar 10 01:45:21 PM PDT 24 Mar 10 01:45:23 PM PDT 24 108924974 ps
T813 /workspace/coverage/default/15.clkmgr_peri.1546716179 Mar 10 01:46:15 PM PDT 24 Mar 10 01:46:16 PM PDT 24 25308234 ps
T814 /workspace/coverage/default/12.clkmgr_frequency_timeout.1708549420 Mar 10 01:46:00 PM PDT 24 Mar 10 01:46:05 PM PDT 24 615648198 ps
T815 /workspace/coverage/default/31.clkmgr_lc_clk_byp_req_intersig_mubi.4106473178 Mar 10 01:47:31 PM PDT 24 Mar 10 01:47:32 PM PDT 24 50047127 ps
T816 /workspace/coverage/default/6.clkmgr_frequency_timeout.2009037154 Mar 10 01:45:22 PM PDT 24 Mar 10 01:45:32 PM PDT 24 1461860099 ps
T817 /workspace/coverage/default/5.clkmgr_lc_ctrl_intersig_mubi.361056151 Mar 10 01:45:11 PM PDT 24 Mar 10 01:45:12 PM PDT 24 27176652 ps
T818 /workspace/coverage/default/27.clkmgr_smoke.2028752057 Mar 10 01:47:20 PM PDT 24 Mar 10 01:47:22 PM PDT 24 346114710 ps
T819 /workspace/coverage/default/31.clkmgr_stress_all_with_rand_reset.2705249935 Mar 10 01:47:53 PM PDT 24 Mar 10 01:56:32 PM PDT 24 29242873450 ps
T820 /workspace/coverage/default/43.clkmgr_clk_status.3601887875 Mar 10 01:48:21 PM PDT 24 Mar 10 01:48:22 PM PDT 24 24887126 ps
T821 /workspace/coverage/default/31.clkmgr_div_intersig_mubi.2606748193 Mar 10 01:47:36 PM PDT 24 Mar 10 01:47:37 PM PDT 24 26998016 ps
T822 /workspace/coverage/default/25.clkmgr_alert_test.3321279609 Mar 10 01:47:02 PM PDT 24 Mar 10 01:47:04 PM PDT 24 22275330 ps
T50 /workspace/coverage/default/4.clkmgr_sec_cm.3945532716 Mar 10 01:45:05 PM PDT 24 Mar 10 01:45:09 PM PDT 24 663690608 ps
T823 /workspace/coverage/default/26.clkmgr_lc_clk_byp_req_intersig_mubi.4190533965 Mar 10 01:47:07 PM PDT 24 Mar 10 01:47:08 PM PDT 24 37626445 ps
T824 /workspace/coverage/default/27.clkmgr_lc_ctrl_intersig_mubi.4263892911 Mar 10 01:47:19 PM PDT 24 Mar 10 01:47:21 PM PDT 24 24716157 ps
T825 /workspace/coverage/default/21.clkmgr_idle_intersig_mubi.284379853 Mar 10 01:46:46 PM PDT 24 Mar 10 01:46:48 PM PDT 24 111066270 ps
T826 /workspace/coverage/default/20.clkmgr_frequency.3436517550 Mar 10 01:46:42 PM PDT 24 Mar 10 01:46:45 PM PDT 24 317736539 ps
T827 /workspace/coverage/default/9.clkmgr_alert_test.264624270 Mar 10 01:45:44 PM PDT 24 Mar 10 01:45:46 PM PDT 24 14976087 ps
T828 /workspace/coverage/default/34.clkmgr_smoke.3188837759 Mar 10 01:47:40 PM PDT 24 Mar 10 01:47:41 PM PDT 24 24340267 ps
T829 /workspace/coverage/default/22.clkmgr_alert_test.2270715338 Mar 10 01:46:55 PM PDT 24 Mar 10 01:46:55 PM PDT 24 15210268 ps
T830 /workspace/coverage/default/25.clkmgr_peri.3446778668 Mar 10 01:47:02 PM PDT 24 Mar 10 01:47:04 PM PDT 24 21837710 ps
T831 /workspace/coverage/default/23.clkmgr_clk_handshake_intersig_mubi.4255192464 Mar 10 01:47:03 PM PDT 24 Mar 10 01:47:05 PM PDT 24 48097990 ps
T832 /workspace/coverage/default/16.clkmgr_alert_test.708943334 Mar 10 01:46:25 PM PDT 24 Mar 10 01:46:26 PM PDT 24 18512856 ps
T833 /workspace/coverage/default/0.clkmgr_clk_status.2755083752 Mar 10 01:44:16 PM PDT 24 Mar 10 01:44:18 PM PDT 24 51287779 ps
T834 /workspace/coverage/default/17.clkmgr_peri.465048729 Mar 10 01:46:24 PM PDT 24 Mar 10 01:46:25 PM PDT 24 45391062 ps
T835 /workspace/coverage/default/44.clkmgr_clk_handshake_intersig_mubi.1373561979 Mar 10 01:48:21 PM PDT 24 Mar 10 01:48:22 PM PDT 24 32805567 ps
T836 /workspace/coverage/default/7.clkmgr_div_intersig_mubi.674443653 Mar 10 01:45:31 PM PDT 24 Mar 10 01:45:32 PM PDT 24 40732633 ps
T837 /workspace/coverage/default/49.clkmgr_clk_status.3127690846 Mar 10 01:48:42 PM PDT 24 Mar 10 01:48:43 PM PDT 24 14686540 ps
T838 /workspace/coverage/default/30.clkmgr_clk_status.4270991076 Mar 10 01:47:27 PM PDT 24 Mar 10 01:47:28 PM PDT 24 19404860 ps
T839 /workspace/coverage/default/41.clkmgr_frequency.3223554963 Mar 10 01:48:12 PM PDT 24 Mar 10 01:48:15 PM PDT 24 320781971 ps
T840 /workspace/coverage/default/43.clkmgr_trans.3242297340 Mar 10 01:48:22 PM PDT 24 Mar 10 01:48:23 PM PDT 24 45158570 ps
T841 /workspace/coverage/default/1.clkmgr_regwen.3972268945 Mar 10 01:44:48 PM PDT 24 Mar 10 01:44:56 PM PDT 24 1379601274 ps
T842 /workspace/coverage/default/1.clkmgr_alert_test.3196402105 Mar 10 01:44:40 PM PDT 24 Mar 10 01:44:41 PM PDT 24 47625275 ps
T843 /workspace/coverage/default/5.clkmgr_smoke.310499743 Mar 10 01:45:01 PM PDT 24 Mar 10 01:45:02 PM PDT 24 69085593 ps
T844 /workspace/coverage/default/36.clkmgr_smoke.1640340717 Mar 10 01:47:51 PM PDT 24 Mar 10 01:47:52 PM PDT 24 18544851 ps
T845 /workspace/coverage/default/35.clkmgr_clk_status.2311239922 Mar 10 01:47:46 PM PDT 24 Mar 10 01:47:47 PM PDT 24 13404727 ps
T846 /workspace/coverage/default/45.clkmgr_alert_test.3929739259 Mar 10 01:48:30 PM PDT 24 Mar 10 01:48:31 PM PDT 24 97596966 ps
T847 /workspace/coverage/default/35.clkmgr_lc_ctrl_intersig_mubi.3123238445 Mar 10 01:47:46 PM PDT 24 Mar 10 01:47:47 PM PDT 24 12062397 ps
T848 /workspace/coverage/default/38.clkmgr_clk_status.2329284552 Mar 10 01:48:04 PM PDT 24 Mar 10 01:48:05 PM PDT 24 27737127 ps
T849 /workspace/coverage/default/28.clkmgr_lc_ctrl_intersig_mubi.1257199172 Mar 10 01:47:22 PM PDT 24 Mar 10 01:47:23 PM PDT 24 63444452 ps
T850 /workspace/coverage/default/17.clkmgr_alert_test.3021039104 Mar 10 01:46:28 PM PDT 24 Mar 10 01:46:29 PM PDT 24 95783501 ps
T851 /workspace/coverage/default/44.clkmgr_alert_test.2388281858 Mar 10 01:48:27 PM PDT 24 Mar 10 01:48:28 PM PDT 24 14370582 ps
T852 /workspace/coverage/cover_reg_top/19.clkmgr_intr_test.2233069118 Mar 10 12:26:51 PM PDT 24 Mar 10 12:26:52 PM PDT 24 103533236 ps
T75 /workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.510071541 Mar 10 12:27:04 PM PDT 24 Mar 10 12:27:05 PM PDT 24 32805733 ps
T853 /workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.805043544 Mar 10 12:26:43 PM PDT 24 Mar 10 12:26:46 PM PDT 24 127900546 ps
T51 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.774280606 Mar 10 12:26:54 PM PDT 24 Mar 10 12:26:56 PM PDT 24 123038895 ps
T76 /workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.963447681 Mar 10 12:26:57 PM PDT 24 Mar 10 12:26:59 PM PDT 24 57279240 ps
T101 /workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.2237691543 Mar 10 12:26:56 PM PDT 24 Mar 10 12:26:58 PM PDT 24 123577307 ps
T854 /workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.495602198 Mar 10 12:26:38 PM PDT 24 Mar 10 12:26:39 PM PDT 24 57574609 ps
T52 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.1608705076 Mar 10 12:26:47 PM PDT 24 Mar 10 12:26:51 PM PDT 24 484971965 ps
T855 /workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.3079337569 Mar 10 12:26:34 PM PDT 24 Mar 10 12:26:35 PM PDT 24 19024126 ps
T98 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.884842753 Mar 10 12:26:50 PM PDT 24 Mar 10 12:26:53 PM PDT 24 148342345 ps
T77 /workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.2927941798 Mar 10 12:26:41 PM PDT 24 Mar 10 12:26:42 PM PDT 24 54316142 ps
T856 /workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.1484801608 Mar 10 12:26:46 PM PDT 24 Mar 10 12:26:53 PM PDT 24 276338796 ps
T857 /workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.465363883 Mar 10 12:26:55 PM PDT 24 Mar 10 12:27:00 PM PDT 24 836753072 ps
T53 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.2712606927 Mar 10 12:26:56 PM PDT 24 Mar 10 12:26:58 PM PDT 24 252733042 ps
T858 /workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.2219042821 Mar 10 12:26:45 PM PDT 24 Mar 10 12:26:46 PM PDT 24 26118743 ps
T859 /workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.451066308 Mar 10 12:26:51 PM PDT 24 Mar 10 12:26:53 PM PDT 24 164368488 ps
T860 /workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.671147248 Mar 10 12:26:44 PM PDT 24 Mar 10 12:26:47 PM PDT 24 300232734 ps
T54 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.2361162044 Mar 10 12:26:41 PM PDT 24 Mar 10 12:26:43 PM PDT 24 285337609 ps
T861 /workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.2233459648 Mar 10 12:26:49 PM PDT 24 Mar 10 12:26:50 PM PDT 24 46043498 ps
T862 /workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.828145718 Mar 10 12:26:50 PM PDT 24 Mar 10 12:26:53 PM PDT 24 102959860 ps
T78 /workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.235062093 Mar 10 12:26:57 PM PDT 24 Mar 10 12:26:58 PM PDT 24 57692637 ps
T863 /workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.1092392371 Mar 10 12:26:45 PM PDT 24 Mar 10 12:26:48 PM PDT 24 137214045 ps
T79 /workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.750843588 Mar 10 12:26:43 PM PDT 24 Mar 10 12:26:45 PM PDT 24 39321883 ps
T864 /workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.3726575619 Mar 10 12:27:37 PM PDT 24 Mar 10 12:27:39 PM PDT 24 47796869 ps
T865 /workspace/coverage/cover_reg_top/11.clkmgr_intr_test.345340734 Mar 10 12:26:48 PM PDT 24 Mar 10 12:26:48 PM PDT 24 12616150 ps
T80 /workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.3749707697 Mar 10 12:26:42 PM PDT 24 Mar 10 12:26:43 PM PDT 24 23692864 ps
T866 /workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.4287405145 Mar 10 12:26:56 PM PDT 24 Mar 10 12:26:57 PM PDT 24 25288016 ps
T81 /workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.185161189 Mar 10 12:26:47 PM PDT 24 Mar 10 12:26:48 PM PDT 24 67711413 ps
T867 /workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.2525908299 Mar 10 12:26:51 PM PDT 24 Mar 10 12:26:51 PM PDT 24 36282748 ps
T868 /workspace/coverage/cover_reg_top/30.clkmgr_intr_test.1888597842 Mar 10 12:26:52 PM PDT 24 Mar 10 12:26:53 PM PDT 24 18822715 ps
T60 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.1083776496 Mar 10 12:26:53 PM PDT 24 Mar 10 12:26:55 PM PDT 24 238215174 ps
T869 /workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.3398513855 Mar 10 12:26:48 PM PDT 24 Mar 10 12:26:49 PM PDT 24 79281300 ps
T870 /workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.3471455488 Mar 10 12:26:45 PM PDT 24 Mar 10 12:26:48 PM PDT 24 239734142 ps
T871 /workspace/coverage/cover_reg_top/5.clkmgr_intr_test.3251195853 Mar 10 12:26:49 PM PDT 24 Mar 10 12:26:50 PM PDT 24 21071050 ps
T56 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.723727584 Mar 10 12:26:45 PM PDT 24 Mar 10 12:26:47 PM PDT 24 94941213 ps
T872 /workspace/coverage/cover_reg_top/48.clkmgr_intr_test.3725607683 Mar 10 12:27:30 PM PDT 24 Mar 10 12:27:30 PM PDT 24 16688314 ps
T99 /workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.2313446703 Mar 10 12:28:25 PM PDT 24 Mar 10 12:28:26 PM PDT 24 108502674 ps
T873 /workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.4133491174 Mar 10 12:26:45 PM PDT 24 Mar 10 12:26:48 PM PDT 24 83174785 ps
T100 /workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.2756395857 Mar 10 12:26:49 PM PDT 24 Mar 10 12:26:53 PM PDT 24 440721493 ps
T874 /workspace/coverage/cover_reg_top/17.clkmgr_intr_test.3702270597 Mar 10 12:27:06 PM PDT 24 Mar 10 12:27:07 PM PDT 24 57579405 ps
T875 /workspace/coverage/cover_reg_top/38.clkmgr_intr_test.1032916433 Mar 10 12:27:38 PM PDT 24 Mar 10 12:27:39 PM PDT 24 24323488 ps
T876 /workspace/coverage/cover_reg_top/20.clkmgr_intr_test.512994706 Mar 10 12:26:55 PM PDT 24 Mar 10 12:26:56 PM PDT 24 34880973 ps
T55 /workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.2124397025 Mar 10 12:26:45 PM PDT 24 Mar 10 12:26:47 PM PDT 24 125162312 ps
T162 /workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.4035862152 Mar 10 12:26:48 PM PDT 24 Mar 10 12:26:51 PM PDT 24 101855881 ps
T877 /workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.1689470775 Mar 10 12:26:47 PM PDT 24 Mar 10 12:26:49 PM PDT 24 159187596 ps
T878 /workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.279608143 Mar 10 12:26:49 PM PDT 24 Mar 10 12:26:50 PM PDT 24 21596024 ps
T879 /workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.745119077 Mar 10 12:26:56 PM PDT 24 Mar 10 12:26:58 PM PDT 24 52991391 ps
T880 /workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.837434015 Mar 10 12:26:42 PM PDT 24 Mar 10 12:26:43 PM PDT 24 13935732 ps
T881 /workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.1770693241 Mar 10 12:26:45 PM PDT 24 Mar 10 12:26:48 PM PDT 24 225764956 ps
T882 /workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.365128159 Mar 10 12:26:59 PM PDT 24 Mar 10 12:27:00 PM PDT 24 38316493 ps
T883 /workspace/coverage/cover_reg_top/45.clkmgr_intr_test.3692884034 Mar 10 12:26:52 PM PDT 24 Mar 10 12:26:52 PM PDT 24 14789949 ps
T57 /workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.3508820945 Mar 10 12:26:44 PM PDT 24 Mar 10 12:26:46 PM PDT 24 248702601 ps
T58 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.2179626579 Mar 10 12:26:55 PM PDT 24 Mar 10 12:26:57 PM PDT 24 186008370 ps
T884 /workspace/coverage/cover_reg_top/18.clkmgr_intr_test.828801907 Mar 10 12:27:25 PM PDT 24 Mar 10 12:27:26 PM PDT 24 25151520 ps
T885 /workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.1394601433 Mar 10 12:26:56 PM PDT 24 Mar 10 12:26:57 PM PDT 24 21702939 ps
T59 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.710673868 Mar 10 12:26:48 PM PDT 24 Mar 10 12:26:50 PM PDT 24 213731271 ps
T886 /workspace/coverage/cover_reg_top/7.clkmgr_intr_test.837429718 Mar 10 12:26:38 PM PDT 24 Mar 10 12:26:39 PM PDT 24 13911690 ps
T108 /workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.4118189487 Mar 10 12:26:47 PM PDT 24 Mar 10 12:26:48 PM PDT 24 105203099 ps
T117 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.623172883 Mar 10 12:26:41 PM PDT 24 Mar 10 12:26:43 PM PDT 24 224401693 ps
T118 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.3153433343 Mar 10 12:26:36 PM PDT 24 Mar 10 12:26:37 PM PDT 24 75724975 ps
T887 /workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.296399289 Mar 10 12:26:46 PM PDT 24 Mar 10 12:26:50 PM PDT 24 352426761 ps
T888 /workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.313617032 Mar 10 12:26:56 PM PDT 24 Mar 10 12:26:57 PM PDT 24 12617651 ps
T889 /workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.655529091 Mar 10 12:26:40 PM PDT 24 Mar 10 12:26:41 PM PDT 24 92213838 ps
T122 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.2249070346 Mar 10 12:26:49 PM PDT 24 Mar 10 12:26:51 PM PDT 24 112461857 ps
T890 /workspace/coverage/cover_reg_top/31.clkmgr_intr_test.3672229843 Mar 10 12:26:48 PM PDT 24 Mar 10 12:26:49 PM PDT 24 28516869 ps
T891 /workspace/coverage/cover_reg_top/8.clkmgr_intr_test.688476221 Mar 10 12:26:43 PM PDT 24 Mar 10 12:26:44 PM PDT 24 32351666 ps
T892 /workspace/coverage/cover_reg_top/43.clkmgr_intr_test.4055750494 Mar 10 12:26:53 PM PDT 24 Mar 10 12:26:54 PM PDT 24 40320512 ps
T893 /workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.3588733789 Mar 10 12:26:43 PM PDT 24 Mar 10 12:26:44 PM PDT 24 27499651 ps
T123 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.1010805343 Mar 10 12:26:45 PM PDT 24 Mar 10 12:26:48 PM PDT 24 263456897 ps
T894 /workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.3925957187 Mar 10 12:26:45 PM PDT 24 Mar 10 12:26:48 PM PDT 24 115934225 ps
T895 /workspace/coverage/cover_reg_top/42.clkmgr_intr_test.735789858 Mar 10 12:27:00 PM PDT 24 Mar 10 12:27:01 PM PDT 24 28058234 ps
T896 /workspace/coverage/cover_reg_top/39.clkmgr_intr_test.2523547589 Mar 10 12:27:04 PM PDT 24 Mar 10 12:27:05 PM PDT 24 12316870 ps
T897 /workspace/coverage/cover_reg_top/33.clkmgr_intr_test.979906541 Mar 10 12:26:55 PM PDT 24 Mar 10 12:26:56 PM PDT 24 19257916 ps
T898 /workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.1979673877 Mar 10 12:26:40 PM PDT 24 Mar 10 12:26:41 PM PDT 24 25019556 ps
T899 /workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.2860203599 Mar 10 12:26:38 PM PDT 24 Mar 10 12:26:40 PM PDT 24 160877224 ps
T900 /workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.1198322897 Mar 10 12:26:57 PM PDT 24 Mar 10 12:26:58 PM PDT 24 36934528 ps
T901 /workspace/coverage/cover_reg_top/29.clkmgr_intr_test.2181218168 Mar 10 12:27:02 PM PDT 24 Mar 10 12:27:02 PM PDT 24 25636221 ps
T902 /workspace/coverage/cover_reg_top/34.clkmgr_intr_test.2932529743 Mar 10 12:27:08 PM PDT 24 Mar 10 12:27:09 PM PDT 24 35435795 ps
T903 /workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.4147608089 Mar 10 12:26:44 PM PDT 24 Mar 10 12:26:46 PM PDT 24 78653965 ps
T119 /workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.2268171050 Mar 10 12:26:53 PM PDT 24 Mar 10 12:26:54 PM PDT 24 92102987 ps
T904 /workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.165380085 Mar 10 12:26:51 PM PDT 24 Mar 10 12:26:52 PM PDT 24 44867781 ps
T126 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.2189023838 Mar 10 12:26:23 PM PDT 24 Mar 10 12:26:26 PM PDT 24 185952176 ps
T905 /workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.3030666926 Mar 10 12:26:41 PM PDT 24 Mar 10 12:26:43 PM PDT 24 164568612 ps
T906 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.3966250951 Mar 10 12:26:58 PM PDT 24 Mar 10 12:26:59 PM PDT 24 37619139 ps
T907 /workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.3697382938 Mar 10 12:26:43 PM PDT 24 Mar 10 12:26:44 PM PDT 24 90796457 ps
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