Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.52 99.15 95.84 100.00 100.00 98.81 97.01 98.80


Total test records in report: 1010
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T800 /workspace/coverage/default/23.clkmgr_alert_test.4081058059 Mar 14 01:33:54 PM PDT 24 Mar 14 01:33:55 PM PDT 24 12957207 ps
T801 /workspace/coverage/default/31.clkmgr_idle_intersig_mubi.2979064950 Mar 14 01:34:24 PM PDT 24 Mar 14 01:34:25 PM PDT 24 45275489 ps
T802 /workspace/coverage/default/17.clkmgr_frequency.2103064132 Mar 14 01:33:37 PM PDT 24 Mar 14 01:33:44 PM PDT 24 1043316870 ps
T803 /workspace/coverage/default/9.clkmgr_smoke.3619263734 Mar 14 01:33:27 PM PDT 24 Mar 14 01:33:28 PM PDT 24 17373992 ps
T804 /workspace/coverage/default/25.clkmgr_stress_all.2583413126 Mar 14 01:34:15 PM PDT 24 Mar 14 01:34:59 PM PDT 24 11292614925 ps
T805 /workspace/coverage/default/37.clkmgr_trans.4272166998 Mar 14 01:34:32 PM PDT 24 Mar 14 01:34:33 PM PDT 24 36011057 ps
T806 /workspace/coverage/default/14.clkmgr_clk_handshake_intersig_mubi.3218373327 Mar 14 01:33:32 PM PDT 24 Mar 14 01:33:34 PM PDT 24 39677549 ps
T807 /workspace/coverage/default/9.clkmgr_peri.1825810053 Mar 14 01:33:26 PM PDT 24 Mar 14 01:33:27 PM PDT 24 18280319 ps
T808 /workspace/coverage/default/16.clkmgr_clk_status.2064582014 Mar 14 01:33:33 PM PDT 24 Mar 14 01:33:34 PM PDT 24 18505624 ps
T809 /workspace/coverage/default/15.clkmgr_peri.632451546 Mar 14 01:33:32 PM PDT 24 Mar 14 01:33:33 PM PDT 24 21438004 ps
T810 /workspace/coverage/default/6.clkmgr_alert_test.1615224001 Mar 14 01:33:08 PM PDT 24 Mar 14 01:33:09 PM PDT 24 48010270 ps
T811 /workspace/coverage/default/22.clkmgr_clk_handshake_intersig_mubi.1007307984 Mar 14 01:33:46 PM PDT 24 Mar 14 01:33:47 PM PDT 24 20263602 ps
T812 /workspace/coverage/default/28.clkmgr_idle_intersig_mubi.2212766606 Mar 14 01:34:08 PM PDT 24 Mar 14 01:34:10 PM PDT 24 36554750 ps
T813 /workspace/coverage/default/18.clkmgr_smoke.2390225066 Mar 14 01:33:44 PM PDT 24 Mar 14 01:33:46 PM PDT 24 24213309 ps
T814 /workspace/coverage/default/32.clkmgr_frequency_timeout.2508331138 Mar 14 01:34:29 PM PDT 24 Mar 14 01:34:34 PM PDT 24 495623079 ps
T815 /workspace/coverage/default/47.clkmgr_alert_test.619009012 Mar 14 01:34:54 PM PDT 24 Mar 14 01:34:56 PM PDT 24 39029595 ps
T816 /workspace/coverage/default/5.clkmgr_stress_all.940647142 Mar 14 01:33:13 PM PDT 24 Mar 14 01:33:40 PM PDT 24 5245039801 ps
T817 /workspace/coverage/default/40.clkmgr_div_intersig_mubi.513300242 Mar 14 01:34:42 PM PDT 24 Mar 14 01:34:44 PM PDT 24 183538082 ps
T818 /workspace/coverage/default/12.clkmgr_regwen.2564582721 Mar 14 01:33:31 PM PDT 24 Mar 14 01:33:35 PM PDT 24 752704934 ps
T819 /workspace/coverage/default/2.clkmgr_idle_intersig_mubi.1108873681 Mar 14 01:33:10 PM PDT 24 Mar 14 01:33:11 PM PDT 24 55504200 ps
T820 /workspace/coverage/default/5.clkmgr_lc_ctrl_intersig_mubi.1637228832 Mar 14 01:33:13 PM PDT 24 Mar 14 01:33:14 PM PDT 24 22009529 ps
T821 /workspace/coverage/default/45.clkmgr_smoke.3927872330 Mar 14 01:34:48 PM PDT 24 Mar 14 01:34:51 PM PDT 24 77258329 ps
T822 /workspace/coverage/default/45.clkmgr_clk_handshake_intersig_mubi.1231066493 Mar 14 01:34:49 PM PDT 24 Mar 14 01:34:52 PM PDT 24 92871333 ps
T823 /workspace/coverage/default/21.clkmgr_lc_clk_byp_req_intersig_mubi.1091669395 Mar 14 01:33:53 PM PDT 24 Mar 14 01:33:54 PM PDT 24 20925087 ps
T824 /workspace/coverage/default/14.clkmgr_frequency.3446491767 Mar 14 01:33:32 PM PDT 24 Mar 14 01:33:48 PM PDT 24 2118750327 ps
T825 /workspace/coverage/default/1.clkmgr_trans.1844431625 Mar 14 01:33:05 PM PDT 24 Mar 14 01:33:05 PM PDT 24 20443629 ps
T826 /workspace/coverage/default/17.clkmgr_smoke.1908137597 Mar 14 01:33:38 PM PDT 24 Mar 14 01:33:39 PM PDT 24 145510052 ps
T827 /workspace/coverage/default/39.clkmgr_frequency_timeout.2431485270 Mar 14 01:34:37 PM PDT 24 Mar 14 01:34:49 PM PDT 24 2179406058 ps
T828 /workspace/coverage/default/46.clkmgr_frequency.556589243 Mar 14 01:34:51 PM PDT 24 Mar 14 01:34:58 PM PDT 24 1189414125 ps
T829 /workspace/coverage/default/2.clkmgr_stress_all_with_rand_reset.838734849 Mar 14 01:33:14 PM PDT 24 Mar 14 02:04:23 PM PDT 24 336839113799 ps
T830 /workspace/coverage/default/7.clkmgr_extclk.1666585777 Mar 14 01:33:14 PM PDT 24 Mar 14 01:33:15 PM PDT 24 73789044 ps
T831 /workspace/coverage/default/40.clkmgr_lc_ctrl_intersig_mubi.3401894287 Mar 14 01:34:37 PM PDT 24 Mar 14 01:34:38 PM PDT 24 43482702 ps
T832 /workspace/coverage/default/2.clkmgr_stress_all.1981020116 Mar 14 01:33:14 PM PDT 24 Mar 14 01:34:17 PM PDT 24 15467942020 ps
T833 /workspace/coverage/default/20.clkmgr_extclk.2775720824 Mar 14 01:33:48 PM PDT 24 Mar 14 01:33:51 PM PDT 24 37568689 ps
T834 /workspace/coverage/default/43.clkmgr_alert_test.1547511606 Mar 14 01:35:00 PM PDT 24 Mar 14 01:35:02 PM PDT 24 23882650 ps
T835 /workspace/coverage/default/4.clkmgr_peri.4201197023 Mar 14 01:33:09 PM PDT 24 Mar 14 01:33:10 PM PDT 24 49525719 ps
T836 /workspace/coverage/default/7.clkmgr_lc_ctrl_intersig_mubi.2413164652 Mar 14 01:33:14 PM PDT 24 Mar 14 01:33:15 PM PDT 24 35923936 ps
T837 /workspace/coverage/default/34.clkmgr_stress_all_with_rand_reset.3058444847 Mar 14 01:34:21 PM PDT 24 Mar 14 01:42:22 PM PDT 24 78059770775 ps
T838 /workspace/coverage/default/27.clkmgr_idle_intersig_mubi.2322608806 Mar 14 01:34:09 PM PDT 24 Mar 14 01:34:10 PM PDT 24 59919404 ps
T839 /workspace/coverage/default/47.clkmgr_lc_ctrl_intersig_mubi.593602723 Mar 14 01:34:59 PM PDT 24 Mar 14 01:35:03 PM PDT 24 39297395 ps
T840 /workspace/coverage/default/6.clkmgr_frequency_timeout.1543896271 Mar 14 01:33:11 PM PDT 24 Mar 14 01:33:19 PM PDT 24 981349846 ps
T841 /workspace/coverage/default/25.clkmgr_lc_ctrl_intersig_mubi.1309180819 Mar 14 01:34:16 PM PDT 24 Mar 14 01:34:17 PM PDT 24 43980574 ps
T842 /workspace/coverage/default/6.clkmgr_div_intersig_mubi.3784145817 Mar 14 01:33:10 PM PDT 24 Mar 14 01:33:11 PM PDT 24 34978719 ps
T843 /workspace/coverage/default/38.clkmgr_stress_all_with_rand_reset.2953191244 Mar 14 01:34:45 PM PDT 24 Mar 14 01:42:51 PM PDT 24 73205351001 ps
T844 /workspace/coverage/default/49.clkmgr_idle_intersig_mubi.2436752529 Mar 14 01:35:12 PM PDT 24 Mar 14 01:35:14 PM PDT 24 43323758 ps
T845 /workspace/coverage/default/45.clkmgr_div_intersig_mubi.1105197857 Mar 14 01:34:50 PM PDT 24 Mar 14 01:34:52 PM PDT 24 150955245 ps
T846 /workspace/coverage/default/14.clkmgr_peri.2965779336 Mar 14 01:33:37 PM PDT 24 Mar 14 01:33:38 PM PDT 24 24736682 ps
T847 /workspace/coverage/default/22.clkmgr_idle_intersig_mubi.3463461886 Mar 14 01:33:52 PM PDT 24 Mar 14 01:33:55 PM PDT 24 197902281 ps
T848 /workspace/coverage/default/23.clkmgr_extclk.179475167 Mar 14 01:33:55 PM PDT 24 Mar 14 01:33:57 PM PDT 24 74967404 ps
T849 /workspace/coverage/default/13.clkmgr_frequency.1531937474 Mar 14 01:33:31 PM PDT 24 Mar 14 01:33:44 PM PDT 24 1638305974 ps
T850 /workspace/coverage/default/32.clkmgr_regwen.1628420970 Mar 14 01:34:20 PM PDT 24 Mar 14 01:34:26 PM PDT 24 1053637758 ps
T851 /workspace/coverage/default/28.clkmgr_frequency.3577699351 Mar 14 01:34:15 PM PDT 24 Mar 14 01:34:24 PM PDT 24 2116238461 ps
T852 /workspace/coverage/default/4.clkmgr_lc_clk_byp_req_intersig_mubi.1894357433 Mar 14 01:33:10 PM PDT 24 Mar 14 01:33:11 PM PDT 24 207721394 ps
T853 /workspace/coverage/default/3.clkmgr_alert_test.647455828 Mar 14 01:33:14 PM PDT 24 Mar 14 01:33:16 PM PDT 24 25653468 ps
T854 /workspace/coverage/default/22.clkmgr_clk_status.2729056098 Mar 14 01:33:59 PM PDT 24 Mar 14 01:34:01 PM PDT 24 110579000 ps
T90 /workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.2361307609 Mar 14 01:13:01 PM PDT 24 Mar 14 01:13:02 PM PDT 24 30251481 ps
T67 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.1001211788 Mar 14 01:13:32 PM PDT 24 Mar 14 01:13:35 PM PDT 24 154669576 ps
T855 /workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.3280424348 Mar 14 01:13:35 PM PDT 24 Mar 14 01:13:39 PM PDT 24 255845292 ps
T68 /workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.3244665934 Mar 14 01:13:34 PM PDT 24 Mar 14 01:13:36 PM PDT 24 306456446 ps
T69 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.2419684194 Mar 14 01:12:52 PM PDT 24 Mar 14 01:12:54 PM PDT 24 153702127 ps
T856 /workspace/coverage/cover_reg_top/41.clkmgr_intr_test.2577383478 Mar 14 01:13:32 PM PDT 24 Mar 14 01:13:33 PM PDT 24 11777633 ps
T71 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.2040787031 Mar 14 01:13:14 PM PDT 24 Mar 14 01:13:16 PM PDT 24 127372848 ps
T75 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.1954446056 Mar 14 01:13:34 PM PDT 24 Mar 14 01:13:37 PM PDT 24 144238263 ps
T857 /workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.4174879221 Mar 14 01:13:35 PM PDT 24 Mar 14 01:13:37 PM PDT 24 48263027 ps
T91 /workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.2554276160 Mar 14 01:13:35 PM PDT 24 Mar 14 01:13:37 PM PDT 24 37086732 ps
T858 /workspace/coverage/cover_reg_top/14.clkmgr_intr_test.136087392 Mar 14 01:13:38 PM PDT 24 Mar 14 01:13:40 PM PDT 24 15061902 ps
T859 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.132933482 Mar 14 01:12:53 PM PDT 24 Mar 14 01:12:54 PM PDT 24 54674655 ps
T860 /workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.1025313453 Mar 14 01:13:17 PM PDT 24 Mar 14 01:13:19 PM PDT 24 122903038 ps
T70 /workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.2269226025 Mar 14 01:13:16 PM PDT 24 Mar 14 01:13:19 PM PDT 24 355053855 ps
T92 /workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.3134473869 Mar 14 01:12:59 PM PDT 24 Mar 14 01:13:00 PM PDT 24 22542830 ps
T93 /workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.2241548169 Mar 14 01:13:00 PM PDT 24 Mar 14 01:13:02 PM PDT 24 97958237 ps
T861 /workspace/coverage/cover_reg_top/46.clkmgr_intr_test.2108311994 Mar 14 01:13:44 PM PDT 24 Mar 14 01:13:45 PM PDT 24 12693513 ps
T862 /workspace/coverage/cover_reg_top/37.clkmgr_intr_test.1156673198 Mar 14 01:13:39 PM PDT 24 Mar 14 01:13:41 PM PDT 24 21624542 ps
T72 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.4124825511 Mar 14 01:12:53 PM PDT 24 Mar 14 01:12:57 PM PDT 24 305803591 ps
T132 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.2217932412 Mar 14 01:13:34 PM PDT 24 Mar 14 01:13:36 PM PDT 24 150198075 ps
T863 /workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.1776556386 Mar 14 01:13:25 PM PDT 24 Mar 14 01:13:28 PM PDT 24 68862341 ps
T864 /workspace/coverage/cover_reg_top/47.clkmgr_intr_test.1308372728 Mar 14 01:13:44 PM PDT 24 Mar 14 01:13:45 PM PDT 24 43029112 ps
T865 /workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.3096622234 Mar 14 01:13:00 PM PDT 24 Mar 14 01:13:01 PM PDT 24 43969927 ps
T114 /workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.204354420 Mar 14 01:12:51 PM PDT 24 Mar 14 01:12:53 PM PDT 24 236005770 ps
T115 /workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.2775190 Mar 14 01:13:18 PM PDT 24 Mar 14 01:13:21 PM PDT 24 370539308 ps
T866 /workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.996487358 Mar 14 01:12:55 PM PDT 24 Mar 14 01:12:56 PM PDT 24 63952025 ps
T94 /workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.2548004288 Mar 14 01:12:50 PM PDT 24 Mar 14 01:12:51 PM PDT 24 22941436 ps
T95 /workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.642309248 Mar 14 01:13:19 PM PDT 24 Mar 14 01:13:21 PM PDT 24 48472958 ps
T867 /workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.3206778813 Mar 14 01:12:59 PM PDT 24 Mar 14 01:13:01 PM PDT 24 24788044 ps
T868 /workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.3450173351 Mar 14 01:13:35 PM PDT 24 Mar 14 01:13:37 PM PDT 24 48894733 ps
T869 /workspace/coverage/cover_reg_top/5.clkmgr_intr_test.3411671129 Mar 14 01:13:18 PM PDT 24 Mar 14 01:13:19 PM PDT 24 13745882 ps
T116 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.3880129977 Mar 14 01:13:17 PM PDT 24 Mar 14 01:13:20 PM PDT 24 101624710 ps
T870 /workspace/coverage/cover_reg_top/12.clkmgr_intr_test.726124014 Mar 14 01:13:34 PM PDT 24 Mar 14 01:13:35 PM PDT 24 20874793 ps
T123 /workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.1587843891 Mar 14 01:13:17 PM PDT 24 Mar 14 01:13:23 PM PDT 24 1259631560 ps
T124 /workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.55626092 Mar 14 01:13:35 PM PDT 24 Mar 14 01:13:39 PM PDT 24 598858738 ps
T73 /workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.3446061603 Mar 14 01:13:36 PM PDT 24 Mar 14 01:13:39 PM PDT 24 165046179 ps
T871 /workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.3750277874 Mar 14 01:13:01 PM PDT 24 Mar 14 01:13:02 PM PDT 24 58797679 ps
T137 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.2874820960 Mar 14 01:13:03 PM PDT 24 Mar 14 01:13:05 PM PDT 24 146006310 ps
T872 /workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.3631241909 Mar 14 01:13:14 PM PDT 24 Mar 14 01:13:15 PM PDT 24 37525741 ps
T873 /workspace/coverage/cover_reg_top/30.clkmgr_intr_test.3229103659 Mar 14 01:13:38 PM PDT 24 Mar 14 01:13:39 PM PDT 24 13188858 ps
T874 /workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.2185193336 Mar 14 01:13:35 PM PDT 24 Mar 14 01:13:36 PM PDT 24 131396289 ps
T875 /workspace/coverage/cover_reg_top/4.clkmgr_intr_test.2320437764 Mar 14 01:13:15 PM PDT 24 Mar 14 01:13:16 PM PDT 24 14674208 ps
T876 /workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.3860503711 Mar 14 01:13:00 PM PDT 24 Mar 14 01:13:03 PM PDT 24 72958338 ps
T877 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.2994304972 Mar 14 01:13:36 PM PDT 24 Mar 14 01:13:37 PM PDT 24 31783071 ps
T878 /workspace/coverage/cover_reg_top/39.clkmgr_intr_test.3352720588 Mar 14 01:13:38 PM PDT 24 Mar 14 01:13:38 PM PDT 24 13290485 ps
T879 /workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.979079488 Mar 14 01:13:14 PM PDT 24 Mar 14 01:13:15 PM PDT 24 166986267 ps
T880 /workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.1271722334 Mar 14 01:13:19 PM PDT 24 Mar 14 01:13:21 PM PDT 24 46305590 ps
T133 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.4036124201 Mar 14 01:12:53 PM PDT 24 Mar 14 01:12:54 PM PDT 24 88358210 ps
T881 /workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.3572860777 Mar 14 01:13:33 PM PDT 24 Mar 14 01:13:35 PM PDT 24 207156025 ps
T882 /workspace/coverage/cover_reg_top/38.clkmgr_intr_test.195558208 Mar 14 01:13:37 PM PDT 24 Mar 14 01:13:38 PM PDT 24 31488249 ps
T883 /workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.3578775826 Mar 14 01:13:33 PM PDT 24 Mar 14 01:13:34 PM PDT 24 31467187 ps
T884 /workspace/coverage/cover_reg_top/15.clkmgr_intr_test.3022482499 Mar 14 01:13:35 PM PDT 24 Mar 14 01:13:36 PM PDT 24 20164700 ps
T885 /workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.38128484 Mar 14 01:13:33 PM PDT 24 Mar 14 01:13:35 PM PDT 24 47227749 ps
T886 /workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.3477032128 Mar 14 01:13:17 PM PDT 24 Mar 14 01:13:20 PM PDT 24 49758713 ps
T887 /workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.3645433076 Mar 14 01:13:16 PM PDT 24 Mar 14 01:13:17 PM PDT 24 45170875 ps
T888 /workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.3869911285 Mar 14 01:13:37 PM PDT 24 Mar 14 01:13:39 PM PDT 24 57484704 ps
T138 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.2984222443 Mar 14 01:13:00 PM PDT 24 Mar 14 01:13:03 PM PDT 24 123155557 ps
T889 /workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.831225924 Mar 14 01:12:54 PM PDT 24 Mar 14 01:12:59 PM PDT 24 455189635 ps
T890 /workspace/coverage/cover_reg_top/9.clkmgr_intr_test.2363818961 Mar 14 01:13:20 PM PDT 24 Mar 14 01:13:21 PM PDT 24 14468058 ps
T891 /workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.1502156079 Mar 14 01:12:53 PM PDT 24 Mar 14 01:12:54 PM PDT 24 20334796 ps
T74 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.640702019 Mar 14 01:13:36 PM PDT 24 Mar 14 01:13:39 PM PDT 24 123043400 ps
T892 /workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.3158165314 Mar 14 01:13:17 PM PDT 24 Mar 14 01:13:18 PM PDT 24 17691000 ps
T893 /workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.3975424509 Mar 14 01:13:00 PM PDT 24 Mar 14 01:13:02 PM PDT 24 92787515 ps
T894 /workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.423274341 Mar 14 01:13:17 PM PDT 24 Mar 14 01:13:19 PM PDT 24 28528422 ps
T134 /workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.2067494814 Mar 14 01:13:36 PM PDT 24 Mar 14 01:13:38 PM PDT 24 59435761 ps
T145 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.4203300887 Mar 14 01:12:54 PM PDT 24 Mar 14 01:12:57 PM PDT 24 91320619 ps
T895 /workspace/coverage/cover_reg_top/26.clkmgr_intr_test.3492356045 Mar 14 01:13:37 PM PDT 24 Mar 14 01:13:38 PM PDT 24 37819227 ps
T896 /workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.1777510987 Mar 14 01:13:33 PM PDT 24 Mar 14 01:13:34 PM PDT 24 22056791 ps
T118 /workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.2748515807 Mar 14 01:13:18 PM PDT 24 Mar 14 01:13:20 PM PDT 24 100865302 ps
T897 /workspace/coverage/cover_reg_top/33.clkmgr_intr_test.2499565458 Mar 14 01:13:39 PM PDT 24 Mar 14 01:13:40 PM PDT 24 12250017 ps
T898 /workspace/coverage/cover_reg_top/17.clkmgr_intr_test.1002511885 Mar 14 01:13:36 PM PDT 24 Mar 14 01:13:37 PM PDT 24 14011692 ps
T146 /workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.780965239 Mar 14 01:13:15 PM PDT 24 Mar 14 01:13:17 PM PDT 24 165953237 ps
T899 /workspace/coverage/cover_reg_top/49.clkmgr_intr_test.1893698164 Mar 14 01:13:39 PM PDT 24 Mar 14 01:13:41 PM PDT 24 26260442 ps
T117 /workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.3580593816 Mar 14 01:12:54 PM PDT 24 Mar 14 01:12:57 PM PDT 24 245845213 ps
T900 /workspace/coverage/cover_reg_top/0.clkmgr_intr_test.563804444 Mar 14 01:12:51 PM PDT 24 Mar 14 01:12:52 PM PDT 24 35394454 ps
T901 /workspace/coverage/cover_reg_top/6.clkmgr_intr_test.4124691095 Mar 14 01:13:17 PM PDT 24 Mar 14 01:13:18 PM PDT 24 19130870 ps
T902 /workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.2415712265 Mar 14 01:13:03 PM PDT 24 Mar 14 01:13:11 PM PDT 24 1092771613 ps
T903 /workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.548245551 Mar 14 01:12:52 PM PDT 24 Mar 14 01:12:53 PM PDT 24 19516856 ps
T135 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.1038932253 Mar 14 01:13:03 PM PDT 24 Mar 14 01:13:05 PM PDT 24 165770309 ps
T140 /workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.2845617966 Mar 14 01:13:13 PM PDT 24 Mar 14 01:13:16 PM PDT 24 213236169 ps
T904 /workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.2659150199 Mar 14 01:13:19 PM PDT 24 Mar 14 01:13:20 PM PDT 24 30698206 ps
T905 /workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.355627100 Mar 14 01:12:58 PM PDT 24 Mar 14 01:12:59 PM PDT 24 34525594 ps
T119 /workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.1546186538 Mar 14 01:13:34 PM PDT 24 Mar 14 01:13:37 PM PDT 24 114573217 ps
T906 /workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.792365082 Mar 14 01:12:59 PM PDT 24 Mar 14 01:13:02 PM PDT 24 150593082 ps
T907 /workspace/coverage/cover_reg_top/11.clkmgr_intr_test.4012830323 Mar 14 01:13:35 PM PDT 24 Mar 14 01:13:36 PM PDT 24 12787340 ps
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T981 /workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.473105154 Mar 14 01:12:53 PM PDT 24 Mar 14 01:12:54 PM PDT 24 43849853 ps
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T1000 /workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.1596623510 Mar 14 01:13:36 PM PDT 24 Mar 14 01:13:37 PM PDT 24 27560730 ps
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