| T798 |
/workspace/coverage/default/18.clkmgr_frequency.2818574086 |
|
|
Mar 21 12:55:06 PM PDT 24 |
Mar 21 12:55:09 PM PDT 24 |
592420545 ps |
| T799 |
/workspace/coverage/default/4.clkmgr_frequency_timeout.3813634648 |
|
|
Mar 21 12:53:54 PM PDT 24 |
Mar 21 12:54:01 PM PDT 24 |
1466599379 ps |
| T800 |
/workspace/coverage/default/20.clkmgr_lc_clk_byp_req_intersig_mubi.2846373625 |
|
|
Mar 21 12:55:11 PM PDT 24 |
Mar 21 12:55:12 PM PDT 24 |
29965195 ps |
| T801 |
/workspace/coverage/default/20.clkmgr_frequency.2305026402 |
|
|
Mar 21 12:55:08 PM PDT 24 |
Mar 21 12:55:19 PM PDT 24 |
2502881790 ps |
| T802 |
/workspace/coverage/default/35.clkmgr_regwen.601942751 |
|
|
Mar 21 12:56:05 PM PDT 24 |
Mar 21 12:56:11 PM PDT 24 |
1537026838 ps |
| T803 |
/workspace/coverage/default/18.clkmgr_lc_clk_byp_req_intersig_mubi.3241671751 |
|
|
Mar 21 12:55:07 PM PDT 24 |
Mar 21 12:55:08 PM PDT 24 |
26226393 ps |
| T804 |
/workspace/coverage/default/33.clkmgr_smoke.2048600915 |
|
|
Mar 21 12:55:55 PM PDT 24 |
Mar 21 12:55:57 PM PDT 24 |
58622184 ps |
| T805 |
/workspace/coverage/default/13.clkmgr_regwen.2636424525 |
|
|
Mar 21 12:54:36 PM PDT 24 |
Mar 21 12:54:40 PM PDT 24 |
1092165669 ps |
| T806 |
/workspace/coverage/default/9.clkmgr_peri.3687751635 |
|
|
Mar 21 12:54:23 PM PDT 24 |
Mar 21 12:54:24 PM PDT 24 |
19235956 ps |
| T807 |
/workspace/coverage/default/12.clkmgr_alert_test.866534834 |
|
|
Mar 21 12:54:37 PM PDT 24 |
Mar 21 12:54:38 PM PDT 24 |
22386572 ps |
| T808 |
/workspace/coverage/default/44.clkmgr_lc_clk_byp_req_intersig_mubi.3582242542 |
|
|
Mar 21 12:56:33 PM PDT 24 |
Mar 21 12:56:34 PM PDT 24 |
23172187 ps |
| T809 |
/workspace/coverage/default/15.clkmgr_frequency_timeout.1728185646 |
|
|
Mar 21 12:54:58 PM PDT 24 |
Mar 21 12:55:07 PM PDT 24 |
1216623149 ps |
| T810 |
/workspace/coverage/default/39.clkmgr_lc_ctrl_intersig_mubi.1266870601 |
|
|
Mar 21 12:56:25 PM PDT 24 |
Mar 21 12:56:26 PM PDT 24 |
19319700 ps |
| T811 |
/workspace/coverage/default/10.clkmgr_clk_status.17766544 |
|
|
Mar 21 12:54:27 PM PDT 24 |
Mar 21 12:54:28 PM PDT 24 |
34345376 ps |
| T812 |
/workspace/coverage/default/3.clkmgr_frequency_timeout.3646845407 |
|
|
Mar 21 12:53:45 PM PDT 24 |
Mar 21 12:53:48 PM PDT 24 |
498549999 ps |
| T813 |
/workspace/coverage/default/2.clkmgr_frequency_timeout.4155200380 |
|
|
Mar 21 12:53:31 PM PDT 24 |
Mar 21 12:53:42 PM PDT 24 |
1582455835 ps |
| T814 |
/workspace/coverage/default/20.clkmgr_div_intersig_mubi.3517565706 |
|
|
Mar 21 12:55:07 PM PDT 24 |
Mar 21 12:55:08 PM PDT 24 |
78847418 ps |
| T815 |
/workspace/coverage/default/33.clkmgr_lc_ctrl_intersig_mubi.1534904231 |
|
|
Mar 21 12:55:58 PM PDT 24 |
Mar 21 12:55:59 PM PDT 24 |
36380318 ps |
| T816 |
/workspace/coverage/default/15.clkmgr_smoke.3552045585 |
|
|
Mar 21 12:54:56 PM PDT 24 |
Mar 21 12:54:57 PM PDT 24 |
51639976 ps |
| T817 |
/workspace/coverage/default/1.clkmgr_trans.1905362711 |
|
|
Mar 21 12:53:18 PM PDT 24 |
Mar 21 12:53:19 PM PDT 24 |
12419188 ps |
| T818 |
/workspace/coverage/default/13.clkmgr_smoke.2214227575 |
|
|
Mar 21 12:54:38 PM PDT 24 |
Mar 21 12:54:40 PM PDT 24 |
121846945 ps |
| T819 |
/workspace/coverage/default/20.clkmgr_stress_all_with_rand_reset.4013145916 |
|
|
Mar 21 12:55:20 PM PDT 24 |
Mar 21 01:17:52 PM PDT 24 |
228802041653 ps |
| T820 |
/workspace/coverage/default/35.clkmgr_alert_test.2810658297 |
|
|
Mar 21 12:56:07 PM PDT 24 |
Mar 21 12:56:08 PM PDT 24 |
16598009 ps |
| T821 |
/workspace/coverage/default/30.clkmgr_lc_clk_byp_req_intersig_mubi.1271433812 |
|
|
Mar 21 12:55:55 PM PDT 24 |
Mar 21 12:55:56 PM PDT 24 |
15012733 ps |
| T822 |
/workspace/coverage/default/23.clkmgr_frequency.495084800 |
|
|
Mar 21 12:55:24 PM PDT 24 |
Mar 21 12:55:26 PM PDT 24 |
228897647 ps |
| T823 |
/workspace/coverage/default/5.clkmgr_idle_intersig_mubi.3664714349 |
|
|
Mar 21 12:53:54 PM PDT 24 |
Mar 21 12:53:55 PM PDT 24 |
91082604 ps |
| T824 |
/workspace/coverage/default/16.clkmgr_trans.333025694 |
|
|
Mar 21 12:54:56 PM PDT 24 |
Mar 21 12:54:57 PM PDT 24 |
24928261 ps |
| T825 |
/workspace/coverage/default/39.clkmgr_regwen.2932112237 |
|
|
Mar 21 12:56:26 PM PDT 24 |
Mar 21 12:56:31 PM PDT 24 |
1106438637 ps |
| T826 |
/workspace/coverage/default/35.clkmgr_stress_all_with_rand_reset.2018319985 |
|
|
Mar 21 12:56:00 PM PDT 24 |
Mar 21 01:08:21 PM PDT 24 |
41781920927 ps |
| T827 |
/workspace/coverage/default/17.clkmgr_extclk.583479192 |
|
|
Mar 21 12:54:58 PM PDT 24 |
Mar 21 12:54:59 PM PDT 24 |
22363223 ps |
| T828 |
/workspace/coverage/default/24.clkmgr_peri.1448312922 |
|
|
Mar 21 12:55:23 PM PDT 24 |
Mar 21 12:55:24 PM PDT 24 |
19157107 ps |
| T829 |
/workspace/coverage/default/43.clkmgr_idle_intersig_mubi.2683603971 |
|
|
Mar 21 12:56:32 PM PDT 24 |
Mar 21 12:56:33 PM PDT 24 |
29250149 ps |
| T830 |
/workspace/coverage/default/24.clkmgr_frequency_timeout.3927527762 |
|
|
Mar 21 12:55:24 PM PDT 24 |
Mar 21 12:55:27 PM PDT 24 |
508285586 ps |
| T831 |
/workspace/coverage/default/15.clkmgr_lc_clk_byp_req_intersig_mubi.2389683514 |
|
|
Mar 21 12:54:59 PM PDT 24 |
Mar 21 12:55:00 PM PDT 24 |
16872640 ps |
| T832 |
/workspace/coverage/default/39.clkmgr_extclk.3886998970 |
|
|
Mar 21 12:56:26 PM PDT 24 |
Mar 21 12:56:27 PM PDT 24 |
31293504 ps |
| T833 |
/workspace/coverage/default/0.clkmgr_clk_status.384374510 |
|
|
Mar 21 12:53:20 PM PDT 24 |
Mar 21 12:53:21 PM PDT 24 |
49325400 ps |
| T834 |
/workspace/coverage/default/1.clkmgr_idle_intersig_mubi.1164838099 |
|
|
Mar 21 12:53:19 PM PDT 24 |
Mar 21 12:53:20 PM PDT 24 |
25089278 ps |
| T835 |
/workspace/coverage/default/29.clkmgr_trans.2778999619 |
|
|
Mar 21 12:55:47 PM PDT 24 |
Mar 21 12:55:48 PM PDT 24 |
20741799 ps |
| T836 |
/workspace/coverage/default/49.clkmgr_peri.766892999 |
|
|
Mar 21 12:56:56 PM PDT 24 |
Mar 21 12:56:57 PM PDT 24 |
37753299 ps |
| T837 |
/workspace/coverage/default/19.clkmgr_lc_ctrl_intersig_mubi.3293752855 |
|
|
Mar 21 12:55:07 PM PDT 24 |
Mar 21 12:55:08 PM PDT 24 |
52820152 ps |
| T838 |
/workspace/coverage/default/13.clkmgr_extclk.2035391487 |
|
|
Mar 21 12:54:38 PM PDT 24 |
Mar 21 12:54:39 PM PDT 24 |
21910370 ps |
| T839 |
/workspace/coverage/default/46.clkmgr_clk_handshake_intersig_mubi.684745882 |
|
|
Mar 21 12:56:42 PM PDT 24 |
Mar 21 12:56:43 PM PDT 24 |
51226575 ps |
| T840 |
/workspace/coverage/default/42.clkmgr_frequency.3747672380 |
|
|
Mar 21 12:56:26 PM PDT 24 |
Mar 21 12:56:29 PM PDT 24 |
319129069 ps |
| T841 |
/workspace/coverage/default/7.clkmgr_lc_ctrl_intersig_mubi.3925467116 |
|
|
Mar 21 12:54:21 PM PDT 24 |
Mar 21 12:54:22 PM PDT 24 |
38626984 ps |
| T842 |
/workspace/coverage/default/22.clkmgr_stress_all_with_rand_reset.1681222060 |
|
|
Mar 21 12:55:24 PM PDT 24 |
Mar 21 01:08:54 PM PDT 24 |
142246412856 ps |
| T843 |
/workspace/coverage/default/20.clkmgr_clk_status.3659888259 |
|
|
Mar 21 12:55:06 PM PDT 24 |
Mar 21 12:55:07 PM PDT 24 |
14391816 ps |
| T844 |
/workspace/coverage/default/45.clkmgr_extclk.1148688991 |
|
|
Mar 21 12:56:37 PM PDT 24 |
Mar 21 12:56:39 PM PDT 24 |
27599643 ps |
| T845 |
/workspace/coverage/default/39.clkmgr_alert_test.3590318594 |
|
|
Mar 21 12:56:23 PM PDT 24 |
Mar 21 12:56:23 PM PDT 24 |
15139457 ps |
| T846 |
/workspace/coverage/default/16.clkmgr_div_intersig_mubi.1786026226 |
|
|
Mar 21 12:54:58 PM PDT 24 |
Mar 21 12:54:59 PM PDT 24 |
191319257 ps |
| T847 |
/workspace/coverage/default/34.clkmgr_frequency_timeout.2304983342 |
|
|
Mar 21 12:56:02 PM PDT 24 |
Mar 21 12:56:07 PM PDT 24 |
1239718148 ps |
| T848 |
/workspace/coverage/default/39.clkmgr_stress_all.1143606024 |
|
|
Mar 21 12:56:27 PM PDT 24 |
Mar 21 12:56:33 PM PDT 24 |
885111795 ps |
| T849 |
/workspace/coverage/default/9.clkmgr_alert_test.2797191650 |
|
|
Mar 21 12:54:27 PM PDT 24 |
Mar 21 12:54:28 PM PDT 24 |
33072110 ps |
| T850 |
/workspace/coverage/default/37.clkmgr_div_intersig_mubi.357479007 |
|
|
Mar 21 12:56:13 PM PDT 24 |
Mar 21 12:56:14 PM PDT 24 |
33752511 ps |
| T851 |
/workspace/coverage/default/35.clkmgr_clk_status.65398554 |
|
|
Mar 21 12:56:06 PM PDT 24 |
Mar 21 12:56:07 PM PDT 24 |
19358120 ps |
| T852 |
/workspace/coverage/default/29.clkmgr_alert_test.552655793 |
|
|
Mar 21 12:55:44 PM PDT 24 |
Mar 21 12:55:45 PM PDT 24 |
45196721 ps |
| T75 |
/workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.434784616 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:40 PM PDT 24 |
34109385 ps |
| T853 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.3270306999 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:42 PM PDT 24 |
218576883 ps |
| T854 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.1131780090 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:40 PM PDT 24 |
30872152 ps |
| T96 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.971630393 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:37 PM PDT 24 |
61461070 ps |
| T76 |
/workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.2376854173 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
50899043 ps |
| T77 |
/workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.902964730 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
59310318 ps |
| T78 |
/workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.3691721246 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
25931673 ps |
| T55 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.4095495054 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:39 PM PDT 24 |
82988125 ps |
| T855 |
/workspace/coverage/cover_reg_top/35.clkmgr_intr_test.3634161275 |
|
|
Mar 21 12:44:06 PM PDT 24 |
Mar 21 12:44:07 PM PDT 24 |
26850467 ps |
| T56 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.4216552026 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
291929271 ps |
| T57 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.3771558825 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:40 PM PDT 24 |
660902797 ps |
| T79 |
/workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.639103152 |
|
|
Mar 21 12:43:23 PM PDT 24 |
Mar 21 12:43:24 PM PDT 24 |
39209389 ps |
| T856 |
/workspace/coverage/cover_reg_top/32.clkmgr_intr_test.869139407 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
11188199 ps |
| T857 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.3626949047 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
100860969 ps |
| T858 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.1941673378 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:54 PM PDT 24 |
80911785 ps |
| T859 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.3113684173 |
|
|
Mar 21 12:43:56 PM PDT 24 |
Mar 21 12:44:00 PM PDT 24 |
491079021 ps |
| T80 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.386312888 |
|
|
Mar 21 12:43:19 PM PDT 24 |
Mar 21 12:43:21 PM PDT 24 |
60948907 ps |
| T91 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.2962121166 |
|
|
Mar 21 12:43:56 PM PDT 24 |
Mar 21 12:43:58 PM PDT 24 |
85510949 ps |
| T81 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.2016651840 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:53 PM PDT 24 |
33937694 ps |
| T60 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.4171566559 |
|
|
Mar 21 12:43:32 PM PDT 24 |
Mar 21 12:43:33 PM PDT 24 |
86434661 ps |
| T860 |
/workspace/coverage/cover_reg_top/37.clkmgr_intr_test.1855482803 |
|
|
Mar 21 12:44:07 PM PDT 24 |
Mar 21 12:44:08 PM PDT 24 |
16025275 ps |
| T92 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.1036312656 |
|
|
Mar 21 12:43:35 PM PDT 24 |
Mar 21 12:43:38 PM PDT 24 |
97988880 ps |
| T861 |
/workspace/coverage/cover_reg_top/1.clkmgr_intr_test.2534142467 |
|
|
Mar 21 12:43:15 PM PDT 24 |
Mar 21 12:43:16 PM PDT 24 |
11512934 ps |
| T58 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.382966510 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
222868188 ps |
| T862 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_errors.3007256261 |
|
|
Mar 21 12:43:20 PM PDT 24 |
Mar 21 12:43:23 PM PDT 24 |
124748191 ps |
| T863 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.1816708269 |
|
|
Mar 21 12:43:17 PM PDT 24 |
Mar 21 12:43:21 PM PDT 24 |
404776264 ps |
| T864 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.2021769902 |
|
|
Mar 21 12:43:37 PM PDT 24 |
Mar 21 12:43:39 PM PDT 24 |
26203842 ps |
| T865 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.907688426 |
|
|
Mar 21 12:43:50 PM PDT 24 |
Mar 21 12:43:52 PM PDT 24 |
73612293 ps |
| T93 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.531066174 |
|
|
Mar 21 12:43:32 PM PDT 24 |
Mar 21 12:43:34 PM PDT 24 |
142445523 ps |
| T59 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.4237526609 |
|
|
Mar 21 12:43:17 PM PDT 24 |
Mar 21 12:43:19 PM PDT 24 |
159450834 ps |
| T82 |
/workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.2558248240 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
88160915 ps |
| T149 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.963816115 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:40 PM PDT 24 |
68060054 ps |
| T866 |
/workspace/coverage/cover_reg_top/6.clkmgr_intr_test.3187474062 |
|
|
Mar 21 12:43:40 PM PDT 24 |
Mar 21 12:43:41 PM PDT 24 |
59259651 ps |
| T867 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.2170443277 |
|
|
Mar 21 12:43:57 PM PDT 24 |
Mar 21 12:43:58 PM PDT 24 |
65621571 ps |
| T83 |
/workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.3212445647 |
|
|
Mar 21 12:43:34 PM PDT 24 |
Mar 21 12:43:35 PM PDT 24 |
86077989 ps |
| T868 |
/workspace/coverage/cover_reg_top/24.clkmgr_intr_test.3351525227 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
13611600 ps |
| T869 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.1594525664 |
|
|
Mar 21 12:44:03 PM PDT 24 |
Mar 21 12:44:06 PM PDT 24 |
104919601 ps |
| T870 |
/workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.835579827 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
39426691 ps |
| T150 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.59372843 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:40 PM PDT 24 |
232421876 ps |
| T871 |
/workspace/coverage/cover_reg_top/3.clkmgr_intr_test.3243647089 |
|
|
Mar 21 12:43:32 PM PDT 24 |
Mar 21 12:43:33 PM PDT 24 |
20823036 ps |
| T872 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.2875425076 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
69158200 ps |
| T873 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.1724800992 |
|
|
Mar 21 12:43:23 PM PDT 24 |
Mar 21 12:43:27 PM PDT 24 |
139126111 ps |
| T874 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.1482889234 |
|
|
Mar 21 12:43:23 PM PDT 24 |
Mar 21 12:43:24 PM PDT 24 |
17659123 ps |
| T875 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.1025361393 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:39 PM PDT 24 |
19868717 ps |
| T61 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.537326223 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:54 PM PDT 24 |
112461995 ps |
| T62 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.1096188271 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:44:01 PM PDT 24 |
2338819298 ps |
| T876 |
/workspace/coverage/cover_reg_top/15.clkmgr_intr_test.891831691 |
|
|
Mar 21 12:43:56 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
23505664 ps |
| T877 |
/workspace/coverage/cover_reg_top/2.clkmgr_intr_test.1611474423 |
|
|
Mar 21 12:43:32 PM PDT 24 |
Mar 21 12:43:33 PM PDT 24 |
14986372 ps |
| T878 |
/workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.2410338847 |
|
|
Mar 21 12:43:35 PM PDT 24 |
Mar 21 12:43:37 PM PDT 24 |
99059008 ps |
| T879 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.303560742 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
25654805 ps |
| T880 |
/workspace/coverage/cover_reg_top/27.clkmgr_intr_test.1899309893 |
|
|
Mar 21 12:43:57 PM PDT 24 |
Mar 21 12:43:58 PM PDT 24 |
25125942 ps |
| T881 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.4009270766 |
|
|
Mar 21 12:43:34 PM PDT 24 |
Mar 21 12:43:35 PM PDT 24 |
18663237 ps |
| T882 |
/workspace/coverage/cover_reg_top/23.clkmgr_intr_test.358084130 |
|
|
Mar 21 12:43:57 PM PDT 24 |
Mar 21 12:43:58 PM PDT 24 |
12023470 ps |
| T883 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.1195451467 |
|
|
Mar 21 12:43:34 PM PDT 24 |
Mar 21 12:43:35 PM PDT 24 |
23774692 ps |
| T884 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.1003349259 |
|
|
Mar 21 12:43:16 PM PDT 24 |
Mar 21 12:43:19 PM PDT 24 |
212002797 ps |
| T885 |
/workspace/coverage/cover_reg_top/46.clkmgr_intr_test.2321134934 |
|
|
Mar 21 12:44:07 PM PDT 24 |
Mar 21 12:44:08 PM PDT 24 |
13010540 ps |
| T886 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.559250559 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
23474374 ps |
| T887 |
/workspace/coverage/cover_reg_top/0.clkmgr_intr_test.2000278572 |
|
|
Mar 21 12:43:23 PM PDT 24 |
Mar 21 12:43:24 PM PDT 24 |
13798995 ps |
| T94 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.514062759 |
|
|
Mar 21 12:43:56 PM PDT 24 |
Mar 21 12:43:58 PM PDT 24 |
102986238 ps |
| T888 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.70260718 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
256450392 ps |
| T889 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.4223244701 |
|
|
Mar 21 12:44:03 PM PDT 24 |
Mar 21 12:44:04 PM PDT 24 |
23215075 ps |
| T890 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.1117297403 |
|
|
Mar 21 12:43:37 PM PDT 24 |
Mar 21 12:43:39 PM PDT 24 |
242557804 ps |
| T891 |
/workspace/coverage/cover_reg_top/9.clkmgr_intr_test.30981594 |
|
|
Mar 21 12:43:37 PM PDT 24 |
Mar 21 12:43:38 PM PDT 24 |
28163336 ps |
| T115 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.820423116 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
52184773 ps |
| T120 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.447001830 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
141648563 ps |
| T63 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.4058877885 |
|
|
Mar 21 12:43:25 PM PDT 24 |
Mar 21 12:43:26 PM PDT 24 |
133247223 ps |
| T892 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.3402254604 |
|
|
Mar 21 12:43:14 PM PDT 24 |
Mar 21 12:43:15 PM PDT 24 |
18526268 ps |
| T101 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.200922105 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
94442068 ps |
| T108 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.3857321871 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
177731563 ps |
| T893 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_hw_reset.4126600724 |
|
|
Mar 21 12:43:37 PM PDT 24 |
Mar 21 12:43:38 PM PDT 24 |
102101410 ps |
| T894 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.3414243972 |
|
|
Mar 21 12:43:19 PM PDT 24 |
Mar 21 12:43:21 PM PDT 24 |
46776801 ps |
| T895 |
/workspace/coverage/cover_reg_top/13.clkmgr_intr_test.1473126332 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:53 PM PDT 24 |
11802304 ps |
| T896 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.363988618 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:39 PM PDT 24 |
192992660 ps |
| T897 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.2528338914 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:40 PM PDT 24 |
50376559 ps |
| T109 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.309460874 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:54 PM PDT 24 |
53782468 ps |
| T102 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.334371602 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:54 PM PDT 24 |
65579135 ps |
| T898 |
/workspace/coverage/cover_reg_top/28.clkmgr_intr_test.3917205111 |
|
|
Mar 21 12:43:56 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
11851925 ps |
| T899 |
/workspace/coverage/cover_reg_top/14.clkmgr_intr_test.2741379082 |
|
|
Mar 21 12:43:49 PM PDT 24 |
Mar 21 12:43:50 PM PDT 24 |
14719125 ps |
| T900 |
/workspace/coverage/cover_reg_top/42.clkmgr_intr_test.1375298009 |
|
|
Mar 21 12:44:09 PM PDT 24 |
Mar 21 12:44:10 PM PDT 24 |
13947021 ps |
| T901 |
/workspace/coverage/cover_reg_top/5.clkmgr_intr_test.1923944112 |
|
|
Mar 21 12:43:37 PM PDT 24 |
Mar 21 12:43:38 PM PDT 24 |
14904302 ps |
| T902 |
/workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.2779892940 |
|
|
Mar 21 12:43:34 PM PDT 24 |
Mar 21 12:43:35 PM PDT 24 |
95741759 ps |
| T903 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.3687176465 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
153602848 ps |
| T904 |
/workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.2049833661 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
236501716 ps |
| T905 |
/workspace/coverage/cover_reg_top/11.clkmgr_intr_test.494208141 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:54 PM PDT 24 |
14277279 ps |
| T110 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.146706486 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:58 PM PDT 24 |
246130660 ps |
| T111 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.2969751990 |
|
|
Mar 21 12:43:37 PM PDT 24 |
Mar 21 12:43:41 PM PDT 24 |
145215499 ps |
| T906 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.854705170 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
138671053 ps |
| T121 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.3742835578 |
|
|
Mar 21 12:43:35 PM PDT 24 |
Mar 21 12:43:38 PM PDT 24 |
169314069 ps |
| T907 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.2150392183 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
111135281 ps |
| T908 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.3521568012 |
|
|
Mar 21 12:43:32 PM PDT 24 |
Mar 21 12:43:33 PM PDT 24 |
21478009 ps |
| T112 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.894765818 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:40 PM PDT 24 |
121995037 ps |
| T116 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.3944625439 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
145747875 ps |
| T909 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.2262286298 |
|
|
Mar 21 12:43:23 PM PDT 24 |
Mar 21 12:43:25 PM PDT 24 |
243023071 ps |
| T910 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.1888650305 |
|
|
Mar 21 12:43:23 PM PDT 24 |
Mar 21 12:43:31 PM PDT 24 |
537351040 ps |
| T911 |
/workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.1736538323 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
421295541 ps |
| T912 |
/workspace/coverage/cover_reg_top/12.clkmgr_intr_test.2354600982 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:54 PM PDT 24 |
17628455 ps |
| T117 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.2660350341 |
|
|
Mar 21 12:43:33 PM PDT 24 |
Mar 21 12:43:35 PM PDT 24 |
70444853 ps |
| T913 |
/workspace/coverage/cover_reg_top/25.clkmgr_intr_test.839403704 |
|
|
Mar 21 12:43:56 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
75679438 ps |
| T98 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.2232240577 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
983451585 ps |
| T914 |
/workspace/coverage/cover_reg_top/48.clkmgr_intr_test.1633980045 |
|
|
Mar 21 12:44:07 PM PDT 24 |
Mar 21 12:44:08 PM PDT 24 |
13586761 ps |
| T915 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.29937187 |
|
|
Mar 21 12:43:25 PM PDT 24 |
Mar 21 12:43:26 PM PDT 24 |
145679152 ps |
| T916 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.533257719 |
|
|
Mar 21 12:43:15 PM PDT 24 |
Mar 21 12:43:17 PM PDT 24 |
72811723 ps |
| T917 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.2000141336 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:39 PM PDT 24 |
253950695 ps |
| T918 |
/workspace/coverage/cover_reg_top/39.clkmgr_intr_test.2028395778 |
|
|
Mar 21 12:44:07 PM PDT 24 |
Mar 21 12:44:08 PM PDT 24 |
36138174 ps |
| T919 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.1095876359 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:53 PM PDT 24 |
93121562 ps |
| T920 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.1291252956 |
|
|
Mar 21 12:43:35 PM PDT 24 |
Mar 21 12:43:39 PM PDT 24 |
419986473 ps |
| T921 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.985161319 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
59965380 ps |
| T922 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.3365592511 |
|
|
Mar 21 12:43:33 PM PDT 24 |
Mar 21 12:43:35 PM PDT 24 |
32895415 ps |
| T923 |
/workspace/coverage/cover_reg_top/17.clkmgr_intr_test.1582964941 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:54 PM PDT 24 |
20910156 ps |
| T151 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.2244525474 |
|
|
Mar 21 12:43:34 PM PDT 24 |
Mar 21 12:43:36 PM PDT 24 |
77290467 ps |
| T924 |
/workspace/coverage/cover_reg_top/43.clkmgr_intr_test.146334633 |
|
|
Mar 21 12:44:06 PM PDT 24 |
Mar 21 12:44:07 PM PDT 24 |
40442263 ps |
| T925 |
/workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.3191249250 |
|
|
Mar 21 12:43:50 PM PDT 24 |
Mar 21 12:43:53 PM PDT 24 |
473070061 ps |
| T926 |
/workspace/coverage/cover_reg_top/8.clkmgr_intr_test.3092492650 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:39 PM PDT 24 |
12136865 ps |
| T118 |
/workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.1442195419 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:38 PM PDT 24 |
293404773 ps |
| T927 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.4218096409 |
|
|
Mar 21 12:43:15 PM PDT 24 |
Mar 21 12:43:17 PM PDT 24 |
65801244 ps |
| T928 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.385032617 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
48186340 ps |
| T929 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.252201549 |
|
|
Mar 21 12:43:17 PM PDT 24 |
Mar 21 12:43:18 PM PDT 24 |
27264162 ps |
| T119 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors.766646828 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
249207790 ps |
| T930 |
/workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.3886885863 |
|
|
Mar 21 12:43:19 PM PDT 24 |
Mar 21 12:43:21 PM PDT 24 |
81239438 ps |
| T931 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.3557407114 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:37 PM PDT 24 |
65334727 ps |
| T932 |
/workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.2164497269 |
|
|
Mar 21 12:43:50 PM PDT 24 |
Mar 21 12:43:52 PM PDT 24 |
58406129 ps |
| T933 |
/workspace/coverage/cover_reg_top/30.clkmgr_intr_test.2108292257 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
14396219 ps |
| T113 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.984154705 |
|
|
Mar 21 12:43:17 PM PDT 24 |
Mar 21 12:43:19 PM PDT 24 |
99442289 ps |
| T934 |
/workspace/coverage/cover_reg_top/36.clkmgr_intr_test.606972445 |
|
|
Mar 21 12:44:10 PM PDT 24 |
Mar 21 12:44:11 PM PDT 24 |
30223629 ps |
| T935 |
/workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.433378013 |
|
|
Mar 21 12:43:25 PM PDT 24 |
Mar 21 12:43:26 PM PDT 24 |
42610457 ps |
| T936 |
/workspace/coverage/cover_reg_top/40.clkmgr_intr_test.4036889515 |
|
|
Mar 21 12:44:06 PM PDT 24 |
Mar 21 12:44:07 PM PDT 24 |
19552014 ps |
| T937 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.3231014920 |
|
|
Mar 21 12:43:56 PM PDT 24 |
Mar 21 12:44:00 PM PDT 24 |
266560285 ps |
| T938 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.3738522317 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
76792215 ps |
| T939 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.417499254 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
45790517 ps |
| T940 |
/workspace/coverage/cover_reg_top/34.clkmgr_intr_test.1832903148 |
|
|
Mar 21 12:44:04 PM PDT 24 |
Mar 21 12:44:05 PM PDT 24 |
67466411 ps |
| T941 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.1715245090 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:38 PM PDT 24 |
37180649 ps |
| T942 |
/workspace/coverage/cover_reg_top/4.clkmgr_same_csr_outstanding.5756597 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:37 PM PDT 24 |
29060669 ps |
| T943 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.1644555632 |
|
|
Mar 21 12:43:17 PM PDT 24 |
Mar 21 12:43:18 PM PDT 24 |
15482008 ps |
| T944 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.1007765281 |
|
|
Mar 21 12:43:19 PM PDT 24 |
Mar 21 12:43:21 PM PDT 24 |
19538094 ps |
| T945 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.1873034871 |
|
|
Mar 21 12:43:16 PM PDT 24 |
Mar 21 12:43:18 PM PDT 24 |
243842145 ps |
| T946 |
/workspace/coverage/cover_reg_top/29.clkmgr_intr_test.516545089 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
31591873 ps |
| T947 |
/workspace/coverage/cover_reg_top/31.clkmgr_intr_test.2654423827 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
20792531 ps |
| T948 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.623335115 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
237105001 ps |
| T949 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.2883087495 |
|
|
Mar 21 12:43:32 PM PDT 24 |
Mar 21 12:43:33 PM PDT 24 |
42358626 ps |
| T950 |
/workspace/coverage/cover_reg_top/21.clkmgr_intr_test.3049093234 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
31597476 ps |
| T951 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.3668331404 |
|
|
Mar 21 12:43:25 PM PDT 24 |
Mar 21 12:43:30 PM PDT 24 |
497936272 ps |
| T952 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.2820385854 |
|
|
Mar 21 12:43:51 PM PDT 24 |
Mar 21 12:43:52 PM PDT 24 |
103164058 ps |
| T953 |
/workspace/coverage/cover_reg_top/26.clkmgr_intr_test.2234123811 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
14181856 ps |
| T954 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.4195231986 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
26971394 ps |
| T955 |
/workspace/coverage/cover_reg_top/45.clkmgr_intr_test.299219460 |
|
|
Mar 21 12:44:07 PM PDT 24 |
Mar 21 12:44:08 PM PDT 24 |
77052555 ps |
| T956 |
/workspace/coverage/cover_reg_top/7.clkmgr_intr_test.592457590 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:37 PM PDT 24 |
35199465 ps |
| T957 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.1592765510 |
|
|
Mar 21 12:43:32 PM PDT 24 |
Mar 21 12:43:34 PM PDT 24 |
191067900 ps |
| T958 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.3185299998 |
|
|
Mar 21 12:43:13 PM PDT 24 |
Mar 21 12:43:15 PM PDT 24 |
47820665 ps |
| T959 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.4259787655 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
44842377 ps |
| T960 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.2007008732 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:58 PM PDT 24 |
308750526 ps |
| T961 |
/workspace/coverage/cover_reg_top/18.clkmgr_shadow_reg_errors_with_csr_rw.1052145358 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:59 PM PDT 24 |
435878228 ps |
| T97 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.1722776379 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:54 PM PDT 24 |
136653899 ps |
| T962 |
/workspace/coverage/cover_reg_top/49.clkmgr_intr_test.1538339083 |
|
|
Mar 21 12:44:06 PM PDT 24 |
Mar 21 12:44:06 PM PDT 24 |
71641655 ps |
| T963 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.3907906770 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:41 PM PDT 24 |
124516153 ps |
| T964 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.2777784628 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
226240401 ps |
| T965 |
/workspace/coverage/cover_reg_top/33.clkmgr_intr_test.131415097 |
|
|
Mar 21 12:44:04 PM PDT 24 |
Mar 21 12:44:05 PM PDT 24 |
25027050 ps |
| T966 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.3813307179 |
|
|
Mar 21 12:43:17 PM PDT 24 |
Mar 21 12:43:27 PM PDT 24 |
1330643080 ps |
| T967 |
/workspace/coverage/cover_reg_top/16.clkmgr_intr_test.1865101013 |
|
|
Mar 21 12:43:52 PM PDT 24 |
Mar 21 12:43:53 PM PDT 24 |
20738466 ps |
| T968 |
/workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.3804568025 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
60243867 ps |
| T969 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.2791459753 |
|
|
Mar 21 12:43:32 PM PDT 24 |
Mar 21 12:43:35 PM PDT 24 |
52549948 ps |
| T970 |
/workspace/coverage/cover_reg_top/22.clkmgr_intr_test.3782474818 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
10812730 ps |
| T971 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.4099223299 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:38 PM PDT 24 |
193459063 ps |
| T972 |
/workspace/coverage/cover_reg_top/19.clkmgr_intr_test.478644810 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
14556953 ps |
| T973 |
/workspace/coverage/cover_reg_top/10.clkmgr_intr_test.2732994297 |
|
|
Mar 21 12:43:57 PM PDT 24 |
Mar 21 12:43:58 PM PDT 24 |
18061618 ps |
| T974 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.1200627448 |
|
|
Mar 21 12:43:24 PM PDT 24 |
Mar 21 12:43:28 PM PDT 24 |
446262555 ps |
| T975 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.2526101864 |
|
|
Mar 21 12:43:33 PM PDT 24 |
Mar 21 12:43:40 PM PDT 24 |
1007004761 ps |
| T976 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.2055994761 |
|
|
Mar 21 12:43:50 PM PDT 24 |
Mar 21 12:43:52 PM PDT 24 |
57164148 ps |
| T977 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.1329384931 |
|
|
Mar 21 12:43:32 PM PDT 24 |
Mar 21 12:43:34 PM PDT 24 |
86935743 ps |
| T978 |
/workspace/coverage/cover_reg_top/18.clkmgr_intr_test.1033080136 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
13646999 ps |
| T979 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.3079429638 |
|
|
Mar 21 12:43:56 PM PDT 24 |
Mar 21 12:43:58 PM PDT 24 |
172907112 ps |
| T980 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.282417598 |
|
|
Mar 21 12:43:35 PM PDT 24 |
Mar 21 12:43:37 PM PDT 24 |
138306446 ps |
| T981 |
/workspace/coverage/cover_reg_top/4.clkmgr_intr_test.1630820156 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:38 PM PDT 24 |
37133185 ps |
| T982 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.2342515621 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
35475529 ps |
| T983 |
/workspace/coverage/cover_reg_top/41.clkmgr_intr_test.3008417772 |
|
|
Mar 21 12:44:07 PM PDT 24 |
Mar 21 12:44:08 PM PDT 24 |
14575399 ps |
| T984 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.3058999839 |
|
|
Mar 21 12:43:32 PM PDT 24 |
Mar 21 12:43:34 PM PDT 24 |
74782471 ps |
| T985 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.2875354573 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:37 PM PDT 24 |
42588139 ps |
| T986 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.3821251731 |
|
|
Mar 21 12:43:32 PM PDT 24 |
Mar 21 12:43:33 PM PDT 24 |
53172173 ps |
| T987 |
/workspace/coverage/cover_reg_top/20.clkmgr_intr_test.682592220 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
24668364 ps |
| T988 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.2707010988 |
|
|
Mar 21 12:43:24 PM PDT 24 |
Mar 21 12:43:27 PM PDT 24 |
308302231 ps |
| T989 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.2181339821 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:38 PM PDT 24 |
206234249 ps |
| T990 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.1025265124 |
|
|
Mar 21 12:43:34 PM PDT 24 |
Mar 21 12:43:35 PM PDT 24 |
37520374 ps |
| T991 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.1295846535 |
|
|
Mar 21 12:43:51 PM PDT 24 |
Mar 21 12:43:54 PM PDT 24 |
153190440 ps |
| T992 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.2979666577 |
|
|
Mar 21 12:43:19 PM PDT 24 |
Mar 21 12:43:22 PM PDT 24 |
286409832 ps |
| T993 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.383967537 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
17064736 ps |
| T994 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.917685388 |
|
|
Mar 21 12:43:54 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
32115369 ps |
| T995 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.2170981273 |
|
|
Mar 21 12:43:16 PM PDT 24 |
Mar 21 12:43:17 PM PDT 24 |
30964713 ps |
| T114 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.78458341 |
|
|
Mar 21 12:43:55 PM PDT 24 |
Mar 21 12:43:57 PM PDT 24 |
135667668 ps |
| T996 |
/workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.3398671704 |
|
|
Mar 21 12:43:17 PM PDT 24 |
Mar 21 12:43:18 PM PDT 24 |
36621784 ps |
| T997 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.4267970884 |
|
|
Mar 21 12:43:17 PM PDT 24 |
Mar 21 12:43:19 PM PDT 24 |
113081059 ps |
| T998 |
/workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.2579532441 |
|
|
Mar 21 12:43:38 PM PDT 24 |
Mar 21 12:43:41 PM PDT 24 |
197464474 ps |
| T999 |
/workspace/coverage/cover_reg_top/44.clkmgr_intr_test.2987238265 |
|
|
Mar 21 12:44:12 PM PDT 24 |
Mar 21 12:44:13 PM PDT 24 |
11306362 ps |
| T99 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.1002933730 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:55 PM PDT 24 |
63417556 ps |
| T95 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.961480207 |
|
|
Mar 21 12:43:17 PM PDT 24 |
Mar 21 12:43:19 PM PDT 24 |
71966593 ps |
| T1000 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_errors.3038216376 |
|
|
Mar 21 12:43:36 PM PDT 24 |
Mar 21 12:43:38 PM PDT 24 |
106060049 ps |
| T100 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_intg_err.389539650 |
|
|
Mar 21 12:43:53 PM PDT 24 |
Mar 21 12:43:56 PM PDT 24 |
121609504 ps |