| T795 |
/workspace/coverage/default/5.clkmgr_clk_handshake_intersig_mubi.1781213758 |
|
|
Mar 28 02:55:23 PM PDT 24 |
Mar 28 02:55:24 PM PDT 24 |
81903331 ps |
| T796 |
/workspace/coverage/default/9.clkmgr_div_intersig_mubi.1473194231 |
|
|
Mar 28 02:55:32 PM PDT 24 |
Mar 28 02:55:33 PM PDT 24 |
14132213 ps |
| T797 |
/workspace/coverage/default/2.clkmgr_lc_clk_byp_req_intersig_mubi.396173289 |
|
|
Mar 28 02:54:18 PM PDT 24 |
Mar 28 02:54:19 PM PDT 24 |
16102549 ps |
| T798 |
/workspace/coverage/default/35.clkmgr_stress_all_with_rand_reset.1310425966 |
|
|
Mar 28 02:58:24 PM PDT 24 |
Mar 28 03:03:57 PM PDT 24 |
53948604919 ps |
| T799 |
/workspace/coverage/default/8.clkmgr_frequency.3515867942 |
|
|
Mar 28 02:55:21 PM PDT 24 |
Mar 28 02:55:30 PM PDT 24 |
1520361939 ps |
| T800 |
/workspace/coverage/default/33.clkmgr_div_intersig_mubi.2325728816 |
|
|
Mar 28 02:58:19 PM PDT 24 |
Mar 28 02:58:20 PM PDT 24 |
28328028 ps |
| T801 |
/workspace/coverage/default/48.clkmgr_clk_status.2569957950 |
|
|
Mar 28 02:59:42 PM PDT 24 |
Mar 28 02:59:44 PM PDT 24 |
62521190 ps |
| T802 |
/workspace/coverage/default/14.clkmgr_extclk.3052328042 |
|
|
Mar 28 02:56:15 PM PDT 24 |
Mar 28 02:56:16 PM PDT 24 |
47208081 ps |
| T803 |
/workspace/coverage/default/48.clkmgr_alert_test.1827700871 |
|
|
Mar 28 02:59:44 PM PDT 24 |
Mar 28 02:59:46 PM PDT 24 |
15546257 ps |
| T804 |
/workspace/coverage/default/42.clkmgr_smoke.762983549 |
|
|
Mar 28 02:59:22 PM PDT 24 |
Mar 28 02:59:23 PM PDT 24 |
77336184 ps |
| T805 |
/workspace/coverage/default/5.clkmgr_stress_all_with_rand_reset.118829472 |
|
|
Mar 28 02:55:20 PM PDT 24 |
Mar 28 03:09:32 PM PDT 24 |
92250106670 ps |
| T806 |
/workspace/coverage/default/19.clkmgr_lc_clk_byp_req_intersig_mubi.1511863575 |
|
|
Mar 28 02:57:02 PM PDT 24 |
Mar 28 02:57:04 PM PDT 24 |
188832762 ps |
| T807 |
/workspace/coverage/default/33.clkmgr_stress_all.2275936631 |
|
|
Mar 28 02:58:19 PM PDT 24 |
Mar 28 02:58:24 PM PDT 24 |
779787734 ps |
| T808 |
/workspace/coverage/default/34.clkmgr_alert_test.352791570 |
|
|
Mar 28 02:58:24 PM PDT 24 |
Mar 28 02:58:25 PM PDT 24 |
28432391 ps |
| T809 |
/workspace/coverage/default/10.clkmgr_div_intersig_mubi.3823091760 |
|
|
Mar 28 02:55:51 PM PDT 24 |
Mar 28 02:55:52 PM PDT 24 |
26488147 ps |
| T810 |
/workspace/coverage/default/41.clkmgr_clk_status.2145833459 |
|
|
Mar 28 02:58:58 PM PDT 24 |
Mar 28 02:58:59 PM PDT 24 |
16657448 ps |
| T811 |
/workspace/coverage/default/38.clkmgr_alert_test.170092289 |
|
|
Mar 28 02:58:38 PM PDT 24 |
Mar 28 02:58:39 PM PDT 24 |
14211177 ps |
| T812 |
/workspace/coverage/default/3.clkmgr_stress_all_with_rand_reset.3788024627 |
|
|
Mar 28 02:54:50 PM PDT 24 |
Mar 28 03:06:40 PM PDT 24 |
103245909964 ps |
| T813 |
/workspace/coverage/default/35.clkmgr_clk_status.1282352988 |
|
|
Mar 28 02:58:21 PM PDT 24 |
Mar 28 02:58:22 PM PDT 24 |
24792245 ps |
| T814 |
/workspace/coverage/default/38.clkmgr_frequency_timeout.1387914760 |
|
|
Mar 28 02:58:39 PM PDT 24 |
Mar 28 02:58:53 PM PDT 24 |
1936402262 ps |
| T815 |
/workspace/coverage/default/16.clkmgr_extclk.1079829445 |
|
|
Mar 28 02:56:33 PM PDT 24 |
Mar 28 02:56:34 PM PDT 24 |
29436513 ps |
| T816 |
/workspace/coverage/default/10.clkmgr_stress_all.888829643 |
|
|
Mar 28 02:55:51 PM PDT 24 |
Mar 28 02:56:59 PM PDT 24 |
8974270488 ps |
| T817 |
/workspace/coverage/default/16.clkmgr_lc_clk_byp_req_intersig_mubi.3760912577 |
|
|
Mar 28 02:56:34 PM PDT 24 |
Mar 28 02:56:35 PM PDT 24 |
19217475 ps |
| T818 |
/workspace/coverage/default/23.clkmgr_stress_all.1263947021 |
|
|
Mar 28 02:57:30 PM PDT 24 |
Mar 28 02:57:31 PM PDT 24 |
49504410 ps |
| T819 |
/workspace/coverage/default/18.clkmgr_idle_intersig_mubi.3662892175 |
|
|
Mar 28 02:56:35 PM PDT 24 |
Mar 28 02:56:36 PM PDT 24 |
45624601 ps |
| T820 |
/workspace/coverage/default/40.clkmgr_clk_handshake_intersig_mubi.7382433 |
|
|
Mar 28 02:58:54 PM PDT 24 |
Mar 28 02:58:55 PM PDT 24 |
62611191 ps |
| T821 |
/workspace/coverage/default/44.clkmgr_lc_clk_byp_req_intersig_mubi.24409346 |
|
|
Mar 28 02:59:16 PM PDT 24 |
Mar 28 02:59:17 PM PDT 24 |
87656920 ps |
| T822 |
/workspace/coverage/default/31.clkmgr_stress_all_with_rand_reset.2512009333 |
|
|
Mar 28 02:58:11 PM PDT 24 |
Mar 28 03:06:24 PM PDT 24 |
89952796690 ps |
| T823 |
/workspace/coverage/default/36.clkmgr_clk_handshake_intersig_mubi.2550985804 |
|
|
Mar 28 02:58:37 PM PDT 24 |
Mar 28 02:58:38 PM PDT 24 |
50482642 ps |
| T824 |
/workspace/coverage/default/25.clkmgr_peri.1107753620 |
|
|
Mar 28 02:57:32 PM PDT 24 |
Mar 28 02:57:33 PM PDT 24 |
31854630 ps |
| T825 |
/workspace/coverage/default/47.clkmgr_clk_handshake_intersig_mubi.2372421449 |
|
|
Mar 28 02:59:45 PM PDT 24 |
Mar 28 02:59:46 PM PDT 24 |
31151059 ps |
| T826 |
/workspace/coverage/default/3.clkmgr_smoke.2287982383 |
|
|
Mar 28 02:54:51 PM PDT 24 |
Mar 28 02:54:52 PM PDT 24 |
24096262 ps |
| T827 |
/workspace/coverage/default/35.clkmgr_extclk.3073339625 |
|
|
Mar 28 02:58:21 PM PDT 24 |
Mar 28 02:58:22 PM PDT 24 |
47586629 ps |
| T828 |
/workspace/coverage/default/47.clkmgr_peri.3781373647 |
|
|
Mar 28 02:59:43 PM PDT 24 |
Mar 28 02:59:45 PM PDT 24 |
33676251 ps |
| T829 |
/workspace/coverage/default/41.clkmgr_lc_ctrl_intersig_mubi.1774151939 |
|
|
Mar 28 02:58:53 PM PDT 24 |
Mar 28 02:58:54 PM PDT 24 |
132276855 ps |
| T830 |
/workspace/coverage/default/10.clkmgr_idle_intersig_mubi.1534468814 |
|
|
Mar 28 02:55:56 PM PDT 24 |
Mar 28 02:55:58 PM PDT 24 |
21820147 ps |
| T35 |
/workspace/coverage/default/7.clkmgr_stress_all_with_rand_reset.3749883992 |
|
|
Mar 28 02:55:21 PM PDT 24 |
Mar 28 03:04:24 PM PDT 24 |
29700697036 ps |
| T831 |
/workspace/coverage/default/5.clkmgr_regwen.1598439013 |
|
|
Mar 28 02:55:22 PM PDT 24 |
Mar 28 02:55:28 PM PDT 24 |
1727010060 ps |
| T832 |
/workspace/coverage/default/38.clkmgr_trans.1811334081 |
|
|
Mar 28 02:58:37 PM PDT 24 |
Mar 28 02:58:39 PM PDT 24 |
89048110 ps |
| T833 |
/workspace/coverage/default/17.clkmgr_peri.2767407466 |
|
|
Mar 28 02:56:34 PM PDT 24 |
Mar 28 02:56:35 PM PDT 24 |
13032120 ps |
| T834 |
/workspace/coverage/default/11.clkmgr_stress_all_with_rand_reset.3616426878 |
|
|
Mar 28 02:56:14 PM PDT 24 |
Mar 28 03:05:58 PM PDT 24 |
98601737637 ps |
| T835 |
/workspace/coverage/default/23.clkmgr_idle_intersig_mubi.1019882028 |
|
|
Mar 28 02:57:27 PM PDT 24 |
Mar 28 02:57:28 PM PDT 24 |
36349939 ps |
| T836 |
/workspace/coverage/default/33.clkmgr_stress_all_with_rand_reset.2985083705 |
|
|
Mar 28 02:58:20 PM PDT 24 |
Mar 28 03:38:55 PM PDT 24 |
470517159062 ps |
| T837 |
/workspace/coverage/default/8.clkmgr_div_intersig_mubi.3162107907 |
|
|
Mar 28 02:55:23 PM PDT 24 |
Mar 28 02:55:24 PM PDT 24 |
40105959 ps |
| T838 |
/workspace/coverage/default/17.clkmgr_idle_intersig_mubi.1836634604 |
|
|
Mar 28 02:56:35 PM PDT 24 |
Mar 28 02:56:36 PM PDT 24 |
21161174 ps |
| T839 |
/workspace/coverage/default/8.clkmgr_clk_status.710333792 |
|
|
Mar 28 02:55:20 PM PDT 24 |
Mar 28 02:55:21 PM PDT 24 |
14485595 ps |
| T840 |
/workspace/coverage/default/23.clkmgr_alert_test.2446855300 |
|
|
Mar 28 02:57:26 PM PDT 24 |
Mar 28 02:57:27 PM PDT 24 |
41963386 ps |
| T841 |
/workspace/coverage/default/12.clkmgr_trans.2177239077 |
|
|
Mar 28 02:56:14 PM PDT 24 |
Mar 28 02:56:16 PM PDT 24 |
25262496 ps |
| T842 |
/workspace/coverage/default/41.clkmgr_trans.2621393431 |
|
|
Mar 28 02:58:58 PM PDT 24 |
Mar 28 02:58:59 PM PDT 24 |
29573015 ps |
| T843 |
/workspace/coverage/default/14.clkmgr_regwen.2477451834 |
|
|
Mar 28 02:56:15 PM PDT 24 |
Mar 28 02:56:17 PM PDT 24 |
476440972 ps |
| T844 |
/workspace/coverage/default/9.clkmgr_peri.823647210 |
|
|
Mar 28 02:55:33 PM PDT 24 |
Mar 28 02:55:34 PM PDT 24 |
13917215 ps |
| T845 |
/workspace/coverage/default/14.clkmgr_clk_handshake_intersig_mubi.2775222713 |
|
|
Mar 28 02:56:14 PM PDT 24 |
Mar 28 02:56:15 PM PDT 24 |
28834544 ps |
| T846 |
/workspace/coverage/default/29.clkmgr_smoke.2101195782 |
|
|
Mar 28 02:57:43 PM PDT 24 |
Mar 28 02:57:44 PM PDT 24 |
131753820 ps |
| T847 |
/workspace/coverage/default/23.clkmgr_stress_all_with_rand_reset.753206645 |
|
|
Mar 28 02:57:25 PM PDT 24 |
Mar 28 03:22:58 PM PDT 24 |
291230892861 ps |
| T848 |
/workspace/coverage/default/10.clkmgr_lc_clk_byp_req_intersig_mubi.2720246922 |
|
|
Mar 28 02:55:53 PM PDT 24 |
Mar 28 02:55:54 PM PDT 24 |
17157356 ps |
| T849 |
/workspace/coverage/cover_reg_top/44.clkmgr_intr_test.74840704 |
|
|
Mar 28 12:54:28 PM PDT 24 |
Mar 28 12:54:29 PM PDT 24 |
20953229 ps |
| T78 |
/workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.3969846720 |
|
|
Mar 28 12:54:09 PM PDT 24 |
Mar 28 12:54:10 PM PDT 24 |
90542240 ps |
| T850 |
/workspace/coverage/cover_reg_top/42.clkmgr_intr_test.3289548440 |
|
|
Mar 28 12:54:29 PM PDT 24 |
Mar 28 12:54:30 PM PDT 24 |
29363929 ps |
| T851 |
/workspace/coverage/cover_reg_top/11.clkmgr_intr_test.3298523653 |
|
|
Mar 28 12:54:08 PM PDT 24 |
Mar 28 12:54:09 PM PDT 24 |
26429125 ps |
| T852 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_errors.110002339 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:29 PM PDT 24 |
25637650 ps |
| T853 |
/workspace/coverage/cover_reg_top/36.clkmgr_intr_test.1785334373 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
17684248 ps |
| T54 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors_with_csr_rw.946711400 |
|
|
Mar 28 12:54:05 PM PDT 24 |
Mar 28 12:54:07 PM PDT 24 |
72990084 ps |
| T854 |
/workspace/coverage/cover_reg_top/46.clkmgr_intr_test.66449804 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:27 PM PDT 24 |
14497531 ps |
| T855 |
/workspace/coverage/cover_reg_top/14.clkmgr_intr_test.1764631917 |
|
|
Mar 28 12:54:07 PM PDT 24 |
Mar 28 12:54:08 PM PDT 24 |
11470691 ps |
| T79 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.2673963751 |
|
|
Mar 28 12:53:58 PM PDT 24 |
Mar 28 12:53:59 PM PDT 24 |
36814885 ps |
| T57 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors_with_csr_rw.141510676 |
|
|
Mar 28 12:54:24 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
91883253 ps |
| T856 |
/workspace/coverage/cover_reg_top/29.clkmgr_intr_test.825910095 |
|
|
Mar 28 12:54:20 PM PDT 24 |
Mar 28 12:54:21 PM PDT 24 |
25108688 ps |
| T857 |
/workspace/coverage/cover_reg_top/21.clkmgr_intr_test.155119765 |
|
|
Mar 28 12:54:25 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
10979164 ps |
| T80 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_rw.186868893 |
|
|
Mar 28 12:54:30 PM PDT 24 |
Mar 28 12:54:31 PM PDT 24 |
23890055 ps |
| T93 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.1316368154 |
|
|
Mar 28 12:54:12 PM PDT 24 |
Mar 28 12:54:15 PM PDT 24 |
198323834 ps |
| T81 |
/workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.1886083394 |
|
|
Mar 28 12:54:28 PM PDT 24 |
Mar 28 12:54:30 PM PDT 24 |
127668456 ps |
| T858 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_errors.826794609 |
|
|
Mar 28 12:54:11 PM PDT 24 |
Mar 28 12:54:13 PM PDT 24 |
193661782 ps |
| T859 |
/workspace/coverage/cover_reg_top/43.clkmgr_intr_test.1386220647 |
|
|
Mar 28 12:54:25 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
15474194 ps |
| T860 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.2456643486 |
|
|
Mar 28 12:53:51 PM PDT 24 |
Mar 28 12:53:55 PM PDT 24 |
363819912 ps |
| T861 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.532523936 |
|
|
Mar 28 12:54:07 PM PDT 24 |
Mar 28 12:54:08 PM PDT 24 |
28062170 ps |
| T94 |
/workspace/coverage/cover_reg_top/16.clkmgr_tl_intg_err.720841642 |
|
|
Mar 28 12:54:25 PM PDT 24 |
Mar 28 12:54:29 PM PDT 24 |
865232151 ps |
| T862 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_errors.1159425623 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
143370947 ps |
| T863 |
/workspace/coverage/cover_reg_top/37.clkmgr_intr_test.992281495 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:27 PM PDT 24 |
20754222 ps |
| T864 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.415118868 |
|
|
Mar 28 12:53:59 PM PDT 24 |
Mar 28 12:54:02 PM PDT 24 |
49342911 ps |
| T865 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_bit_bash.3673382736 |
|
|
Mar 28 12:53:49 PM PDT 24 |
Mar 28 12:54:00 PM PDT 24 |
1623502472 ps |
| T866 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_rw.43453622 |
|
|
Mar 28 12:54:02 PM PDT 24 |
Mar 28 12:54:04 PM PDT 24 |
33195074 ps |
| T867 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.227929717 |
|
|
Mar 28 12:53:53 PM PDT 24 |
Mar 28 12:53:55 PM PDT 24 |
20549640 ps |
| T868 |
/workspace/coverage/cover_reg_top/34.clkmgr_intr_test.2034168470 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
12614114 ps |
| T869 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_mem_rw_with_rand_reset.4021041393 |
|
|
Mar 28 12:53:55 PM PDT 24 |
Mar 28 12:53:58 PM PDT 24 |
165521091 ps |
| T82 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_rw.2492834384 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:11 PM PDT 24 |
37159495 ps |
| T83 |
/workspace/coverage/cover_reg_top/18.clkmgr_same_csr_outstanding.2988575614 |
|
|
Mar 28 12:54:25 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
35425760 ps |
| T84 |
/workspace/coverage/cover_reg_top/11.clkmgr_same_csr_outstanding.2543553002 |
|
|
Mar 28 12:54:06 PM PDT 24 |
Mar 28 12:54:08 PM PDT 24 |
216754330 ps |
| T95 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.3527837890 |
|
|
Mar 28 12:54:24 PM PDT 24 |
Mar 28 12:54:27 PM PDT 24 |
139908419 ps |
| T85 |
/workspace/coverage/cover_reg_top/6.clkmgr_same_csr_outstanding.1542588662 |
|
|
Mar 28 12:54:11 PM PDT 24 |
Mar 28 12:54:12 PM PDT 24 |
88499515 ps |
| T870 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_rw.1792684476 |
|
|
Mar 28 12:54:03 PM PDT 24 |
Mar 28 12:54:04 PM PDT 24 |
24576903 ps |
| T58 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors_with_csr_rw.3339232150 |
|
|
Mar 28 12:54:12 PM PDT 24 |
Mar 28 12:54:13 PM PDT 24 |
64374999 ps |
| T155 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.261609167 |
|
|
Mar 28 12:53:52 PM PDT 24 |
Mar 28 12:53:55 PM PDT 24 |
93045868 ps |
| T871 |
/workspace/coverage/cover_reg_top/18.clkmgr_intr_test.2190355242 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:27 PM PDT 24 |
39100779 ps |
| T100 |
/workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.2062780884 |
|
|
Mar 28 12:54:00 PM PDT 24 |
Mar 28 12:54:02 PM PDT 24 |
74848907 ps |
| T872 |
/workspace/coverage/cover_reg_top/0.clkmgr_same_csr_outstanding.742159300 |
|
|
Mar 28 12:53:53 PM PDT 24 |
Mar 28 12:53:56 PM PDT 24 |
148082858 ps |
| T873 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.3541778155 |
|
|
Mar 28 12:54:11 PM PDT 24 |
Mar 28 12:54:12 PM PDT 24 |
125038672 ps |
| T874 |
/workspace/coverage/cover_reg_top/17.clkmgr_same_csr_outstanding.997343454 |
|
|
Mar 28 12:54:24 PM PDT 24 |
Mar 28 12:54:25 PM PDT 24 |
124090470 ps |
| T875 |
/workspace/coverage/cover_reg_top/3.clkmgr_intr_test.713595698 |
|
|
Mar 28 12:53:53 PM PDT 24 |
Mar 28 12:53:55 PM PDT 24 |
12921480 ps |
| T876 |
/workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.544427592 |
|
|
Mar 28 12:54:07 PM PDT 24 |
Mar 28 12:54:08 PM PDT 24 |
69341030 ps |
| T877 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.1120964700 |
|
|
Mar 28 12:54:11 PM PDT 24 |
Mar 28 12:54:14 PM PDT 24 |
86678433 ps |
| T97 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_intg_err.1504137786 |
|
|
Mar 28 12:54:09 PM PDT 24 |
Mar 28 12:54:12 PM PDT 24 |
216050081 ps |
| T878 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.1755851356 |
|
|
Mar 28 12:53:59 PM PDT 24 |
Mar 28 12:54:00 PM PDT 24 |
17767428 ps |
| T879 |
/workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.2079155651 |
|
|
Mar 28 12:54:06 PM PDT 24 |
Mar 28 12:54:07 PM PDT 24 |
63006011 ps |
| T98 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_intg_err.551831870 |
|
|
Mar 28 12:54:12 PM PDT 24 |
Mar 28 12:54:15 PM PDT 24 |
269117864 ps |
| T880 |
/workspace/coverage/cover_reg_top/16.clkmgr_same_csr_outstanding.1068695811 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:27 PM PDT 24 |
55008835 ps |
| T156 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_intg_err.2508707563 |
|
|
Mar 28 12:54:23 PM PDT 24 |
Mar 28 12:54:25 PM PDT 24 |
70807163 ps |
| T55 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors_with_csr_rw.1499399785 |
|
|
Mar 28 12:54:09 PM PDT 24 |
Mar 28 12:54:12 PM PDT 24 |
107341073 ps |
| T881 |
/workspace/coverage/cover_reg_top/5.clkmgr_tl_errors.2353750352 |
|
|
Mar 28 12:53:55 PM PDT 24 |
Mar 28 12:53:57 PM PDT 24 |
33463853 ps |
| T882 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_mem_rw_with_rand_reset.3718634079 |
|
|
Mar 28 12:53:55 PM PDT 24 |
Mar 28 12:53:57 PM PDT 24 |
43647989 ps |
| T104 |
/workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.509718983 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:12 PM PDT 24 |
228862140 ps |
| T883 |
/workspace/coverage/cover_reg_top/8.clkmgr_intr_test.134933790 |
|
|
Mar 28 12:54:12 PM PDT 24 |
Mar 28 12:54:13 PM PDT 24 |
13398786 ps |
| T884 |
/workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.2952512969 |
|
|
Mar 28 12:54:11 PM PDT 24 |
Mar 28 12:54:13 PM PDT 24 |
86203087 ps |
| T885 |
/workspace/coverage/cover_reg_top/2.clkmgr_same_csr_outstanding.2816384498 |
|
|
Mar 28 12:53:54 PM PDT 24 |
Mar 28 12:53:57 PM PDT 24 |
54818972 ps |
| T886 |
/workspace/coverage/cover_reg_top/22.clkmgr_intr_test.2717627174 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
23645894 ps |
| T887 |
/workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.3600933974 |
|
|
Mar 28 12:54:25 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
25482859 ps |
| T888 |
/workspace/coverage/cover_reg_top/13.clkmgr_csr_rw.290847853 |
|
|
Mar 28 12:54:14 PM PDT 24 |
Mar 28 12:54:15 PM PDT 24 |
35781332 ps |
| T889 |
/workspace/coverage/cover_reg_top/28.clkmgr_intr_test.2138398281 |
|
|
Mar 28 12:54:29 PM PDT 24 |
Mar 28 12:54:30 PM PDT 24 |
110465885 ps |
| T890 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.1686666677 |
|
|
Mar 28 12:53:59 PM PDT 24 |
Mar 28 12:54:02 PM PDT 24 |
138841248 ps |
| T56 |
/workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors.1277904483 |
|
|
Mar 28 12:54:06 PM PDT 24 |
Mar 28 12:54:08 PM PDT 24 |
105923032 ps |
| T59 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors.4232004396 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:29 PM PDT 24 |
134982841 ps |
| T891 |
/workspace/coverage/cover_reg_top/3.clkmgr_tl_errors.2616047934 |
|
|
Mar 28 12:53:58 PM PDT 24 |
Mar 28 12:54:02 PM PDT 24 |
391378159 ps |
| T60 |
/workspace/coverage/cover_reg_top/10.clkmgr_shadow_reg_errors.170025113 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:12 PM PDT 24 |
100317370 ps |
| T892 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_hw_reset.313617780 |
|
|
Mar 28 12:53:52 PM PDT 24 |
Mar 28 12:53:53 PM PDT 24 |
25378150 ps |
| T893 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.3285853514 |
|
|
Mar 28 12:53:51 PM PDT 24 |
Mar 28 12:53:53 PM PDT 24 |
47159299 ps |
| T894 |
/workspace/coverage/cover_reg_top/1.clkmgr_same_csr_outstanding.2432630866 |
|
|
Mar 28 12:53:51 PM PDT 24 |
Mar 28 12:53:53 PM PDT 24 |
23571735 ps |
| T63 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.2072034447 |
|
|
Mar 28 12:54:03 PM PDT 24 |
Mar 28 12:54:06 PM PDT 24 |
54380722 ps |
| T115 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors.1858844986 |
|
|
Mar 28 12:53:52 PM PDT 24 |
Mar 28 12:53:53 PM PDT 24 |
63080441 ps |
| T895 |
/workspace/coverage/cover_reg_top/0.clkmgr_intr_test.141819238 |
|
|
Mar 28 12:53:52 PM PDT 24 |
Mar 28 12:53:53 PM PDT 24 |
41310011 ps |
| T896 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.3824965169 |
|
|
Mar 28 12:53:54 PM PDT 24 |
Mar 28 12:53:55 PM PDT 24 |
36682180 ps |
| T62 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors_with_csr_rw.1983589589 |
|
|
Mar 28 12:54:22 PM PDT 24 |
Mar 28 12:54:25 PM PDT 24 |
238522853 ps |
| T897 |
/workspace/coverage/cover_reg_top/1.clkmgr_intr_test.1802761816 |
|
|
Mar 28 12:53:55 PM PDT 24 |
Mar 28 12:53:58 PM PDT 24 |
62315732 ps |
| T61 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors_with_csr_rw.812473661 |
|
|
Mar 28 12:54:05 PM PDT 24 |
Mar 28 12:54:09 PM PDT 24 |
146502116 ps |
| T898 |
/workspace/coverage/cover_reg_top/5.clkmgr_intr_test.3795949492 |
|
|
Mar 28 12:53:55 PM PDT 24 |
Mar 28 12:53:56 PM PDT 24 |
68768175 ps |
| T120 |
/workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors.3378773402 |
|
|
Mar 28 12:54:05 PM PDT 24 |
Mar 28 12:54:07 PM PDT 24 |
213698185 ps |
| T899 |
/workspace/coverage/cover_reg_top/16.clkmgr_intr_test.1155502628 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:27 PM PDT 24 |
34888548 ps |
| T900 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.1378919582 |
|
|
Mar 28 12:53:53 PM PDT 24 |
Mar 28 12:53:58 PM PDT 24 |
224971972 ps |
| T116 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.1512104831 |
|
|
Mar 28 12:54:02 PM PDT 24 |
Mar 28 12:54:06 PM PDT 24 |
167239343 ps |
| T901 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_mem_rw_with_rand_reset.1867862826 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:12 PM PDT 24 |
95472665 ps |
| T902 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_rw.1802979332 |
|
|
Mar 28 12:53:59 PM PDT 24 |
Mar 28 12:54:00 PM PDT 24 |
22294306 ps |
| T903 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_rw.2553236070 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:11 PM PDT 24 |
16289804 ps |
| T904 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_mem_rw_with_rand_reset.813303406 |
|
|
Mar 28 12:54:04 PM PDT 24 |
Mar 28 12:54:06 PM PDT 24 |
155973547 ps |
| T905 |
/workspace/coverage/cover_reg_top/14.clkmgr_tl_errors.1681522103 |
|
|
Mar 28 12:54:11 PM PDT 24 |
Mar 28 12:54:14 PM PDT 24 |
70885098 ps |
| T906 |
/workspace/coverage/cover_reg_top/12.clkmgr_tl_errors.1269440285 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:15 PM PDT 24 |
506697377 ps |
| T907 |
/workspace/coverage/cover_reg_top/39.clkmgr_intr_test.247611711 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
124267962 ps |
| T908 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_mem_rw_with_rand_reset.1278372919 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
33388926 ps |
| T64 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.769341309 |
|
|
Mar 28 12:54:12 PM PDT 24 |
Mar 28 12:54:15 PM PDT 24 |
303067326 ps |
| T909 |
/workspace/coverage/cover_reg_top/13.clkmgr_intr_test.3758954587 |
|
|
Mar 28 12:54:06 PM PDT 24 |
Mar 28 12:54:07 PM PDT 24 |
13329257 ps |
| T910 |
/workspace/coverage/cover_reg_top/7.clkmgr_csr_mem_rw_with_rand_reset.1880942429 |
|
|
Mar 28 12:54:09 PM PDT 24 |
Mar 28 12:54:10 PM PDT 24 |
38975326 ps |
| T118 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors_with_csr_rw.589399179 |
|
|
Mar 28 12:54:08 PM PDT 24 |
Mar 28 12:54:11 PM PDT 24 |
178958820 ps |
| T124 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.1602542758 |
|
|
Mar 28 12:53:53 PM PDT 24 |
Mar 28 12:53:56 PM PDT 24 |
129557487 ps |
| T101 |
/workspace/coverage/cover_reg_top/0.clkmgr_tl_intg_err.4125932598 |
|
|
Mar 28 12:53:53 PM PDT 24 |
Mar 28 12:53:55 PM PDT 24 |
236616995 ps |
| T911 |
/workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.1262415679 |
|
|
Mar 28 12:54:08 PM PDT 24 |
Mar 28 12:54:09 PM PDT 24 |
101267215 ps |
| T912 |
/workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.1097227637 |
|
|
Mar 28 12:54:06 PM PDT 24 |
Mar 28 12:54:08 PM PDT 24 |
31568964 ps |
| T123 |
/workspace/coverage/cover_reg_top/6.clkmgr_shadow_reg_errors.1076263776 |
|
|
Mar 28 12:54:02 PM PDT 24 |
Mar 28 12:54:04 PM PDT 24 |
96765295 ps |
| T913 |
/workspace/coverage/cover_reg_top/27.clkmgr_intr_test.3259820547 |
|
|
Mar 28 12:54:25 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
13920871 ps |
| T914 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.3519599796 |
|
|
Mar 28 12:53:56 PM PDT 24 |
Mar 28 12:54:01 PM PDT 24 |
141637377 ps |
| T915 |
/workspace/coverage/cover_reg_top/19.clkmgr_intr_test.964147150 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
17183544 ps |
| T916 |
/workspace/coverage/cover_reg_top/25.clkmgr_intr_test.3385046550 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
50344681 ps |
| T917 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_mem_rw_with_rand_reset.1895439857 |
|
|
Mar 28 12:54:05 PM PDT 24 |
Mar 28 12:54:06 PM PDT 24 |
39339372 ps |
| T918 |
/workspace/coverage/cover_reg_top/31.clkmgr_intr_test.264487757 |
|
|
Mar 28 12:54:28 PM PDT 24 |
Mar 28 12:54:29 PM PDT 24 |
34182690 ps |
| T919 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.1104296875 |
|
|
Mar 28 12:53:54 PM PDT 24 |
Mar 28 12:53:57 PM PDT 24 |
85939804 ps |
| T920 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.2903055812 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
34645664 ps |
| T921 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_rw.2445983430 |
|
|
Mar 28 12:54:03 PM PDT 24 |
Mar 28 12:54:04 PM PDT 24 |
16152503 ps |
| T922 |
/workspace/coverage/cover_reg_top/9.clkmgr_csr_rw.3348600620 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:11 PM PDT 24 |
42048777 ps |
| T923 |
/workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.4128867853 |
|
|
Mar 28 12:53:54 PM PDT 24 |
Mar 28 12:53:57 PM PDT 24 |
94550449 ps |
| T65 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.1191194763 |
|
|
Mar 28 12:53:55 PM PDT 24 |
Mar 28 12:53:57 PM PDT 24 |
61672382 ps |
| T924 |
/workspace/coverage/cover_reg_top/41.clkmgr_intr_test.3113102342 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
24361892 ps |
| T925 |
/workspace/coverage/cover_reg_top/19.clkmgr_shadow_reg_errors_with_csr_rw.795668779 |
|
|
Mar 28 12:54:25 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
124723038 ps |
| T926 |
/workspace/coverage/cover_reg_top/6.clkmgr_tl_intg_err.2969997382 |
|
|
Mar 28 12:54:12 PM PDT 24 |
Mar 28 12:54:15 PM PDT 24 |
214970682 ps |
| T927 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.316476553 |
|
|
Mar 28 12:53:56 PM PDT 24 |
Mar 28 12:53:58 PM PDT 24 |
78557132 ps |
| T928 |
/workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.383565183 |
|
|
Mar 28 12:53:55 PM PDT 24 |
Mar 28 12:53:57 PM PDT 24 |
41190721 ps |
| T929 |
/workspace/coverage/cover_reg_top/4.clkmgr_intr_test.909082999 |
|
|
Mar 28 12:53:59 PM PDT 24 |
Mar 28 12:54:01 PM PDT 24 |
73238442 ps |
| T930 |
/workspace/coverage/cover_reg_top/35.clkmgr_intr_test.19740183 |
|
|
Mar 28 12:54:28 PM PDT 24 |
Mar 28 12:54:29 PM PDT 24 |
12830477 ps |
| T931 |
/workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.2715574357 |
|
|
Mar 28 12:53:58 PM PDT 24 |
Mar 28 12:54:01 PM PDT 24 |
66802042 ps |
| T932 |
/workspace/coverage/cover_reg_top/45.clkmgr_intr_test.3876620543 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:27 PM PDT 24 |
11457587 ps |
| T933 |
/workspace/coverage/cover_reg_top/16.clkmgr_csr_mem_rw_with_rand_reset.2562825395 |
|
|
Mar 28 12:54:24 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
177335473 ps |
| T934 |
/workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors_with_csr_rw.119508895 |
|
|
Mar 28 12:54:14 PM PDT 24 |
Mar 28 12:54:16 PM PDT 24 |
118678025 ps |
| T935 |
/workspace/coverage/cover_reg_top/20.clkmgr_intr_test.3139867656 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
14194839 ps |
| T936 |
/workspace/coverage/cover_reg_top/48.clkmgr_intr_test.1466476413 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:27 PM PDT 24 |
13447170 ps |
| T103 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.1908767405 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:13 PM PDT 24 |
146682601 ps |
| T937 |
/workspace/coverage/cover_reg_top/7.clkmgr_intr_test.109276701 |
|
|
Mar 28 12:54:02 PM PDT 24 |
Mar 28 12:54:04 PM PDT 24 |
17285226 ps |
| T938 |
/workspace/coverage/cover_reg_top/17.clkmgr_csr_rw.3131011794 |
|
|
Mar 28 12:54:22 PM PDT 24 |
Mar 28 12:54:24 PM PDT 24 |
51937170 ps |
| T939 |
/workspace/coverage/cover_reg_top/47.clkmgr_intr_test.2976064181 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
20442141 ps |
| T940 |
/workspace/coverage/cover_reg_top/12.clkmgr_intr_test.1674462504 |
|
|
Mar 28 12:54:09 PM PDT 24 |
Mar 28 12:54:10 PM PDT 24 |
27312075 ps |
| T941 |
/workspace/coverage/cover_reg_top/26.clkmgr_intr_test.448888603 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
11547801 ps |
| T942 |
/workspace/coverage/cover_reg_top/7.clkmgr_same_csr_outstanding.281376547 |
|
|
Mar 28 12:54:01 PM PDT 24 |
Mar 28 12:54:05 PM PDT 24 |
164118779 ps |
| T119 |
/workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.2170039416 |
|
|
Mar 28 12:54:03 PM PDT 24 |
Mar 28 12:54:05 PM PDT 24 |
117773978 ps |
| T122 |
/workspace/coverage/cover_reg_top/17.clkmgr_shadow_reg_errors.2089501768 |
|
|
Mar 28 12:54:21 PM PDT 24 |
Mar 28 12:54:23 PM PDT 24 |
76173209 ps |
| T943 |
/workspace/coverage/cover_reg_top/3.clkmgr_same_csr_outstanding.3697680055 |
|
|
Mar 28 12:54:03 PM PDT 24 |
Mar 28 12:54:05 PM PDT 24 |
116866729 ps |
| T944 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_intg_err.3264537627 |
|
|
Mar 28 12:54:06 PM PDT 24 |
Mar 28 12:54:07 PM PDT 24 |
53699038 ps |
| T945 |
/workspace/coverage/cover_reg_top/2.clkmgr_tl_intg_err.2288500410 |
|
|
Mar 28 12:54:00 PM PDT 24 |
Mar 28 12:54:02 PM PDT 24 |
61318105 ps |
| T946 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.1177065136 |
|
|
Mar 28 12:53:54 PM PDT 24 |
Mar 28 12:53:57 PM PDT 24 |
50981757 ps |
| T947 |
/workspace/coverage/cover_reg_top/10.clkmgr_same_csr_outstanding.1716383277 |
|
|
Mar 28 12:54:09 PM PDT 24 |
Mar 28 12:54:12 PM PDT 24 |
380694081 ps |
| T948 |
/workspace/coverage/cover_reg_top/33.clkmgr_intr_test.3010728650 |
|
|
Mar 28 12:54:25 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
25487612 ps |
| T121 |
/workspace/coverage/cover_reg_top/4.clkmgr_shadow_reg_errors.491860938 |
|
|
Mar 28 12:53:56 PM PDT 24 |
Mar 28 12:53:59 PM PDT 24 |
163771732 ps |
| T949 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.950769916 |
|
|
Mar 28 12:53:54 PM PDT 24 |
Mar 28 12:54:00 PM PDT 24 |
142454518 ps |
| T950 |
/workspace/coverage/cover_reg_top/2.clkmgr_intr_test.493267924 |
|
|
Mar 28 12:53:54 PM PDT 24 |
Mar 28 12:53:57 PM PDT 24 |
12006766 ps |
| T117 |
/workspace/coverage/cover_reg_top/16.clkmgr_shadow_reg_errors.4169038233 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:29 PM PDT 24 |
124067056 ps |
| T951 |
/workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.3575367347 |
|
|
Mar 28 12:53:50 PM PDT 24 |
Mar 28 12:53:52 PM PDT 24 |
169521422 ps |
| T952 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_errors.3325859636 |
|
|
Mar 28 12:54:09 PM PDT 24 |
Mar 28 12:54:13 PM PDT 24 |
444656966 ps |
| T953 |
/workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.459639950 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:11 PM PDT 24 |
52725412 ps |
| T954 |
/workspace/coverage/cover_reg_top/17.clkmgr_tl_intg_err.3421193459 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:30 PM PDT 24 |
360717811 ps |
| T955 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.747869687 |
|
|
Mar 28 12:53:55 PM PDT 24 |
Mar 28 12:53:57 PM PDT 24 |
46213835 ps |
| T956 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors_with_csr_rw.3255235906 |
|
|
Mar 28 12:54:12 PM PDT 24 |
Mar 28 12:54:14 PM PDT 24 |
209376326 ps |
| T957 |
/workspace/coverage/cover_reg_top/49.clkmgr_intr_test.2489556762 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:27 PM PDT 24 |
13946496 ps |
| T958 |
/workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.1794287977 |
|
|
Mar 28 12:53:54 PM PDT 24 |
Mar 28 12:53:57 PM PDT 24 |
49420832 ps |
| T959 |
/workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.2003641036 |
|
|
Mar 28 12:54:24 PM PDT 24 |
Mar 28 12:54:25 PM PDT 24 |
76964290 ps |
| T960 |
/workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.23372732 |
|
|
Mar 28 12:54:09 PM PDT 24 |
Mar 28 12:54:10 PM PDT 24 |
52292714 ps |
| T961 |
/workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.2392038518 |
|
|
Mar 28 12:54:12 PM PDT 24 |
Mar 28 12:54:15 PM PDT 24 |
232735108 ps |
| T962 |
/workspace/coverage/cover_reg_top/17.clkmgr_intr_test.735829296 |
|
|
Mar 28 12:54:25 PM PDT 24 |
Mar 28 12:54:25 PM PDT 24 |
70176567 ps |
| T963 |
/workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.4060977195 |
|
|
Mar 28 12:54:11 PM PDT 24 |
Mar 28 12:54:13 PM PDT 24 |
65903714 ps |
| T964 |
/workspace/coverage/cover_reg_top/9.clkmgr_shadow_reg_errors_with_csr_rw.1682739079 |
|
|
Mar 28 12:54:02 PM PDT 24 |
Mar 28 12:54:06 PM PDT 24 |
226311853 ps |
| T965 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.2823634294 |
|
|
Mar 28 12:53:51 PM PDT 24 |
Mar 28 12:53:52 PM PDT 24 |
14301757 ps |
| T966 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors.1425332458 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:12 PM PDT 24 |
193444351 ps |
| T967 |
/workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors_with_csr_rw.529367544 |
|
|
Mar 28 12:53:55 PM PDT 24 |
Mar 28 12:53:59 PM PDT 24 |
149639196 ps |
| T968 |
/workspace/coverage/cover_reg_top/8.clkmgr_csr_mem_rw_with_rand_reset.4085520444 |
|
|
Mar 28 12:54:01 PM PDT 24 |
Mar 28 12:54:03 PM PDT 24 |
415890643 ps |
| T969 |
/workspace/coverage/cover_reg_top/11.clkmgr_shadow_reg_errors_with_csr_rw.1817590372 |
|
|
Mar 28 12:54:12 PM PDT 24 |
Mar 28 12:54:16 PM PDT 24 |
253525982 ps |
| T970 |
/workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.1588805547 |
|
|
Mar 28 12:54:04 PM PDT 24 |
Mar 28 12:54:12 PM PDT 24 |
2240245881 ps |
| T971 |
/workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.1969021172 |
|
|
Mar 28 12:54:09 PM PDT 24 |
Mar 28 12:54:10 PM PDT 24 |
62548757 ps |
| T972 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.3840050857 |
|
|
Mar 28 12:53:55 PM PDT 24 |
Mar 28 12:54:03 PM PDT 24 |
654924164 ps |
| T973 |
/workspace/coverage/cover_reg_top/9.clkmgr_tl_errors.2133556327 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:14 PM PDT 24 |
154490824 ps |
| T974 |
/workspace/coverage/cover_reg_top/5.clkmgr_csr_mem_rw_with_rand_reset.578388711 |
|
|
Mar 28 12:54:11 PM PDT 24 |
Mar 28 12:54:13 PM PDT 24 |
28178414 ps |
| T975 |
/workspace/coverage/cover_reg_top/15.clkmgr_csr_rw.4102138697 |
|
|
Mar 28 12:54:06 PM PDT 24 |
Mar 28 12:54:07 PM PDT 24 |
40584492 ps |
| T976 |
/workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.2576624082 |
|
|
Mar 28 12:54:14 PM PDT 24 |
Mar 28 12:54:15 PM PDT 24 |
73382528 ps |
| T99 |
/workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.3189185643 |
|
|
Mar 28 12:54:06 PM PDT 24 |
Mar 28 12:54:08 PM PDT 24 |
91676392 ps |
| T977 |
/workspace/coverage/cover_reg_top/10.clkmgr_intr_test.3197355263 |
|
|
Mar 28 12:54:08 PM PDT 24 |
Mar 28 12:54:09 PM PDT 24 |
11719425 ps |
| T978 |
/workspace/coverage/cover_reg_top/6.clkmgr_intr_test.4091145052 |
|
|
Mar 28 12:54:09 PM PDT 24 |
Mar 28 12:54:10 PM PDT 24 |
14367252 ps |
| T979 |
/workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.3723466605 |
|
|
Mar 28 12:54:23 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
130415422 ps |
| T980 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_rw.3667222056 |
|
|
Mar 28 12:53:51 PM PDT 24 |
Mar 28 12:53:52 PM PDT 24 |
37291320 ps |
| T981 |
/workspace/coverage/cover_reg_top/4.clkmgr_tl_errors.2209487630 |
|
|
Mar 28 12:53:59 PM PDT 24 |
Mar 28 12:54:02 PM PDT 24 |
32182776 ps |
| T982 |
/workspace/coverage/cover_reg_top/38.clkmgr_intr_test.2195818724 |
|
|
Mar 28 12:54:24 PM PDT 24 |
Mar 28 12:54:25 PM PDT 24 |
16210503 ps |
| T983 |
/workspace/coverage/cover_reg_top/15.clkmgr_intr_test.3869576041 |
|
|
Mar 28 12:54:10 PM PDT 24 |
Mar 28 12:54:11 PM PDT 24 |
14203535 ps |
| T984 |
/workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.3575230495 |
|
|
Mar 28 12:53:54 PM PDT 24 |
Mar 28 12:53:56 PM PDT 24 |
89515961 ps |
| T985 |
/workspace/coverage/cover_reg_top/24.clkmgr_intr_test.2763581011 |
|
|
Mar 28 12:54:27 PM PDT 24 |
Mar 28 12:54:28 PM PDT 24 |
23420447 ps |
| T986 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_rw.2468521612 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:27 PM PDT 24 |
14876453 ps |
| T987 |
/workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.3102806681 |
|
|
Mar 28 12:53:56 PM PDT 24 |
Mar 28 12:54:01 PM PDT 24 |
291035371 ps |
| T988 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors_with_csr_rw.1443231919 |
|
|
Mar 28 12:54:06 PM PDT 24 |
Mar 28 12:54:09 PM PDT 24 |
204700809 ps |
| T989 |
/workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.3906069290 |
|
|
Mar 28 12:54:07 PM PDT 24 |
Mar 28 12:54:08 PM PDT 24 |
56780762 ps |
| T990 |
/workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.2177060421 |
|
|
Mar 28 12:54:23 PM PDT 24 |
Mar 28 12:54:24 PM PDT 24 |
40640694 ps |
| T991 |
/workspace/coverage/cover_reg_top/0.clkmgr_csr_rw.3483943767 |
|
|
Mar 28 12:53:53 PM PDT 24 |
Mar 28 12:53:55 PM PDT 24 |
52543041 ps |
| T992 |
/workspace/coverage/cover_reg_top/6.clkmgr_csr_mem_rw_with_rand_reset.1613974680 |
|
|
Mar 28 12:54:06 PM PDT 24 |
Mar 28 12:54:07 PM PDT 24 |
33864799 ps |
| T993 |
/workspace/coverage/cover_reg_top/9.clkmgr_intr_test.4240648256 |
|
|
Mar 28 12:54:11 PM PDT 24 |
Mar 28 12:54:12 PM PDT 24 |
17768496 ps |
| T994 |
/workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.1042021899 |
|
|
Mar 28 12:54:07 PM PDT 24 |
Mar 28 12:54:09 PM PDT 24 |
194587040 ps |
| T995 |
/workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.1050007653 |
|
|
Mar 28 12:54:15 PM PDT 24 |
Mar 28 12:54:16 PM PDT 24 |
43490849 ps |
| T996 |
/workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.1753869990 |
|
|
Mar 28 12:53:54 PM PDT 24 |
Mar 28 12:53:59 PM PDT 24 |
233600488 ps |
| T997 |
/workspace/coverage/cover_reg_top/30.clkmgr_intr_test.3853186921 |
|
|
Mar 28 12:54:26 PM PDT 24 |
Mar 28 12:54:27 PM PDT 24 |
15170673 ps |
| T998 |
/workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.414722654 |
|
|
Mar 28 12:53:57 PM PDT 24 |
Mar 28 12:54:01 PM PDT 24 |
219496802 ps |
| T999 |
/workspace/coverage/cover_reg_top/1.clkmgr_csr_mem_rw_with_rand_reset.56788850 |
|
|
Mar 28 12:53:51 PM PDT 24 |
Mar 28 12:53:53 PM PDT 24 |
169915583 ps |
| T1000 |
/workspace/coverage/cover_reg_top/32.clkmgr_intr_test.2571194385 |
|
|
Mar 28 12:54:25 PM PDT 24 |
Mar 28 12:54:26 PM PDT 24 |
14463903 ps |
| T1001 |
/workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors_with_csr_rw.2876498635 |
|
|
Mar 28 12:54:06 PM PDT 24 |
Mar 28 12:54:08 PM PDT 24 |
55614336 ps |