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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.52 99.15 95.84 100.00 100.00 98.81 97.01 98.80


Total test records in report: 1010
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T803 /workspace/coverage/default/48.clkmgr_trans.907874843 Apr 02 01:00:36 PM PDT 24 Apr 02 01:00:38 PM PDT 24 73333637 ps
T804 /workspace/coverage/default/5.clkmgr_frequency.3440294561 Apr 02 12:59:09 PM PDT 24 Apr 02 12:59:19 PM PDT 24 1043301749 ps
T805 /workspace/coverage/default/20.clkmgr_stress_all.1424713710 Apr 02 12:59:46 PM PDT 24 Apr 02 01:00:15 PM PDT 24 3977625112 ps
T806 /workspace/coverage/default/0.clkmgr_div_intersig_mubi.3515536053 Apr 02 12:59:00 PM PDT 24 Apr 02 12:59:03 PM PDT 24 17091667 ps
T807 /workspace/coverage/default/25.clkmgr_peri.672198613 Apr 02 12:59:52 PM PDT 24 Apr 02 12:59:52 PM PDT 24 41549298 ps
T808 /workspace/coverage/default/3.clkmgr_clk_handshake_intersig_mubi.1799580683 Apr 02 12:59:05 PM PDT 24 Apr 02 12:59:08 PM PDT 24 171629134 ps
T809 /workspace/coverage/default/9.clkmgr_stress_all.4147793968 Apr 02 12:59:27 PM PDT 24 Apr 02 01:00:08 PM PDT 24 5134833366 ps
T810 /workspace/coverage/default/3.clkmgr_regwen.40108254 Apr 02 12:59:06 PM PDT 24 Apr 02 12:59:08 PM PDT 24 213231059 ps
T811 /workspace/coverage/default/48.clkmgr_idle_intersig_mubi.567012696 Apr 02 01:00:46 PM PDT 24 Apr 02 01:00:47 PM PDT 24 15112948 ps
T812 /workspace/coverage/default/49.clkmgr_extclk.466987340 Apr 02 01:00:51 PM PDT 24 Apr 02 01:00:55 PM PDT 24 21900597 ps
T813 /workspace/coverage/default/18.clkmgr_stress_all.1475799911 Apr 02 12:59:46 PM PDT 24 Apr 02 12:59:53 PM PDT 24 2097341250 ps
T814 /workspace/coverage/default/28.clkmgr_alert_test.1738898181 Apr 02 01:00:20 PM PDT 24 Apr 02 01:00:21 PM PDT 24 15408186 ps
T815 /workspace/coverage/default/35.clkmgr_trans.2608311599 Apr 02 01:00:27 PM PDT 24 Apr 02 01:00:28 PM PDT 24 59700482 ps
T816 /workspace/coverage/default/39.clkmgr_lc_clk_byp_req_intersig_mubi.4001368618 Apr 02 01:00:41 PM PDT 24 Apr 02 01:00:42 PM PDT 24 19198405 ps
T817 /workspace/coverage/default/22.clkmgr_clk_status.2003941118 Apr 02 12:59:48 PM PDT 24 Apr 02 12:59:49 PM PDT 24 23645477 ps
T818 /workspace/coverage/default/42.clkmgr_alert_test.2571698598 Apr 02 01:00:45 PM PDT 24 Apr 02 01:00:46 PM PDT 24 13548117 ps
T819 /workspace/coverage/default/24.clkmgr_lc_clk_byp_req_intersig_mubi.4191125763 Apr 02 12:59:58 PM PDT 24 Apr 02 12:59:59 PM PDT 24 17061987 ps
T820 /workspace/coverage/default/32.clkmgr_clk_status.2913853608 Apr 02 01:00:08 PM PDT 24 Apr 02 01:00:10 PM PDT 24 18419629 ps
T821 /workspace/coverage/default/13.clkmgr_regwen.613636365 Apr 02 12:59:33 PM PDT 24 Apr 02 12:59:36 PM PDT 24 519859244 ps
T822 /workspace/coverage/default/7.clkmgr_peri.288051225 Apr 02 12:59:16 PM PDT 24 Apr 02 12:59:17 PM PDT 24 43208349 ps
T823 /workspace/coverage/default/39.clkmgr_clk_handshake_intersig_mubi.2839188369 Apr 02 01:00:17 PM PDT 24 Apr 02 01:00:19 PM PDT 24 16124247 ps
T824 /workspace/coverage/default/10.clkmgr_trans.1613185357 Apr 02 12:59:29 PM PDT 24 Apr 02 12:59:30 PM PDT 24 42299358 ps
T825 /workspace/coverage/default/44.clkmgr_div_intersig_mubi.3048956504 Apr 02 01:00:34 PM PDT 24 Apr 02 01:00:35 PM PDT 24 29717020 ps
T826 /workspace/coverage/default/8.clkmgr_peri.2682777559 Apr 02 12:59:22 PM PDT 24 Apr 02 12:59:23 PM PDT 24 18966341 ps
T827 /workspace/coverage/default/8.clkmgr_clk_handshake_intersig_mubi.1684553740 Apr 02 12:59:23 PM PDT 24 Apr 02 12:59:24 PM PDT 24 19458737 ps
T828 /workspace/coverage/default/31.clkmgr_extclk.619674474 Apr 02 01:00:12 PM PDT 24 Apr 02 01:00:15 PM PDT 24 102612712 ps
T39 /workspace/coverage/default/2.clkmgr_sec_cm.3483606465 Apr 02 12:59:02 PM PDT 24 Apr 02 12:59:07 PM PDT 24 572952081 ps
T829 /workspace/coverage/default/12.clkmgr_clk_status.2567041456 Apr 02 12:59:35 PM PDT 24 Apr 02 12:59:36 PM PDT 24 43631114 ps
T830 /workspace/coverage/default/11.clkmgr_peri.3884348624 Apr 02 12:59:32 PM PDT 24 Apr 02 12:59:33 PM PDT 24 40011013 ps
T831 /workspace/coverage/default/49.clkmgr_regwen.714464699 Apr 02 01:01:09 PM PDT 24 Apr 02 01:01:19 PM PDT 24 703437320 ps
T832 /workspace/coverage/default/30.clkmgr_lc_clk_byp_req_intersig_mubi.4168541979 Apr 02 01:00:13 PM PDT 24 Apr 02 01:00:15 PM PDT 24 57322810 ps
T833 /workspace/coverage/default/11.clkmgr_frequency.2241242819 Apr 02 12:59:32 PM PDT 24 Apr 02 12:59:51 PM PDT 24 2481879160 ps
T834 /workspace/coverage/default/46.clkmgr_regwen.3825800719 Apr 02 01:00:35 PM PDT 24 Apr 02 01:00:36 PM PDT 24 161895986 ps
T835 /workspace/coverage/default/28.clkmgr_extclk.2552712454 Apr 02 01:00:22 PM PDT 24 Apr 02 01:00:23 PM PDT 24 44933899 ps
T836 /workspace/coverage/default/37.clkmgr_frequency.1200175798 Apr 02 01:00:21 PM PDT 24 Apr 02 01:00:40 PM PDT 24 2356377996 ps
T837 /workspace/coverage/default/30.clkmgr_peri.1643625196 Apr 02 01:00:14 PM PDT 24 Apr 02 01:00:15 PM PDT 24 53987324 ps
T838 /workspace/coverage/default/6.clkmgr_regwen.17574419 Apr 02 12:59:18 PM PDT 24 Apr 02 12:59:23 PM PDT 24 780601617 ps
T839 /workspace/coverage/default/40.clkmgr_stress_all.2268981414 Apr 02 01:00:16 PM PDT 24 Apr 02 01:00:29 PM PDT 24 4250453721 ps
T840 /workspace/coverage/default/14.clkmgr_stress_all.3888883650 Apr 02 12:59:36 PM PDT 24 Apr 02 12:59:44 PM PDT 24 1878706363 ps
T841 /workspace/coverage/default/3.clkmgr_div_intersig_mubi.1530120500 Apr 02 12:59:05 PM PDT 24 Apr 02 12:59:08 PM PDT 24 69267640 ps
T842 /workspace/coverage/default/7.clkmgr_trans.1963693283 Apr 02 12:59:17 PM PDT 24 Apr 02 12:59:18 PM PDT 24 17230097 ps
T843 /workspace/coverage/default/20.clkmgr_trans.3316934894 Apr 02 12:59:46 PM PDT 24 Apr 02 12:59:47 PM PDT 24 40143554 ps
T40 /workspace/coverage/default/0.clkmgr_sec_cm.3426123813 Apr 02 12:59:00 PM PDT 24 Apr 02 12:59:04 PM PDT 24 307121745 ps
T844 /workspace/coverage/default/16.clkmgr_div_intersig_mubi.3029107574 Apr 02 12:59:40 PM PDT 24 Apr 02 12:59:41 PM PDT 24 81112866 ps
T845 /workspace/coverage/default/30.clkmgr_frequency.443653564 Apr 02 01:00:08 PM PDT 24 Apr 02 01:00:17 PM PDT 24 1925965269 ps
T846 /workspace/coverage/default/35.clkmgr_idle_intersig_mubi.3958797937 Apr 02 01:00:12 PM PDT 24 Apr 02 01:00:19 PM PDT 24 38143998 ps
T847 /workspace/coverage/default/32.clkmgr_smoke.525954143 Apr 02 01:00:14 PM PDT 24 Apr 02 01:00:16 PM PDT 24 27599575 ps
T848 /workspace/coverage/default/28.clkmgr_clk_status.3301745097 Apr 02 01:00:06 PM PDT 24 Apr 02 01:00:07 PM PDT 24 41530623 ps
T849 /workspace/coverage/default/40.clkmgr_alert_test.97050981 Apr 02 01:00:27 PM PDT 24 Apr 02 01:00:28 PM PDT 24 50585846 ps
T850 /workspace/coverage/default/3.clkmgr_frequency_timeout.1458866464 Apr 02 12:59:06 PM PDT 24 Apr 02 12:59:14 PM PDT 24 1594165512 ps
T851 /workspace/coverage/default/40.clkmgr_trans.2692060473 Apr 02 01:00:19 PM PDT 24 Apr 02 01:00:21 PM PDT 24 95574366 ps
T852 /workspace/coverage/default/1.clkmgr_div_intersig_mubi.3201367626 Apr 02 12:59:03 PM PDT 24 Apr 02 12:59:06 PM PDT 24 77679583 ps
T853 /workspace/coverage/default/22.clkmgr_lc_clk_byp_req_intersig_mubi.3407397664 Apr 02 12:59:51 PM PDT 24 Apr 02 12:59:52 PM PDT 24 57179926 ps
T854 /workspace/coverage/default/47.clkmgr_lc_ctrl_intersig_mubi.1677759355 Apr 02 01:00:43 PM PDT 24 Apr 02 01:00:44 PM PDT 24 18311677 ps
T855 /workspace/coverage/default/18.clkmgr_regwen.3513158533 Apr 02 12:59:41 PM PDT 24 Apr 02 12:59:48 PM PDT 24 1071628885 ps
T103 /workspace/coverage/cover_reg_top/3.clkmgr_tl_intg_err.1463941492 Apr 02 12:28:15 PM PDT 24 Apr 02 12:28:18 PM PDT 24 188536783 ps
T76 /workspace/coverage/cover_reg_top/13.clkmgr_same_csr_outstanding.1670601380 Apr 02 12:28:50 PM PDT 24 Apr 02 12:28:52 PM PDT 24 29007300 ps
T104 /workspace/coverage/cover_reg_top/7.clkmgr_tl_intg_err.3512973238 Apr 02 12:28:34 PM PDT 24 Apr 02 12:28:36 PM PDT 24 97150401 ps
T856 /workspace/coverage/cover_reg_top/18.clkmgr_csr_mem_rw_with_rand_reset.948912735 Apr 02 12:28:41 PM PDT 24 Apr 02 12:28:44 PM PDT 24 31947588 ps
T105 /workspace/coverage/cover_reg_top/5.clkmgr_tl_intg_err.3532137164 Apr 02 12:28:32 PM PDT 24 Apr 02 12:28:34 PM PDT 24 169879935 ps
T77 /workspace/coverage/cover_reg_top/12.clkmgr_same_csr_outstanding.947010535 Apr 02 12:28:43 PM PDT 24 Apr 02 12:28:45 PM PDT 24 21508797 ps
T78 /workspace/coverage/cover_reg_top/4.clkmgr_csr_aliasing.1959843695 Apr 02 12:28:28 PM PDT 24 Apr 02 12:28:31 PM PDT 24 350395593 ps
T79 /workspace/coverage/cover_reg_top/14.clkmgr_csr_rw.589104838 Apr 02 12:28:43 PM PDT 24 Apr 02 12:28:45 PM PDT 24 30154212 ps
T80 /workspace/coverage/cover_reg_top/15.clkmgr_same_csr_outstanding.2220101517 Apr 02 12:28:48 PM PDT 24 Apr 02 12:28:50 PM PDT 24 46993677 ps
T113 /workspace/coverage/cover_reg_top/14.clkmgr_tl_intg_err.2251077045 Apr 02 12:28:45 PM PDT 24 Apr 02 12:28:49 PM PDT 24 262907505 ps
T81 /workspace/coverage/cover_reg_top/19.clkmgr_same_csr_outstanding.288167281 Apr 02 12:28:48 PM PDT 24 Apr 02 12:28:50 PM PDT 24 162610774 ps
T182 /workspace/coverage/cover_reg_top/13.clkmgr_tl_intg_err.2498064422 Apr 02 12:28:47 PM PDT 24 Apr 02 12:28:50 PM PDT 24 99104305 ps
T857 /workspace/coverage/cover_reg_top/12.clkmgr_intr_test.268253336 Apr 02 12:28:50 PM PDT 24 Apr 02 12:28:51 PM PDT 24 21426307 ps
T858 /workspace/coverage/cover_reg_top/2.clkmgr_csr_aliasing.3608097818 Apr 02 12:28:22 PM PDT 24 Apr 02 12:28:23 PM PDT 24 65936635 ps
T859 /workspace/coverage/cover_reg_top/31.clkmgr_intr_test.3815104736 Apr 02 12:28:50 PM PDT 24 Apr 02 12:28:51 PM PDT 24 15014960 ps
T82 /workspace/coverage/cover_reg_top/14.clkmgr_same_csr_outstanding.548618018 Apr 02 12:28:37 PM PDT 24 Apr 02 12:28:42 PM PDT 24 94603132 ps
T860 /workspace/coverage/cover_reg_top/2.clkmgr_intr_test.2156268477 Apr 02 12:28:12 PM PDT 24 Apr 02 12:28:13 PM PDT 24 29660437 ps
T861 /workspace/coverage/cover_reg_top/47.clkmgr_intr_test.754247457 Apr 02 12:28:45 PM PDT 24 Apr 02 12:28:47 PM PDT 24 84194890 ps
T862 /workspace/coverage/cover_reg_top/0.clkmgr_intr_test.339426745 Apr 02 12:27:54 PM PDT 24 Apr 02 12:27:55 PM PDT 24 35061555 ps
T50 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors.2980413150 Apr 02 12:28:25 PM PDT 24 Apr 02 12:28:27 PM PDT 24 187590813 ps
T863 /workspace/coverage/cover_reg_top/13.clkmgr_csr_mem_rw_with_rand_reset.3352569365 Apr 02 12:28:49 PM PDT 24 Apr 02 12:28:50 PM PDT 24 30427625 ps
T83 /workspace/coverage/cover_reg_top/3.clkmgr_csr_aliasing.3142284655 Apr 02 12:28:19 PM PDT 24 Apr 02 12:28:20 PM PDT 24 21299284 ps
T51 /workspace/coverage/cover_reg_top/5.clkmgr_shadow_reg_errors.1286751294 Apr 02 12:28:43 PM PDT 24 Apr 02 12:28:46 PM PDT 24 183720067 ps
T84 /workspace/coverage/cover_reg_top/9.clkmgr_same_csr_outstanding.1694388754 Apr 02 12:28:44 PM PDT 24 Apr 02 12:28:48 PM PDT 24 88004345 ps
T864 /workspace/coverage/cover_reg_top/10.clkmgr_csr_mem_rw_with_rand_reset.2042076691 Apr 02 12:28:48 PM PDT 24 Apr 02 12:28:49 PM PDT 24 145225320 ps
T52 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors.1019598484 Apr 02 12:28:21 PM PDT 24 Apr 02 12:28:23 PM PDT 24 60416811 ps
T865 /workspace/coverage/cover_reg_top/11.clkmgr_tl_errors.2365828279 Apr 02 12:28:47 PM PDT 24 Apr 02 12:28:51 PM PDT 24 114351648 ps
T53 /workspace/coverage/cover_reg_top/3.clkmgr_shadow_reg_errors_with_csr_rw.1545564046 Apr 02 12:28:07 PM PDT 24 Apr 02 12:28:10 PM PDT 24 294313580 ps
T866 /workspace/coverage/cover_reg_top/30.clkmgr_intr_test.1049143676 Apr 02 12:28:49 PM PDT 24 Apr 02 12:28:50 PM PDT 24 12165572 ps
T867 /workspace/coverage/cover_reg_top/8.clkmgr_intr_test.4209121288 Apr 02 12:28:37 PM PDT 24 Apr 02 12:28:38 PM PDT 24 24435155 ps
T868 /workspace/coverage/cover_reg_top/48.clkmgr_intr_test.2052708040 Apr 02 12:29:24 PM PDT 24 Apr 02 12:29:25 PM PDT 24 14649128 ps
T869 /workspace/coverage/cover_reg_top/3.clkmgr_csr_hw_reset.1890937903 Apr 02 12:28:19 PM PDT 24 Apr 02 12:28:20 PM PDT 24 23561951 ps
T870 /workspace/coverage/cover_reg_top/2.clkmgr_csr_bit_bash.374816473 Apr 02 12:28:07 PM PDT 24 Apr 02 12:28:14 PM PDT 24 265330861 ps
T54 /workspace/coverage/cover_reg_top/12.clkmgr_shadow_reg_errors.611692640 Apr 02 12:28:46 PM PDT 24 Apr 02 12:28:50 PM PDT 24 302742164 ps
T871 /workspace/coverage/cover_reg_top/26.clkmgr_intr_test.863431622 Apr 02 12:28:47 PM PDT 24 Apr 02 12:28:53 PM PDT 24 12908608 ps
T872 /workspace/coverage/cover_reg_top/14.clkmgr_csr_mem_rw_with_rand_reset.1082151481 Apr 02 12:28:50 PM PDT 24 Apr 02 12:28:51 PM PDT 24 36157223 ps
T873 /workspace/coverage/cover_reg_top/12.clkmgr_csr_mem_rw_with_rand_reset.2711781710 Apr 02 12:28:40 PM PDT 24 Apr 02 12:28:42 PM PDT 24 36719925 ps
T874 /workspace/coverage/cover_reg_top/1.clkmgr_csr_aliasing.3180370596 Apr 02 12:28:00 PM PDT 24 Apr 02 12:28:01 PM PDT 24 82105914 ps
T875 /workspace/coverage/cover_reg_top/22.clkmgr_intr_test.3960187931 Apr 02 12:28:46 PM PDT 24 Apr 02 12:28:48 PM PDT 24 14174229 ps
T876 /workspace/coverage/cover_reg_top/21.clkmgr_intr_test.2737787438 Apr 02 12:28:47 PM PDT 24 Apr 02 12:28:48 PM PDT 24 34216883 ps
T877 /workspace/coverage/cover_reg_top/11.clkmgr_csr_rw.3939583373 Apr 02 12:28:44 PM PDT 24 Apr 02 12:28:47 PM PDT 24 19251562 ps
T878 /workspace/coverage/cover_reg_top/0.clkmgr_csr_aliasing.650987938 Apr 02 12:28:13 PM PDT 24 Apr 02 12:28:15 PM PDT 24 68999534 ps
T55 /workspace/coverage/cover_reg_top/15.clkmgr_shadow_reg_errors.2955582846 Apr 02 12:28:42 PM PDT 24 Apr 02 12:28:46 PM PDT 24 208524813 ps
T879 /workspace/coverage/cover_reg_top/2.clkmgr_tl_errors.2948863824 Apr 02 12:27:59 PM PDT 24 Apr 02 12:28:01 PM PDT 24 90950089 ps
T110 /workspace/coverage/cover_reg_top/8.clkmgr_tl_intg_err.601907604 Apr 02 12:28:41 PM PDT 24 Apr 02 12:28:45 PM PDT 24 186716403 ps
T880 /workspace/coverage/cover_reg_top/4.clkmgr_csr_mem_rw_with_rand_reset.2462326567 Apr 02 12:28:34 PM PDT 24 Apr 02 12:28:36 PM PDT 24 47425257 ps
T881 /workspace/coverage/cover_reg_top/20.clkmgr_intr_test.2354216579 Apr 02 12:28:48 PM PDT 24 Apr 02 12:28:49 PM PDT 24 14299949 ps
T882 /workspace/coverage/cover_reg_top/3.clkmgr_csr_rw.1549665835 Apr 02 12:28:32 PM PDT 24 Apr 02 12:28:33 PM PDT 24 19043451 ps
T883 /workspace/coverage/cover_reg_top/16.clkmgr_intr_test.2981588271 Apr 02 12:28:43 PM PDT 24 Apr 02 12:28:45 PM PDT 24 29621633 ps
T884 /workspace/coverage/cover_reg_top/0.clkmgr_tl_errors.1796665559 Apr 02 12:28:18 PM PDT 24 Apr 02 12:28:21 PM PDT 24 168441672 ps
T58 /workspace/coverage/cover_reg_top/0.clkmgr_shadow_reg_errors.3964123493 Apr 02 12:27:57 PM PDT 24 Apr 02 12:27:59 PM PDT 24 114420795 ps
T885 /workspace/coverage/cover_reg_top/27.clkmgr_intr_test.2966835873 Apr 02 12:28:46 PM PDT 24 Apr 02 12:28:48 PM PDT 24 21209613 ps
T886 /workspace/coverage/cover_reg_top/18.clkmgr_tl_errors.1532784522 Apr 02 12:28:43 PM PDT 24 Apr 02 12:28:48 PM PDT 24 46357438 ps
T887 /workspace/coverage/cover_reg_top/14.clkmgr_intr_test.938048372 Apr 02 12:28:42 PM PDT 24 Apr 02 12:28:45 PM PDT 24 99366394 ps
T888 /workspace/coverage/cover_reg_top/0.clkmgr_csr_mem_rw_with_rand_reset.2680356859 Apr 02 12:28:00 PM PDT 24 Apr 02 12:28:07 PM PDT 24 68492428 ps
T107 /workspace/coverage/cover_reg_top/4.clkmgr_tl_intg_err.485714205 Apr 02 12:28:32 PM PDT 24 Apr 02 12:28:33 PM PDT 24 69379793 ps
T111 /workspace/coverage/cover_reg_top/1.clkmgr_tl_intg_err.2600490148 Apr 02 12:27:59 PM PDT 24 Apr 02 12:28:03 PM PDT 24 665653492 ps
T889 /workspace/coverage/cover_reg_top/19.clkmgr_csr_mem_rw_with_rand_reset.1364863066 Apr 02 12:28:45 PM PDT 24 Apr 02 12:28:48 PM PDT 24 57112023 ps
T112 /workspace/coverage/cover_reg_top/19.clkmgr_tl_intg_err.3880691480 Apr 02 12:28:45 PM PDT 24 Apr 02 12:28:48 PM PDT 24 82678882 ps
T890 /workspace/coverage/cover_reg_top/19.clkmgr_tl_errors.1485085877 Apr 02 12:28:47 PM PDT 24 Apr 02 12:28:50 PM PDT 24 93919776 ps
T891 /workspace/coverage/cover_reg_top/41.clkmgr_intr_test.190377223 Apr 02 12:28:52 PM PDT 24 Apr 02 12:28:52 PM PDT 24 37226263 ps
T892 /workspace/coverage/cover_reg_top/13.clkmgr_tl_errors.63656484 Apr 02 12:28:48 PM PDT 24 Apr 02 12:28:51 PM PDT 24 107996132 ps
T893 /workspace/coverage/cover_reg_top/8.clkmgr_same_csr_outstanding.1165476612 Apr 02 12:28:41 PM PDT 24 Apr 02 12:28:45 PM PDT 24 409652296 ps
T894 /workspace/coverage/cover_reg_top/1.clkmgr_csr_bit_bash.1972958440 Apr 02 12:28:22 PM PDT 24 Apr 02 12:28:29 PM PDT 24 395969116 ps
T895 /workspace/coverage/cover_reg_top/10.clkmgr_intr_test.1761982999 Apr 02 12:28:47 PM PDT 24 Apr 02 12:28:48 PM PDT 24 13725946 ps
T896 /workspace/coverage/cover_reg_top/35.clkmgr_intr_test.3093657427 Apr 02 12:28:45 PM PDT 24 Apr 02 12:28:51 PM PDT 24 38226339 ps
T897 /workspace/coverage/cover_reg_top/38.clkmgr_intr_test.1193648750 Apr 02 12:28:49 PM PDT 24 Apr 02 12:28:50 PM PDT 24 34115977 ps
T898 /workspace/coverage/cover_reg_top/5.clkmgr_csr_rw.1574137961 Apr 02 12:28:43 PM PDT 24 Apr 02 12:28:45 PM PDT 24 34952902 ps
T899 /workspace/coverage/cover_reg_top/0.clkmgr_csr_hw_reset.182464469 Apr 02 12:27:54 PM PDT 24 Apr 02 12:27:55 PM PDT 24 44601435 ps
T900 /workspace/coverage/cover_reg_top/2.clkmgr_csr_hw_reset.14325722 Apr 02 12:28:04 PM PDT 24 Apr 02 12:28:05 PM PDT 24 19682051 ps
T901 /workspace/coverage/cover_reg_top/49.clkmgr_intr_test.3907295692 Apr 02 12:28:51 PM PDT 24 Apr 02 12:28:52 PM PDT 24 79889616 ps
T902 /workspace/coverage/cover_reg_top/13.clkmgr_intr_test.1183702740 Apr 02 12:28:48 PM PDT 24 Apr 02 12:28:52 PM PDT 24 14819247 ps
T903 /workspace/coverage/cover_reg_top/0.clkmgr_csr_bit_bash.4062532985 Apr 02 12:27:56 PM PDT 24 Apr 02 12:28:03 PM PDT 24 399970455 ps
T142 /workspace/coverage/cover_reg_top/7.clkmgr_shadow_reg_errors_with_csr_rw.3039953955 Apr 02 12:28:41 PM PDT 24 Apr 02 12:28:44 PM PDT 24 62467667 ps
T140 /workspace/coverage/cover_reg_top/1.clkmgr_shadow_reg_errors_with_csr_rw.1560445554 Apr 02 12:28:27 PM PDT 24 Apr 02 12:28:29 PM PDT 24 55329365 ps
T904 /workspace/coverage/cover_reg_top/7.clkmgr_tl_errors.1155073378 Apr 02 12:28:43 PM PDT 24 Apr 02 12:28:47 PM PDT 24 141007039 ps
T905 /workspace/coverage/cover_reg_top/40.clkmgr_intr_test.1005338248 Apr 02 12:28:51 PM PDT 24 Apr 02 12:28:52 PM PDT 24 11018615 ps
T906 /workspace/coverage/cover_reg_top/15.clkmgr_tl_errors.2103773262 Apr 02 12:28:49 PM PDT 24 Apr 02 12:28:53 PM PDT 24 748907303 ps
T907 /workspace/coverage/cover_reg_top/16.clkmgr_csr_rw.818535472 Apr 02 12:28:46 PM PDT 24 Apr 02 12:28:48 PM PDT 24 20582465 ps
T132 /workspace/coverage/cover_reg_top/8.clkmgr_shadow_reg_errors.1552364381 Apr 02 12:28:33 PM PDT 24 Apr 02 12:28:34 PM PDT 24 65867118 ps
T59 /workspace/coverage/cover_reg_top/13.clkmgr_shadow_reg_errors.2642292263 Apr 02 12:28:47 PM PDT 24 Apr 02 12:28:49 PM PDT 24 51180245 ps
T133 /workspace/coverage/cover_reg_top/2.clkmgr_shadow_reg_errors_with_csr_rw.3621159895 Apr 02 12:28:28 PM PDT 24 Apr 02 12:28:32 PM PDT 24 554415493 ps
T908 /workspace/coverage/cover_reg_top/4.clkmgr_csr_bit_bash.4033814487 Apr 02 12:28:32 PM PDT 24 Apr 02 12:28:39 PM PDT 24 279462697 ps
T56 /workspace/coverage/cover_reg_top/14.clkmgr_shadow_reg_errors.1434904013 Apr 02 12:28:46 PM PDT 24 Apr 02 12:28:49 PM PDT 24 137245389 ps
T909 /workspace/coverage/cover_reg_top/5.clkmgr_same_csr_outstanding.3649668433 Apr 02 12:28:32 PM PDT 24 Apr 02 12:28:34 PM PDT 24 157626024 ps
T108 /workspace/coverage/cover_reg_top/10.clkmgr_tl_intg_err.3732170273 Apr 02 12:28:39 PM PDT 24 Apr 02 12:28:42 PM PDT 24 202242875 ps
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T1000 /workspace/coverage/cover_reg_top/2.clkmgr_csr_rw.678601070 Apr 02 12:28:31 PM PDT 24 Apr 02 12:28:32 PM PDT 24 26091465 ps
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