Module Definition
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Module : flash_mp_data_region_sel
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp_data_region_sel.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_flash_mp.u_sw_sel 100.00 100.00
tb.dut.u_flash_mp.u_hw_sel 100.00 100.00
tb.dut.u_eflash.u_region_sel 100.00 100.00



Module Instance : tb.dut.u_flash_mp.u_sw_sel

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
83.90 96.72 88.89 83.33 66.67 u_flash_mp


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children



Module Instance : tb.dut.u_flash_mp.u_hw_sel

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
83.90 96.72 88.89 83.33 66.67 u_flash_mp


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children



Module Instance : tb.dut.u_eflash.u_region_sel

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
65.48 96.43 50.00 50.00 u_eflash


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children

Line Coverage for Module : flash_mp_data_region_sel ( parameter Regions=9 )
Line Coverage for Module self-instances :
SCORELINE
100.00 100.00
tb.dut.u_flash_mp.u_sw_sel

SCORELINE
100.00 100.00
tb.dut.u_eflash.u_region_sel

Line No.TotalCoveredPercent
TOTAL1616100.00
CONT_ASSIGN2711100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
ALWAYS3400
ALWAYS3433100.00
ALWAYS4844100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp_data_region_sel.sv' or '../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp_data_region_sel.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
27 1 1
29 8 8
34 1 1
35 1 1
38 1 1
48 1 1
49 1 1
50 1 1
51 1 1
MISSING_ELSE


Line Coverage for Module : flash_mp_data_region_sel ( parameter Regions=1 )
Line Coverage for Module self-instances :
SCORELINE
100.00 100.00
tb.dut.u_flash_mp.u_hw_sel

Line No.TotalCoveredPercent
TOTAL88100.00
CONT_ASSIGN2711100.00
ALWAYS3400
ALWAYS3433100.00
ALWAYS4844100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp_data_region_sel.sv' or '../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp_data_region_sel.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
27 1 1
34 1 1
35 1 1
38 1 1
48 1 1
49 1 1
50 1 1
51 1 1
MISSING_ELSE

Line Coverage for Instance : tb.dut.u_flash_mp.u_sw_sel
Line No.TotalCoveredPercent
TOTAL1616100.00
CONT_ASSIGN2711100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
ALWAYS3400
ALWAYS3433100.00
ALWAYS4844100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp_data_region_sel.sv' or '../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp_data_region_sel.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
27 1 1
29 8 8
34 1 1
35 1 1
38 1 1
48 1 1
49 1 1
50 1 1
51 1 1
MISSING_ELSE

Line Coverage for Instance : tb.dut.u_flash_mp.u_hw_sel
Line No.TotalCoveredPercent
TOTAL88100.00
CONT_ASSIGN2711100.00
ALWAYS3400
ALWAYS3433100.00
ALWAYS4844100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp_data_region_sel.sv' or '../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp_data_region_sel.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
27 1 1
34 1 1
35 1 1
38 1 1
48 1 1
49 1 1
50 1 1
51 1 1
MISSING_ELSE

Line Coverage for Instance : tb.dut.u_eflash.u_region_sel
Line No.TotalCoveredPercent
TOTAL1616100.00
CONT_ASSIGN2711100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
CONT_ASSIGN2911100.00
ALWAYS3400
ALWAYS3433100.00
ALWAYS4844100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp_data_region_sel.sv' or '../src/lowrisc_ip_flash_ctrl_0.1/rtl/flash_mp_data_region_sel.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
27 1 1
29 8 8
34 1 1
35 1 1
38 1 1
48 1 1
49 1 1
50 1 1
51 1 1
MISSING_ELSE

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%