Unified Coverage Report :: Module :: flash_ctrl_core_reg_top

Module : flash_ctrl_core_reg_top

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
99.76	99.90	100.00			99.13	100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_systems_flash_ctrl_0.1/rtl/autogen/flash_ctrl_core_reg_top.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_reg_core	99.76	99.90	100.00			99.13	100.00

---

Module Instance : tb.dut.u_reg_core

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
99.76	99.90	100.00			99.13	100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
99.79	99.76	99.74			99.64	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
66.52	91.74	69.23	13.28		75.00	83.33	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_addr	100.00	100.00	100.00			100.00
u_alert_test_fatal_err	100.00	100.00
u_alert_test_recov_err	100.00	100.00
u_bank0_info0_page_cfg_shadowed_0_ecc_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_0_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_0_erase_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_0_he_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_0_prog_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_0_rd_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_0_scramble_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_1_ecc_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_1_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_1_erase_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_1_he_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_1_prog_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_1_rd_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_1_scramble_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_2_ecc_en_2	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_2_en_2	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_2_erase_en_2	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_2_he_en_2	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_2_prog_en_2	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_2_rd_en_2	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_2_scramble_en_2	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_3_ecc_en_3	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_3_en_3	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_3_erase_en_3	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_3_he_en_3	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_3_prog_en_3	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_3_rd_en_3	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_3_scramble_en_3	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_4_ecc_en_4	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_4_en_4	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_4_erase_en_4	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_4_he_en_4	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_4_prog_en_4	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_4_rd_en_4	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_4_scramble_en_4	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_5_ecc_en_5	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_5_en_5	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_5_erase_en_5	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_5_he_en_5	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_5_prog_en_5	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_5_rd_en_5	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_5_scramble_en_5	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_6_ecc_en_6	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_6_en_6	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_6_erase_en_6	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_6_he_en_6	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_6_prog_en_6	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_6_rd_en_6	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_6_scramble_en_6	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_7_ecc_en_7	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_7_en_7	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_7_erase_en_7	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_7_he_en_7	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_7_prog_en_7	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_7_rd_en_7	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_7_scramble_en_7	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_8_ecc_en_8	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_8_en_8	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_8_erase_en_8	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_8_he_en_8	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_8_prog_en_8	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_8_rd_en_8	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_8_scramble_en_8	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_9_ecc_en_9	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_9_en_9	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_9_erase_en_9	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_9_he_en_9	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_9_prog_en_9	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_9_rd_en_9	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_page_cfg_shadowed_9_scramble_en_9	100.00	100.00	100.00			100.00	100.00
u_bank0_info0_regwen_0	100.00	100.00				100.00
u_bank0_info0_regwen_1	100.00	100.00				100.00
u_bank0_info0_regwen_2	100.00	100.00				100.00
u_bank0_info0_regwen_3	100.00	100.00				100.00
u_bank0_info0_regwen_4	100.00	100.00				100.00
u_bank0_info0_regwen_5	100.00	100.00				100.00
u_bank0_info0_regwen_6	100.00	100.00				100.00
u_bank0_info0_regwen_7	100.00	100.00				100.00
u_bank0_info0_regwen_8	100.00	100.00				100.00
u_bank0_info0_regwen_9	100.00	100.00				100.00
u_bank0_info1_page_cfg_shadowed_ecc_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info1_page_cfg_shadowed_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info1_page_cfg_shadowed_erase_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info1_page_cfg_shadowed_he_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info1_page_cfg_shadowed_prog_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info1_page_cfg_shadowed_rd_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info1_page_cfg_shadowed_scramble_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info1_regwen	100.00	100.00				100.00
u_bank0_info2_page_cfg_shadowed_0_ecc_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_0_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_0_erase_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_0_he_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_0_prog_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_0_rd_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_0_scramble_en_0	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_1_ecc_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_1_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_1_erase_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_1_he_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_1_prog_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_1_rd_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_page_cfg_shadowed_1_scramble_en_1	100.00	100.00	100.00			100.00	100.00
u_bank0_info2_regwen_0	100.00	100.00				100.00
u_bank0_info2_regwen_1	100.00	100.00				100.00
u_bank1_info0_page_cfg_shadowed_0_ecc_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_0_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_0_erase_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_0_he_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_0_prog_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_0_rd_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_0_scramble_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_1_ecc_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_1_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_1_erase_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_1_he_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_1_prog_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_1_rd_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_1_scramble_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_2_ecc_en_2	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_2_en_2	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_2_erase_en_2	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_2_he_en_2	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_2_prog_en_2	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_2_rd_en_2	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_2_scramble_en_2	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_3_ecc_en_3	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_3_en_3	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_3_erase_en_3	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_3_he_en_3	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_3_prog_en_3	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_3_rd_en_3	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_3_scramble_en_3	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_4_ecc_en_4	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_4_en_4	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_4_erase_en_4	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_4_he_en_4	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_4_prog_en_4	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_4_rd_en_4	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_4_scramble_en_4	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_5_ecc_en_5	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_5_en_5	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_5_erase_en_5	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_5_he_en_5	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_5_prog_en_5	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_5_rd_en_5	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_5_scramble_en_5	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_6_ecc_en_6	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_6_en_6	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_6_erase_en_6	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_6_he_en_6	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_6_prog_en_6	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_6_rd_en_6	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_6_scramble_en_6	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_7_ecc_en_7	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_7_en_7	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_7_erase_en_7	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_7_he_en_7	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_7_prog_en_7	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_7_rd_en_7	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_7_scramble_en_7	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_8_ecc_en_8	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_8_en_8	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_8_erase_en_8	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_8_he_en_8	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_8_prog_en_8	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_8_rd_en_8	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_8_scramble_en_8	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_9_ecc_en_9	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_9_en_9	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_9_erase_en_9	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_9_he_en_9	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_9_prog_en_9	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_9_rd_en_9	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_page_cfg_shadowed_9_scramble_en_9	100.00	100.00	100.00			100.00	100.00
u_bank1_info0_regwen_0	100.00	100.00				100.00
u_bank1_info0_regwen_1	100.00	100.00				100.00
u_bank1_info0_regwen_2	100.00	100.00				100.00
u_bank1_info0_regwen_3	100.00	100.00				100.00
u_bank1_info0_regwen_4	100.00	100.00				100.00
u_bank1_info0_regwen_5	100.00	100.00				100.00
u_bank1_info0_regwen_6	100.00	100.00				100.00
u_bank1_info0_regwen_7	100.00	100.00				100.00
u_bank1_info0_regwen_8	100.00	100.00				100.00
u_bank1_info0_regwen_9	100.00	100.00				100.00
u_bank1_info1_page_cfg_shadowed_ecc_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info1_page_cfg_shadowed_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info1_page_cfg_shadowed_erase_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info1_page_cfg_shadowed_he_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info1_page_cfg_shadowed_prog_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info1_page_cfg_shadowed_rd_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info1_page_cfg_shadowed_scramble_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info1_regwen	100.00	100.00				100.00
u_bank1_info2_page_cfg_shadowed_0_ecc_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_0_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_0_erase_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_0_he_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_0_prog_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_0_rd_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_0_scramble_en_0	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_1_ecc_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_1_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_1_erase_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_1_he_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_1_prog_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_1_rd_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_page_cfg_shadowed_1_scramble_en_1	100.00	100.00	100.00			100.00	100.00
u_bank1_info2_regwen_0	100.00	100.00				100.00
u_bank1_info2_regwen_1	100.00	100.00				100.00
u_bank_cfg_regwen	100.00	100.00				100.00
u_chk	100.00	100.00					100.00
u_control_erase_sel	100.00	100.00	100.00			100.00
u_control_info_sel	100.00	100.00	100.00			100.00
u_control_num	100.00	100.00	100.00			100.00
u_control_op	100.00	100.00	100.00			100.00
u_control_partition_sel	100.00	100.00	100.00			100.00
u_control_prog_sel	100.00	100.00	100.00			100.00
u_control_start	100.00	100.00	100.00			100.00
u_ctrl_regwen	100.00	100.00
u_default_region_shadowed_ecc_en	100.00	100.00	100.00			100.00	100.00
u_default_region_shadowed_erase_en	100.00	100.00	100.00			100.00	100.00
u_default_region_shadowed_he_en	100.00	100.00	100.00			100.00	100.00
u_default_region_shadowed_prog_en	100.00	100.00	100.00			100.00	100.00
u_default_region_shadowed_rd_en	100.00	100.00	100.00			100.00	100.00
u_default_region_shadowed_scramble_en	100.00	100.00	100.00			100.00	100.00
u_dis	100.00	100.00				100.00
u_ecc_single_err_addr_0	86.15	92.31				80.00
u_ecc_single_err_addr_1	86.15	92.31				80.00
u_ecc_single_err_cnt_ecc_single_err_cnt_0	100.00	100.00	100.00			100.00
u_ecc_single_err_cnt_ecc_single_err_cnt_1	100.00	100.00	100.00			100.00
u_erase_suspend	71.25	92.31	50.00			71.43
u_err_addr	86.15	92.31				80.00
u_err_code_flash_phy_err	100.00	100.00				100.00
u_err_code_mp_err	100.00	100.00				100.00
u_err_code_oob_err	100.00	100.00				100.00
u_err_code_prog_type_err	100.00	100.00				100.00
u_err_code_prog_win_err	100.00	100.00				100.00
u_err_code_rd_err	100.00	100.00				100.00
u_err_code_update_err	100.00	100.00				100.00
u_exec	100.00	100.00	100.00			100.00
u_fault_status_flash_phy_err	82.31	84.62				80.00
u_fault_status_lcmgr_err	82.31	84.62				80.00
u_fault_status_mp_err	82.31	84.62				80.00
u_fault_status_oob_err	82.31	84.62				80.00
u_fault_status_phy_intg_err	82.31	84.62				80.00
u_fault_status_prog_type_err	82.31	84.62				80.00
u_fault_status_prog_win_err	82.31	84.62				80.00
u_fault_status_rd_err	82.31	84.62				80.00
u_fault_status_reg_intg_err	82.31	84.62				80.00
u_fault_status_storage_err	96.15	92.31				100.00
u_fifo_lvl_prog	100.00	100.00	100.00			100.00
u_fifo_lvl_rd	100.00	100.00	100.00			100.00
u_fifo_rst	100.00	100.00	100.00			100.00
u_init	100.00	100.00				100.00
u_intr_enable_corr_err	100.00	100.00	100.00			100.00
u_intr_enable_op_done	100.00	100.00	100.00			100.00
u_intr_enable_prog_empty	100.00	100.00	100.00			100.00
u_intr_enable_prog_lvl	100.00	100.00	100.00			100.00
u_intr_enable_rd_full	100.00	100.00	100.00			100.00
u_intr_enable_rd_lvl	100.00	100.00	100.00			100.00
u_intr_state_corr_err	100.00	100.00				100.00
u_intr_state_op_done	100.00	100.00				100.00
u_intr_state_prog_empty	100.00	100.00				100.00
u_intr_state_prog_lvl	100.00	100.00				100.00
u_intr_state_rd_full	100.00	100.00				100.00
u_intr_state_rd_lvl	100.00	100.00				100.00
u_intr_test_corr_err	100.00	100.00
u_intr_test_op_done	100.00	100.00
u_intr_test_prog_empty	100.00	100.00
u_intr_test_prog_lvl	100.00	100.00
u_intr_test_rd_full	100.00	100.00
u_intr_test_rd_lvl	100.00	100.00
u_mp_bank_cfg_shadowed_erase_en_0	100.00	100.00	100.00			100.00	100.00
u_mp_bank_cfg_shadowed_erase_en_1	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_0_base_0	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_0_ecc_en_0	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_0_en_0	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_0_erase_en_0	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_0_he_en_0	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_0_prog_en_0	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_0_rd_en_0	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_0_scramble_en_0	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_0_size_0	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_1_base_1	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_1_ecc_en_1	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_1_en_1	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_1_erase_en_1	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_1_he_en_1	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_1_prog_en_1	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_1_rd_en_1	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_1_scramble_en_1	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_1_size_1	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_2_base_2	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_2_ecc_en_2	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_2_en_2	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_2_erase_en_2	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_2_he_en_2	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_2_prog_en_2	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_2_rd_en_2	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_2_scramble_en_2	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_2_size_2	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_3_base_3	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_3_ecc_en_3	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_3_en_3	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_3_erase_en_3	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_3_he_en_3	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_3_prog_en_3	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_3_rd_en_3	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_3_scramble_en_3	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_3_size_3	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_4_base_4	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_4_ecc_en_4	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_4_en_4	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_4_erase_en_4	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_4_he_en_4	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_4_prog_en_4	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_4_rd_en_4	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_4_scramble_en_4	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_4_size_4	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_5_base_5	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_5_ecc_en_5	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_5_en_5	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_5_erase_en_5	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_5_he_en_5	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_5_prog_en_5	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_5_rd_en_5	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_5_scramble_en_5	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_5_size_5	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_6_base_6	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_6_ecc_en_6	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_6_en_6	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_6_erase_en_6	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_6_he_en_6	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_6_prog_en_6	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_6_rd_en_6	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_6_scramble_en_6	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_6_size_6	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_7_base_7	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_7_ecc_en_7	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_7_en_7	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_7_erase_en_7	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_7_he_en_7	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_7_prog_en_7	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_7_rd_en_7	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_7_scramble_en_7	100.00	100.00	100.00			100.00	100.00
u_mp_region_cfg_shadowed_7_size_7	100.00	100.00	100.00			100.00	100.00
u_op_status_done	100.00	100.00	100.00			100.00
u_op_status_err	100.00	100.00	100.00			100.00
u_phy_alert_cfg_alert_ack	71.25	92.31	50.00			71.43
u_phy_alert_cfg_alert_trig	71.25	92.31	50.00			71.43
u_phy_err_cfg	71.25	92.31	50.00			71.43
u_phy_err_cfg_regwen	100.00	100.00				100.00
u_phy_status_init_wip	82.31	84.62				80.00
u_phy_status_prog_normal_avail	78.46	76.92				80.00
u_phy_status_prog_repair_avail	78.46	76.92				80.00
u_prog_type_en_normal	100.00	100.00				100.00
u_prog_type_en_repair	100.00	100.00				100.00
u_reg_if	100.00	100.00	100.00			100.00	100.00
u_region_cfg_regwen_0	100.00	100.00				100.00
u_region_cfg_regwen_1	100.00	100.00				100.00
u_region_cfg_regwen_2	100.00	100.00				100.00
u_region_cfg_regwen_3	100.00	100.00				100.00
u_region_cfg_regwen_4	100.00	100.00				100.00
u_region_cfg_regwen_5	100.00	100.00				100.00
u_region_cfg_regwen_6	100.00	100.00				100.00
u_region_cfg_regwen_7	100.00	100.00				100.00
u_rsp_intg_gen	100.00	100.00					100.00
u_scratch	100.00	100.00	100.00			100.00
u_socket	75.25	95.87	36.36			68.75	100.00
u_status_init_wip	82.31	84.62				80.00
u_status_prog_empty	100.00	100.00				100.00
u_status_prog_full	100.00	100.00				100.00
u_status_rd_empty	100.00	100.00				100.00
u_status_rd_full	100.00	100.00				100.00

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : flash_ctrl_core_reg_top

	Line No.	Total	Covered	Percent
TOTAL		979	978	99.90
ALWAYS	64	4	3	75.00
CONT_ASSIGN	73	1	1	100.00
ALWAYS	122	7	7	100.00
CONT_ASSIGN	159	1	1	100.00
CONT_ASSIGN	160	1	1	100.00
ALWAYS	12005	99	99	100.00
CONT_ASSIGN	12106	1	1	100.00
ALWAYS	12110	1	1	100.00
CONT_ASSIGN	12210	1	1	100.00
CONT_ASSIGN	12212	1	1	100.00
CONT_ASSIGN	12214	1	1	100.00
CONT_ASSIGN	12216	1	1	100.00
CONT_ASSIGN	12218	1	1	100.00
CONT_ASSIGN	12220	1	1	100.00
CONT_ASSIGN	12222	1	1	100.00
CONT_ASSIGN	12223	1	1	100.00
CONT_ASSIGN	12225	1	1	100.00
CONT_ASSIGN	12227	1	1	100.00
CONT_ASSIGN	12229	1	1	100.00
CONT_ASSIGN	12231	1	1	100.00
CONT_ASSIGN	12233	1	1	100.00
CONT_ASSIGN	12235	1	1	100.00
CONT_ASSIGN	12236	1	1	100.00
CONT_ASSIGN	12238	1	1	100.00
CONT_ASSIGN	12240	1	1	100.00
CONT_ASSIGN	12242	1	1	100.00
CONT_ASSIGN	12244	1	1	100.00
CONT_ASSIGN	12246	1	1	100.00
CONT_ASSIGN	12248	1	1	100.00
CONT_ASSIGN	12249	1	1	100.00
CONT_ASSIGN	12251	1	1	100.00
CONT_ASSIGN	12253	1	1	100.00
CONT_ASSIGN	12254	1	1	100.00
CONT_ASSIGN	12256	1	1	100.00
CONT_ASSIGN	12257	1	1	100.00
CONT_ASSIGN	12259	1	1	100.00
CONT_ASSIGN	12260	1	1	100.00
CONT_ASSIGN	12262	1	1	100.00
CONT_ASSIGN	12263	1	1	100.00
CONT_ASSIGN	12264	1	1	100.00
CONT_ASSIGN	12266	1	1	100.00
CONT_ASSIGN	12268	1	1	100.00
CONT_ASSIGN	12270	1	1	100.00
CONT_ASSIGN	12272	1	1	100.00
CONT_ASSIGN	12274	1	1	100.00
CONT_ASSIGN	12276	1	1	100.00
CONT_ASSIGN	12278	1	1	100.00
CONT_ASSIGN	12279	1	1	100.00
CONT_ASSIGN	12281	1	1	100.00
CONT_ASSIGN	12282	1	1	100.00
CONT_ASSIGN	12284	1	1	100.00
CONT_ASSIGN	12286	1	1	100.00
CONT_ASSIGN	12287	1	1	100.00
CONT_ASSIGN	12289	1	1	100.00
CONT_ASSIGN	12290	1	1	100.00
CONT_ASSIGN	12292	1	1	100.00
CONT_ASSIGN	12293	1	1	100.00
CONT_ASSIGN	12295	1	1	100.00
CONT_ASSIGN	12296	1	1	100.00
CONT_ASSIGN	12298	1	1	100.00
CONT_ASSIGN	12299	1	1	100.00
CONT_ASSIGN	12301	1	1	100.00
CONT_ASSIGN	12302	1	1	100.00
CONT_ASSIGN	12304	1	1	100.00
CONT_ASSIGN	12305	1	1	100.00
CONT_ASSIGN	12307	1	1	100.00
CONT_ASSIGN	12308	1	1	100.00
CONT_ASSIGN	12310	1	1	100.00
CONT_ASSIGN	12311	1	1	100.00
CONT_ASSIGN	12313	1	1	100.00
CONT_ASSIGN	12314	1	1	100.00
CONT_ASSIGN	12315	1	1	100.00
CONT_ASSIGN	12317	1	1	100.00
CONT_ASSIGN	12319	1	1	100.00
CONT_ASSIGN	12321	1	1	100.00
CONT_ASSIGN	12323	1	1	100.00
CONT_ASSIGN	12325	1	1	100.00
CONT_ASSIGN	12327	1	1	100.00
CONT_ASSIGN	12329	1	1	100.00
CONT_ASSIGN	12331	1	1	100.00
CONT_ASSIGN	12333	1	1	100.00
CONT_ASSIGN	12334	1	1	100.00
CONT_ASSIGN	12335	1	1	100.00
CONT_ASSIGN	12337	1	1	100.00
CONT_ASSIGN	12339	1	1	100.00
CONT_ASSIGN	12341	1	1	100.00
CONT_ASSIGN	12343	1	1	100.00
CONT_ASSIGN	12345	1	1	100.00
CONT_ASSIGN	12347	1	1	100.00
CONT_ASSIGN	12349	1	1	100.00
CONT_ASSIGN	12351	1	1	100.00
CONT_ASSIGN	12353	1	1	100.00
CONT_ASSIGN	12354	1	1	100.00
CONT_ASSIGN	12355	1	1	100.00
CONT_ASSIGN	12357	1	1	100.00
CONT_ASSIGN	12359	1	1	100.00
CONT_ASSIGN	12361	1	1	100.00
CONT_ASSIGN	12363	1	1	100.00
CONT_ASSIGN	12365	1	1	100.00
CONT_ASSIGN	12367	1	1	100.00
CONT_ASSIGN	12369	1	1	100.00
CONT_ASSIGN	12371	1	1	100.00
CONT_ASSIGN	12373	1	1	100.00
CONT_ASSIGN	12374	1	1	100.00
CONT_ASSIGN	12375	1	1	100.00
CONT_ASSIGN	12377	1	1	100.00
CONT_ASSIGN	12379	1	1	100.00
CONT_ASSIGN	12381	1	1	100.00
CONT_ASSIGN	12383	1	1	100.00
CONT_ASSIGN	12385	1	1	100.00
CONT_ASSIGN	12387	1	1	100.00
CONT_ASSIGN	12389	1	1	100.00
CONT_ASSIGN	12391	1	1	100.00
CONT_ASSIGN	12393	1	1	100.00
CONT_ASSIGN	12394	1	1	100.00
CONT_ASSIGN	12395	1	1	100.00
CONT_ASSIGN	12397	1	1	100.00
CONT_ASSIGN	12399	1	1	100.00
CONT_ASSIGN	12401	1	1	100.00
CONT_ASSIGN	12403	1	1	100.00
CONT_ASSIGN	12405	1	1	100.00
CONT_ASSIGN	12407	1	1	100.00
CONT_ASSIGN	12409	1	1	100.00
CONT_ASSIGN	12411	1	1	100.00
CONT_ASSIGN	12413	1	1	100.00
CONT_ASSIGN	12414	1	1	100.00
CONT_ASSIGN	12415	1	1	100.00
CONT_ASSIGN	12417	1	1	100.00
CONT_ASSIGN	12419	1	1	100.00
CONT_ASSIGN	12421	1	1	100.00
CONT_ASSIGN	12423	1	1	100.00
CONT_ASSIGN	12425	1	1	100.00
CONT_ASSIGN	12427	1	1	100.00
CONT_ASSIGN	12429	1	1	100.00
CONT_ASSIGN	12431	1	1	100.00
CONT_ASSIGN	12433	1	1	100.00
CONT_ASSIGN	12434	1	1	100.00
CONT_ASSIGN	12435	1	1	100.00
CONT_ASSIGN	12437	1	1	100.00
CONT_ASSIGN	12439	1	1	100.00
CONT_ASSIGN	12441	1	1	100.00
CONT_ASSIGN	12443	1	1	100.00
CONT_ASSIGN	12445	1	1	100.00
CONT_ASSIGN	12447	1	1	100.00
CONT_ASSIGN	12449	1	1	100.00
CONT_ASSIGN	12451	1	1	100.00
CONT_ASSIGN	12453	1	1	100.00
CONT_ASSIGN	12454	1	1	100.00
CONT_ASSIGN	12455	1	1	100.00
CONT_ASSIGN	12457	1	1	100.00
CONT_ASSIGN	12459	1	1	100.00
CONT_ASSIGN	12461	1	1	100.00
CONT_ASSIGN	12463	1	1	100.00
CONT_ASSIGN	12465	1	1	100.00
CONT_ASSIGN	12467	1	1	100.00
CONT_ASSIGN	12469	1	1	100.00
CONT_ASSIGN	12471	1	1	100.00
CONT_ASSIGN	12473	1	1	100.00
CONT_ASSIGN	12474	1	1	100.00
CONT_ASSIGN	12475	1	1	100.00
CONT_ASSIGN	12477	1	1	100.00
CONT_ASSIGN	12479	1	1	100.00
CONT_ASSIGN	12481	1	1	100.00
CONT_ASSIGN	12483	1	1	100.00
CONT_ASSIGN	12485	1	1	100.00
CONT_ASSIGN	12487	1	1	100.00
CONT_ASSIGN	12488	1	1	100.00
CONT_ASSIGN	12490	1	1	100.00
CONT_ASSIGN	12491	1	1	100.00
CONT_ASSIGN	12493	1	1	100.00
CONT_ASSIGN	12494	1	1	100.00
CONT_ASSIGN	12496	1	1	100.00
CONT_ASSIGN	12497	1	1	100.00
CONT_ASSIGN	12499	1	1	100.00
CONT_ASSIGN	12500	1	1	100.00
CONT_ASSIGN	12502	1	1	100.00
CONT_ASSIGN	12503	1	1	100.00
CONT_ASSIGN	12505	1	1	100.00
CONT_ASSIGN	12506	1	1	100.00
CONT_ASSIGN	12508	1	1	100.00
CONT_ASSIGN	12509	1	1	100.00
CONT_ASSIGN	12511	1	1	100.00
CONT_ASSIGN	12512	1	1	100.00
CONT_ASSIGN	12514	1	1	100.00
CONT_ASSIGN	12515	1	1	100.00
CONT_ASSIGN	12517	1	1	100.00
CONT_ASSIGN	12518	1	1	100.00
CONT_ASSIGN	12519	1	1	100.00
CONT_ASSIGN	12521	1	1	100.00
CONT_ASSIGN	12523	1	1	100.00
CONT_ASSIGN	12525	1	1	100.00
CONT_ASSIGN	12527	1	1	100.00
CONT_ASSIGN	12529	1	1	100.00
CONT_ASSIGN	12531	1	1	100.00
CONT_ASSIGN	12533	1	1	100.00
CONT_ASSIGN	12534	1	1	100.00
CONT_ASSIGN	12535	1	1	100.00
CONT_ASSIGN	12537	1	1	100.00
CONT_ASSIGN	12539	1	1	100.00
CONT_ASSIGN	12541	1	1	100.00
CONT_ASSIGN	12543	1	1	100.00
CONT_ASSIGN	12545	1	1	100.00
CONT_ASSIGN	12547	1	1	100.00
CONT_ASSIGN	12549	1	1	100.00
CONT_ASSIGN	12550	1	1	100.00
CONT_ASSIGN	12551	1	1	100.00
CONT_ASSIGN	12553	1	1	100.00
CONT_ASSIGN	12555	1	1	100.00
CONT_ASSIGN	12557	1	1	100.00
CONT_ASSIGN	12559	1	1	100.00
CONT_ASSIGN	12561	1	1	100.00
CONT_ASSIGN	12563	1	1	100.00
CONT_ASSIGN	12565	1	1	100.00
CONT_ASSIGN	12566	1	1	100.00
CONT_ASSIGN	12567	1	1	100.00
CONT_ASSIGN	12569	1	1	100.00
CONT_ASSIGN	12571	1	1	100.00
CONT_ASSIGN	12573	1	1	100.00
CONT_ASSIGN	12575	1	1	100.00
CONT_ASSIGN	12577	1	1	100.00
CONT_ASSIGN	12579	1	1	100.00
CONT_ASSIGN	12581	1	1	100.00
CONT_ASSIGN	12582	1	1	100.00
CONT_ASSIGN	12583	1	1	100.00
CONT_ASSIGN	12585	1	1	100.00
CONT_ASSIGN	12587	1	1	100.00
CONT_ASSIGN	12589	1	1	100.00
CONT_ASSIGN	12591	1	1	100.00
CONT_ASSIGN	12593	1	1	100.00
CONT_ASSIGN	12595	1	1	100.00
CONT_ASSIGN	12597	1	1	100.00
CONT_ASSIGN	12598	1	1	100.00
CONT_ASSIGN	12599	1	1	100.00
CONT_ASSIGN	12601	1	1	100.00
CONT_ASSIGN	12603	1	1	100.00
CONT_ASSIGN	12605	1	1	100.00
CONT_ASSIGN	12607	1	1	100.00
CONT_ASSIGN	12609	1	1	100.00
CONT_ASSIGN	12611	1	1	100.00
CONT_ASSIGN	12613	1	1	100.00
CONT_ASSIGN	12614	1	1	100.00
CONT_ASSIGN	12615	1	1	100.00
CONT_ASSIGN	12617	1	1	100.00
CONT_ASSIGN	12619	1	1	100.00
CONT_ASSIGN	12621	1	1	100.00
CONT_ASSIGN	12623	1	1	100.00
CONT_ASSIGN	12625	1	1	100.00
CONT_ASSIGN	12627	1	1	100.00
CONT_ASSIGN	12629	1	1	100.00
CONT_ASSIGN	12630	1	1	100.00
CONT_ASSIGN	12631	1	1	100.00
CONT_ASSIGN	12633	1	1	100.00
CONT_ASSIGN	12635	1	1	100.00
CONT_ASSIGN	12637	1	1	100.00
CONT_ASSIGN	12639	1	1	100.00
CONT_ASSIGN	12641	1	1	100.00
CONT_ASSIGN	12643	1	1	100.00
CONT_ASSIGN	12645	1	1	100.00
CONT_ASSIGN	12646	1	1	100.00
CONT_ASSIGN	12647	1	1	100.00
CONT_ASSIGN	12649	1	1	100.00
CONT_ASSIGN	12651	1	1	100.00
CONT_ASSIGN	12653	1	1	100.00
CONT_ASSIGN	12655	1	1	100.00
CONT_ASSIGN	12657	1	1	100.00
CONT_ASSIGN	12659	1	1	100.00
CONT_ASSIGN	12661	1	1	100.00
CONT_ASSIGN	12662	1	1	100.00
CONT_ASSIGN	12663	1	1	100.00
CONT_ASSIGN	12665	1	1	100.00
CONT_ASSIGN	12667	1	1	100.00
CONT_ASSIGN	12669	1	1	100.00
CONT_ASSIGN	12671	1	1	100.00
CONT_ASSIGN	12673	1	1	100.00
CONT_ASSIGN	12675	1	1	100.00
CONT_ASSIGN	12677	1	1	100.00
CONT_ASSIGN	12678	1	1	100.00
CONT_ASSIGN	12680	1	1	100.00
CONT_ASSIGN	12681	1	1	100.00
CONT_ASSIGN	12682	1	1	100.00
CONT_ASSIGN	12684	1	1	100.00
CONT_ASSIGN	12686	1	1	100.00
CONT_ASSIGN	12688	1	1	100.00
CONT_ASSIGN	12690	1	1	100.00
CONT_ASSIGN	12692	1	1	100.00
CONT_ASSIGN	12694	1	1	100.00
CONT_ASSIGN	12696	1	1	100.00
CONT_ASSIGN	12697	1	1	100.00
CONT_ASSIGN	12699	1	1	100.00
CONT_ASSIGN	12700	1	1	100.00
CONT_ASSIGN	12702	1	1	100.00
CONT_ASSIGN	12703	1	1	100.00
CONT_ASSIGN	12704	1	1	100.00
CONT_ASSIGN	12706	1	1	100.00
CONT_ASSIGN	12708	1	1	100.00
CONT_ASSIGN	12710	1	1	100.00
CONT_ASSIGN	12712	1	1	100.00
CONT_ASSIGN	12714	1	1	100.00
CONT_ASSIGN	12716	1	1	100.00
CONT_ASSIGN	12718	1	1	100.00
CONT_ASSIGN	12719	1	1	100.00
CONT_ASSIGN	12720	1	1	100.00
CONT_ASSIGN	12722	1	1	100.00
CONT_ASSIGN	12724	1	1	100.00
CONT_ASSIGN	12726	1	1	100.00
CONT_ASSIGN	12728	1	1	100.00
CONT_ASSIGN	12730	1	1	100.00
CONT_ASSIGN	12732	1	1	100.00
CONT_ASSIGN	12734	1	1	100.00
CONT_ASSIGN	12735	1	1	100.00
CONT_ASSIGN	12737	1	1	100.00
CONT_ASSIGN	12738	1	1	100.00
CONT_ASSIGN	12740	1	1	100.00
CONT_ASSIGN	12741	1	1	100.00
CONT_ASSIGN	12743	1	1	100.00
CONT_ASSIGN	12744	1	1	100.00
CONT_ASSIGN	12746	1	1	100.00
CONT_ASSIGN	12747	1	1	100.00
CONT_ASSIGN	12749	1	1	100.00
CONT_ASSIGN	12750	1	1	100.00
CONT_ASSIGN	12752	1	1	100.00
CONT_ASSIGN	12753	1	1	100.00
CONT_ASSIGN	12755	1	1	100.00
CONT_ASSIGN	12756	1	1	100.00
CONT_ASSIGN	12758	1	1	100.00
CONT_ASSIGN	12759	1	1	100.00
CONT_ASSIGN	12761	1	1	100.00
CONT_ASSIGN	12762	1	1	100.00
CONT_ASSIGN	12764	1	1	100.00
CONT_ASSIGN	12765	1	1	100.00
CONT_ASSIGN	12766	1	1	100.00
CONT_ASSIGN	12768	1	1	100.00
CONT_ASSIGN	12770	1	1	100.00
CONT_ASSIGN	12772	1	1	100.00
CONT_ASSIGN	12774	1	1	100.00
CONT_ASSIGN	12776	1	1	100.00
CONT_ASSIGN	12778	1	1	100.00
CONT_ASSIGN	12780	1	1	100.00
CONT_ASSIGN	12781	1	1	100.00
CONT_ASSIGN	12782	1	1	100.00
CONT_ASSIGN	12784	1	1	100.00
CONT_ASSIGN	12786	1	1	100.00
CONT_ASSIGN	12788	1	1	100.00
CONT_ASSIGN	12790	1	1	100.00
CONT_ASSIGN	12792	1	1	100.00
CONT_ASSIGN	12794	1	1	100.00
CONT_ASSIGN	12796	1	1	100.00
CONT_ASSIGN	12797	1	1	100.00
CONT_ASSIGN	12798	1	1	100.00
CONT_ASSIGN	12800	1	1	100.00
CONT_ASSIGN	12802	1	1	100.00
CONT_ASSIGN	12804	1	1	100.00
CONT_ASSIGN	12806	1	1	100.00
CONT_ASSIGN	12808	1	1	100.00
CONT_ASSIGN	12810	1	1	100.00
CONT_ASSIGN	12812	1	1	100.00
CONT_ASSIGN	12813	1	1	100.00
CONT_ASSIGN	12814	1	1	100.00
CONT_ASSIGN	12816	1	1	100.00
CONT_ASSIGN	12818	1	1	100.00
CONT_ASSIGN	12820	1	1	100.00
CONT_ASSIGN	12822	1	1	100.00
CONT_ASSIGN	12824	1	1	100.00
CONT_ASSIGN	12826	1	1	100.00
CONT_ASSIGN	12828	1	1	100.00
CONT_ASSIGN	12829	1	1	100.00
CONT_ASSIGN	12830	1	1	100.00
CONT_ASSIGN	12832	1	1	100.00
CONT_ASSIGN	12834	1	1	100.00
CONT_ASSIGN	12836	1	1	100.00
CONT_ASSIGN	12838	1	1	100.00
CONT_ASSIGN	12840	1	1	100.00
CONT_ASSIGN	12842	1	1	100.00
CONT_ASSIGN	12844	1	1	100.00
CONT_ASSIGN	12845	1	1	100.00
CONT_ASSIGN	12846	1	1	100.00
CONT_ASSIGN	12848	1	1	100.00
CONT_ASSIGN	12850	1	1	100.00
CONT_ASSIGN	12852	1	1	100.00
CONT_ASSIGN	12854	1	1	100.00
CONT_ASSIGN	12856	1	1	100.00
CONT_ASSIGN	12858	1	1	100.00
CONT_ASSIGN	12860	1	1	100.00
CONT_ASSIGN	12861	1	1	100.00
CONT_ASSIGN	12862	1	1	100.00
CONT_ASSIGN	12864	1	1	100.00
CONT_ASSIGN	12866	1	1	100.00
CONT_ASSIGN	12868	1	1	100.00
CONT_ASSIGN	12870	1	1	100.00
CONT_ASSIGN	12872	1	1	100.00
CONT_ASSIGN	12874	1	1	100.00
CONT_ASSIGN	12876	1	1	100.00
CONT_ASSIGN	12877	1	1	100.00
CONT_ASSIGN	12878	1	1	100.00
CONT_ASSIGN	12880	1	1	100.00
CONT_ASSIGN	12882	1	1	100.00
CONT_ASSIGN	12884	1	1	100.00
CONT_ASSIGN	12886	1	1	100.00
CONT_ASSIGN	12888	1	1	100.00
CONT_ASSIGN	12890	1	1	100.00
CONT_ASSIGN	12892	1	1	100.00
CONT_ASSIGN	12893	1	1	100.00
CONT_ASSIGN	12894	1	1	100.00
CONT_ASSIGN	12896	1	1	100.00
CONT_ASSIGN	12898	1	1	100.00
CONT_ASSIGN	12900	1	1	100.00
CONT_ASSIGN	12902	1	1	100.00
CONT_ASSIGN	12904	1	1	100.00
CONT_ASSIGN	12906	1	1	100.00
CONT_ASSIGN	12908	1	1	100.00
CONT_ASSIGN	12909	1	1	100.00
CONT_ASSIGN	12910	1	1	100.00
CONT_ASSIGN	12912	1	1	100.00
CONT_ASSIGN	12914	1	1	100.00
CONT_ASSIGN	12916	1	1	100.00
CONT_ASSIGN	12918	1	1	100.00
CONT_ASSIGN	12920	1	1	100.00
CONT_ASSIGN	12922	1	1	100.00
CONT_ASSIGN	12924	1	1	100.00
CONT_ASSIGN	12925	1	1	100.00
CONT_ASSIGN	12927	1	1	100.00
CONT_ASSIGN	12928	1	1	100.00
CONT_ASSIGN	12929	1	1	100.00
CONT_ASSIGN	12931	1	1	100.00
CONT_ASSIGN	12933	1	1	100.00
CONT_ASSIGN	12935	1	1	100.00
CONT_ASSIGN	12937	1	1	100.00
CONT_ASSIGN	12939	1	1	100.00
CONT_ASSIGN	12941	1	1	100.00
CONT_ASSIGN	12943	1	1	100.00
CONT_ASSIGN	12944	1	1	100.00
CONT_ASSIGN	12946	1	1	100.00
CONT_ASSIGN	12947	1	1	100.00
CONT_ASSIGN	12949	1	1	100.00
CONT_ASSIGN	12950	1	1	100.00
CONT_ASSIGN	12951	1	1	100.00
CONT_ASSIGN	12953	1	1	100.00
CONT_ASSIGN	12955	1	1	100.00
CONT_ASSIGN	12957	1	1	100.00
CONT_ASSIGN	12959	1	1	100.00
CONT_ASSIGN	12961	1	1	100.00
CONT_ASSIGN	12963	1	1	100.00
CONT_ASSIGN	12965	1	1	100.00
CONT_ASSIGN	12966	1	1	100.00
CONT_ASSIGN	12967	1	1	100.00
CONT_ASSIGN	12969	1	1	100.00
CONT_ASSIGN	12971	1	1	100.00
CONT_ASSIGN	12973	1	1	100.00
CONT_ASSIGN	12975	1	1	100.00
CONT_ASSIGN	12977	1	1	100.00
CONT_ASSIGN	12979	1	1	100.00
CONT_ASSIGN	12981	1	1	100.00
CONT_ASSIGN	12982	1	1	100.00
CONT_ASSIGN	12984	1	1	100.00
CONT_ASSIGN	12985	1	1	100.00
CONT_ASSIGN	12986	1	1	100.00
CONT_ASSIGN	12988	1	1	100.00
CONT_ASSIGN	12990	1	1	100.00
CONT_ASSIGN	12991	1	1	100.00
CONT_ASSIGN	12993	1	1	100.00
CONT_ASSIGN	12995	1	1	100.00
CONT_ASSIGN	12996	1	1	100.00
CONT_ASSIGN	12998	1	1	100.00
CONT_ASSIGN	13000	1	1	100.00
CONT_ASSIGN	13002	1	1	100.00
CONT_ASSIGN	13004	1	1	100.00
CONT_ASSIGN	13006	1	1	100.00
CONT_ASSIGN	13008	1	1	100.00
CONT_ASSIGN	13010	1	1	100.00
CONT_ASSIGN	13011	1	1	100.00
CONT_ASSIGN	13013	1	1	100.00
CONT_ASSIGN	13015	1	1	100.00
CONT_ASSIGN	13016	1	1	100.00
CONT_ASSIGN	13018	1	1	100.00
CONT_ASSIGN	13019	1	1	100.00
CONT_ASSIGN	13021	1	1	100.00
CONT_ASSIGN	13022	1	1	100.00
CONT_ASSIGN	13024	1	1	100.00
CONT_ASSIGN	13026	1	1	100.00
CONT_ASSIGN	13027	1	1	100.00
CONT_ASSIGN	13029	1	1	100.00
CONT_ASSIGN	13030	1	1	100.00
CONT_ASSIGN	13032	1	1	100.00
CONT_ASSIGN	13034	1	1	100.00
CONT_ASSIGN	13035	1	1	100.00
CONT_ASSIGN	13037	1	1	100.00
ALWAYS	13041	374	374	100.00
ALWAYS	13720	3	3	100.00
ALWAYS	13728	3	3	100.00
CONT_ASSIGN	13736	1	1	100.00
CONT_ASSIGN	13740	1	1	100.00
ALWAYS	13742	2	2	100.00
CONT_ASSIGN	13757	1	1	100.00
CONT_ASSIGN	13758	1	1	100.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_systems_flash_ctrl_0.1/rtl/autogen/flash_ctrl_core_reg_top.sv' or '../src/lowrisc_systems_flash_ctrl_0.1/rtl/autogen/flash_ctrl_core_reg_top.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
64	1	1
65	1	1
66	1	1
67	0	1
			MISSING_ELSE
73	1	1
122	1	1
125	1	1
126	1	1
			MISSING_ELSE
128	1	1
129	1	1
			MISSING_ELSE
131	1	1
132	1	1
			MISSING_ELSE
159	1	1
160	1	1
12005	1	1
12006	1	1
12007	1	1
12008	1	1
12009	1	1
12010	1	1
12011	1	1
12012	1	1
12013	1	1
12014	1	1
12015	1	1
12016	1	1
12017	1	1
12018	1	1
12019	1	1
12020	1	1
12021	1	1
12022	1	1
12023	1	1
12024	1	1
12025	1	1
12026	1	1
12027	1	1
12028	1	1
12029	1	1
12030	1	1
12031	1	1
12032	1	1
12033	1	1
12034	1	1
12035	1	1
12036	1	1
12037	1	1
12038	1	1
12039	1	1
12040	1	1
12041	1	1
12042	1	1
12043	1	1
12044	1	1
12045	1	1
12046	1	1
12047	1	1
12048	1	1
12049	1	1
12050	1	1
12051	1	1
12052	1	1
12053	1	1
12054	1	1
12055	1	1
12056	1	1
12057	1	1
12058	1	1
12059	1	1
12060	1	1
12061	1	1
12062	1	1
12063	1	1
12064	1	1
12065	1	1
12066	1	1
12067	1	1
12068	1	1
12069	1	1
12070	1	1
12071	1	1
12072	1	1
12073	1	1
12074	1	1
12075	1	1
12076	1	1
12077	1	1
12078	1	1
12079	1	1
12080	1	1
12081	1	1
12082	1	1
12083	1	1
12084	1	1
12085	1	1
12086	1	1
12087	1	1
12088	1	1
12089	1	1
12090	1	1
12091	1	1
12092	1	1
12093	1	1
12094	1	1
12095	1	1
12096	1	1
12097	1	1
12098	1	1
12099	1	1
12100	1	1
12101	1	1
12102	1	1
12103	1	1
12106	1	1
12110	1	1
12210	1	1
12212	1	1
12214	1	1
12216	1	1
12218	1	1
12220	1	1
12222	1	1
12223	1	1
12225	1	1
12227	1	1
12229	1	1
12231	1	1
12233	1	1
12235	1	1
12236	1	1
12238	1	1
12240	1	1
12242	1	1
12244	1	1
12246	1	1
12248	1	1
12249	1	1
12251	1	1
12253	1	1
12254	1	1
12256	1	1
12257	1	1
12259	1	1
12260	1	1
12262	1	1
12263	1	1
12264	1	1
12266	1	1
12268	1	1
12270	1	1
12272	1	1
12274	1	1
12276	1	1
12278	1	1
12279	1	1
12281	1	1
12282	1	1
12284	1	1
12286	1	1
12287	1	1
12289	1	1
12290	1	1
12292	1	1
12293	1	1
12295	1	1
12296	1	1
12298	1	1
12299	1	1
12301	1	1
12302	1	1
12304	1	1
12305	1	1
12307	1	1
12308	1	1
12310	1	1
12311	1	1
12313	1	1
12314	1	1
12315	1	1
12317	1	1
12319	1	1
12321	1	1
12323	1	1
12325	1	1
12327	1	1
12329	1	1
12331	1	1
12333	1	1
12334	1	1
12335	1	1
12337	1	1
12339	1	1
12341	1	1
12343	1	1
12345	1	1
12347	1	1
12349	1	1
12351	1	1
12353	1	1
12354	1	1
12355	1	1
12357	1	1
12359	1	1
12361	1	1
12363	1	1
12365	1	1
12367	1	1
12369	1	1
12371	1	1
12373	1	1
12374	1	1
12375	1	1
12377	1	1
12379	1	1
12381	1	1
12383	1	1
12385	1	1
12387	1	1
12389	1	1
12391	1	1
12393	1	1
12394	1	1
12395	1	1
12397	1	1
12399	1	1
12401	1	1
12403	1	1
12405	1	1
12407	1	1
12409	1	1
12411	1	1
12413	1	1
12414	1	1
12415	1	1
12417	1	1
12419	1	1
12421	1	1
12423	1	1
12425	1	1
12427	1	1
12429	1	1
12431	1	1
12433	1	1
12434	1	1
12435	1	1
12437	1	1
12439	1	1
12441	1	1
12443	1	1
12445	1	1
12447	1	1
12449	1	1
12451	1	1
12453	1	1
12454	1	1
12455	1	1
12457	1	1
12459	1	1
12461	1	1
12463	1	1
12465	1	1
12467	1	1
12469	1	1
12471	1	1
12473	1	1
12474	1	1
12475	1	1
12477	1	1
12479	1	1
12481	1	1
12483	1	1
12485	1	1
12487	1	1
12488	1	1
12490	1	1
12491	1	1
12493	1	1
12494	1	1
12496	1	1
12497	1	1
12499	1	1
12500	1	1
12502	1	1
12503	1	1
12505	1	1
12506	1	1
12508	1	1
12509	1	1
12511	1	1
12512	1	1
12514	1	1
12515	1	1
12517	1	1
12518	1	1
12519	1	1
12521	1	1
12523	1	1
12525	1	1
12527	1	1
12529	1	1
12531	1	1
12533	1	1
12534	1	1
12535	1	1
12537	1	1
12539	1	1
12541	1	1
12543	1	1
12545	1	1
12547	1	1
12549	1	1
12550	1	1
12551	1	1
12553	1	1
12555	1	1
12557	1	1
12559	1	1
12561	1	1
12563	1	1
12565	1	1
12566	1	1
12567	1	1
12569	1	1
12571	1	1
12573	1	1
12575	1	1
12577	1	1
12579	1	1
12581	1	1
12582	1	1
12583	1	1
12585	1	1
12587	1	1
12589	1	1
12591	1	1
12593	1	1
12595	1	1
12597	1	1
12598	1	1
12599	1	1
12601	1	1
12603	1	1
12605	1	1
12607	1	1
12609	1	1
12611	1	1
12613	1	1
12614	1	1
12615	1	1
12617	1	1
12619	1	1
12621	1	1
12623	1	1
12625	1	1
12627	1	1
12629	1	1
12630	1	1
12631	1	1
12633	1	1
12635	1	1
12637	1	1
12639	1	1
12641	1	1
12643	1	1
12645	1	1
12646	1	1
12647	1	1
12649	1	1
12651	1	1
12653	1	1
12655	1	1
12657	1	1
12659	1	1
12661	1	1
12662	1	1
12663	1	1
12665	1	1
12667	1	1
12669	1	1
12671	1	1
12673	1	1
12675	1	1
12677	1	1
12678	1	1
12680	1	1
12681	1	1
12682	1	1
12684	1	1
12686	1	1
12688	1	1
12690	1	1
12692	1	1
12694	1	1
12696	1	1
12697	1	1
12699	1	1
12700	1	1
12702	1	1
12703	1	1
12704	1	1
12706	1	1
12708	1	1
12710	1	1
12712	1	1
12714	1	1
12716	1	1
12718	1	1
12719	1	1
12720	1	1
12722	1	1
12724	1	1
12726	1	1
12728	1	1
12730	1	1
12732	1	1
12734	1	1
12735	1	1
12737	1	1
12738	1	1
12740	1	1
12741	1	1
12743	1	1
12744	1	1
12746	1	1
12747	1	1
12749	1	1
12750	1	1
12752	1	1
12753	1	1
12755	1	1
12756	1	1
12758	1	1
12759	1	1
12761	1	1
12762	1	1
12764	1	1
12765	1	1
12766	1	1
12768	1	1
12770	1	1
12772	1	1
12774	1	1
12776	1	1
12778	1	1
12780	1	1
12781	1	1
12782	1	1
12784	1	1
12786	1	1
12788	1	1
12790	1	1
12792	1	1
12794	1	1
12796	1	1
12797	1	1
12798	1	1
12800	1	1
12802	1	1
12804	1	1
12806	1	1
12808	1	1
12810	1	1
12812	1	1
12813	1	1
12814	1	1
12816	1	1
12818	1	1
12820	1	1
12822	1	1
12824	1	1
12826	1	1
12828	1	1
12829	1	1
12830	1	1
12832	1	1
12834	1	1
12836	1	1
12838	1	1
12840	1	1
12842	1	1
12844	1	1
12845	1	1
12846	1	1
12848	1	1
12850	1	1
12852	1	1
12854	1	1
12856	1	1
12858	1	1
12860	1	1
12861	1	1
12862	1	1
12864	1	1
12866	1	1
12868	1	1
12870	1	1
12872	1	1
12874	1	1
12876	1	1
12877	1	1
12878	1	1
12880	1	1
12882	1	1
12884	1	1
12886	1	1
12888	1	1
12890	1	1
12892	1	1
12893	1	1
12894	1	1
12896	1	1
12898	1	1
12900	1	1
12902	1	1
12904	1	1
12906	1	1
12908	1	1
12909	1	1
12910	1	1
12912	1	1
12914	1	1
12916	1	1
12918	1	1
12920	1	1
12922	1	1
12924	1	1
12925	1	1
12927	1	1
12928	1	1
12929	1	1
12931	1	1
12933	1	1
12935	1	1
12937	1	1
12939	1	1
12941	1	1
12943	1	1
12944	1	1
12946	1	1
12947	1	1
12949	1	1
12950	1	1
12951	1	1
12953	1	1
12955	1	1
12957	1	1
12959	1	1
12961	1	1
12963	1	1
12965	1	1
12966	1	1
12967	1	1
12969	1	1
12971	1	1
12973	1	1
12975	1	1
12977	1	1
12979	1	1
12981	1	1
12982	1	1
12984	1	1
12985	1	1
12986	1	1
12988	1	1
12990	1	1
12991	1	1
12993	1	1
12995	1	1
12996	1	1
12998	1	1
13000	1	1
13002	1	1
13004	1	1
13006	1	1
13008	1	1
13010	1	1
13011	1	1
13013	1	1
13015	1	1
13016	1	1
13018	1	1
13019	1	1
13021	1	1
13022	1	1
13024	1	1
13026	1	1
13027	1	1
13029	1	1
13030	1	1
13032	1	1
13034	1	1
13035	1	1
13037	1	1
13041	1	1
13042	1	1
13044	1	1
13045	1	1
13046	1	1
13047	1	1
13048	1	1
13049	1	1
13053	1	1
13054	1	1
13055	1	1
13056	1	1
13057	1	1
13058	1	1
13062	1	1
13063	1	1
13064	1	1
13065	1	1
13066	1	1
13067	1	1
13071	1	1
13072	1	1
13076	1	1
13080	1	1
13084	1	1
13088	1	1
13092	1	1
13093	1	1
13094	1	1
13095	1	1
13096	1	1
13097	1	1
13098	1	1
13102	1	1
13106	1	1
13107	1	1
13111	1	1
13115	1	1
13119	1	1
13123	1	1
13127	1	1
13131	1	1
13135	1	1
13139	1	1
13143	1	1
13147	1	1
13148	1	1
13149	1	1
13150	1	1
13151	1	1
13152	1	1
13153	1	1
13154	1	1
13155	1	1
13159	1	1
13160	1	1
13161	1	1
13162	1	1
13163	1	1
13164	1	1
13165	1	1
13166	1	1
13167	1	1
13171	1	1
13172	1	1
13173	1	1
13174	1	1
13175	1	1
13176	1	1
13177	1	1
13178	1	1
13179	1	1
13183	1	1
13184	1	1
13185	1	1
13186	1	1
13187	1	1
13188	1	1
13189	1	1
13190	1	1
13191	1	1
13195	1	1
13196	1	1
13197	1	1
13198	1	1
13199	1	1
13200	1	1
13201	1	1
13202	1	1
13203	1	1
13207	1	1
13208	1	1
13209	1	1
13210	1	1
13211	1	1
13212	1	1
13213	1	1
13214	1	1
13215	1	1
13219	1	1
13220	1	1
13221	1	1
13222	1	1
13223	1	1
13224	1	1
13225	1	1
13226	1	1
13227	1	1
13231	1	1
13232	1	1
13233	1	1
13234	1	1
13235	1	1
13236	1	1
13237	1	1
13238	1	1
13239	1	1
13243	1	1
13244	1	1
13245	1	1
13246	1	1
13247	1	1
13248	1	1
13252	1	1
13256	1	1
13260	1	1
13264	1	1
13268	1	1
13272	1	1
13276	1	1
13280	1	1
13284	1	1
13288	1	1
13292	1	1
13293	1	1
13294	1	1
13295	1	1
13296	1	1
13297	1	1
13298	1	1
13302	1	1
13303	1	1
13304	1	1
13305	1	1
13306	1	1
13307	1	1
13308	1	1
13312	1	1
13313	1	1
13314	1	1
13315	1	1
13316	1	1
13317	1	1
13318	1	1
13322	1	1
13323	1	1
13324	1	1
13325	1	1
13326	1	1
13327	1	1
13328	1	1
13332	1	1
13333	1	1
13334	1	1
13335	1	1
13336	1	1
13337	1	1
13338	1	1
13342	1	1
13343	1	1
13344	1	1
13345	1	1
13346	1	1
13347	1	1
13348	1	1
13352	1	1
13353	1	1
13354	1	1
13355	1	1
13356	1	1
13357	1	1
13358	1	1
13362	1	1
13363	1	1
13364	1	1
13365	1	1
13366	1	1
13367	1	1
13368	1	1
13372	1	1
13373	1	1
13374	1	1
13375	1	1
13376	1	1
13377	1	1
13378	1	1
13382	1	1
13383	1	1
13384	1	1
13385	1	1
13386	1	1
13387	1	1
13388	1	1
13392	1	1
13396	1	1
13397	1	1
13398	1	1
13399	1	1
13400	1	1
13401	1	1
13402	1	1
13406	1	1
13410	1	1
13414	1	1
13415	1	1
13416	1	1
13417	1	1
13418	1	1
13419	1	1
13420	1	1
13424	1	1
13425	1	1
13426	1	1
13427	1	1
13428	1	1
13429	1	1
13430	1	1
13434	1	1
13438	1	1
13442	1	1
13446	1	1
13450	1	1
13454	1	1
13458	1	1
13462	1	1
13466	1	1
13470	1	1
13474	1	1
13475	1	1
13476	1	1
13477	1	1
13478	1	1
13479	1	1
13480	1	1
13484	1	1
13485	1	1
13486	1	1
13487	1	1
13488	1	1
13489	1	1
13490	1	1
13494	1	1
13495	1	1
13496	1	1
13497	1	1
13498	1	1
13499	1	1
13500	1	1
13504	1	1
13505	1	1
13506	1	1
13507	1	1
13508	1	1
13509	1	1
13510	1	1
13514	1	1
13515	1	1
13516	1	1
13517	1	1
13518	1	1
13519	1	1
13520	1	1
13524	1	1
13525	1	1
13526	1	1
13527	1	1
13528	1	1
13529	1	1
13530	1	1
13534	1	1
13535	1	1
13536	1	1
13537	1	1
13538	1	1
13539	1	1
13540	1	1
13544	1	1
13545	1	1
13546	1	1
13547	1	1
13548	1	1
13549	1	1
13550	1	1
13554	1	1
13555	1	1
13556	1	1
13557	1	1
13558	1	1
13559	1	1
13560	1	1
13564	1	1
13565	1	1
13566	1	1
13567	1	1
13568	1	1
13569	1	1
13570	1	1
13574	1	1
13578	1	1
13579	1	1
13580	1	1
13581	1	1
13582	1	1
13583	1	1
13584	1	1
13588	1	1
13592	1	1
13596	1	1
13597	1	1
13598	1	1
13599	1	1
13600	1	1
13601	1	1
13602	1	1
13606	1	1
13607	1	1
13608	1	1
13609	1	1
13610	1	1
13611	1	1
13612	1	1
13616	1	1
13620	1	1
13621	1	1
13625	1	1
13626	1	1
13630	1	1
13631	1	1
13632	1	1
13633	1	1
13634	1	1
13638	1	1
13639	1	1
13640	1	1
13641	1	1
13642	1	1
13643	1	1
13644	1	1
13648	1	1
13649	1	1
13650	1	1
13651	1	1
13652	1	1
13653	1	1
13654	1	1
13655	1	1
13656	1	1
13657	1	1
13661	1	1
13665	1	1
13666	1	1
13670	1	1
13674	1	1
13678	1	1
13682	1	1
13686	1	1
13687	1	1
13691	1	1
13692	1	1
13693	1	1
13697	1	1
13701	1	1
13702	1	1
13706	1	1
13720	1	1
13721	1	1
13723	1	1
13728	1	1
13729	1	1
13731	1	1
13736	1	1
13740	1	1
13742	1	1
13743	1	1
13757	1	1
13758	1	1

---

Cond Coverage for Module : flash_ctrl_core_reg_top

	Total	Covered	Percent
Conditions	11	11	100.00
Logical	11	11	100.00
Non-Logical	0	0
Event	0	0

 LINE       125
 EXPRESSION ((tl_i.a_address[(AW - 1):0] >= 392) && (tl_i.a_address[(AW - 1):0] < 396))
             -----------------1-----------------    -----------------2----------------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Covered	T1,T2,T3
1	1	Covered	T1,T2,T3

 LINE       128
 EXPRESSION ((tl_i.a_address[(AW - 1):0] >= 396) && (tl_i.a_address[(AW - 1):0] < 400))
             -----------------1-----------------    -----------------2----------------

-1-	-2-	Status	Tests
0	1	Covered	T1,T2,T3
1	0	Covered	T15,T16,T17
1	1	Covered	T1,T2,T3

 LINE       12106
 EXPRESSION ((reg_re || reg_we) ? ((~|addr_hit)) : 1'b0)
             ---------1--------

-1-	Status	Tests
0	Covered	T1,T2,T3
1	Covered	T1,T2,T3

 LINE       12106
 SUB-EXPRESSION (reg_re || reg_we)
                 ---1--    ---2--

-1-	-2-	Status	Tests
0	0	Covered	T1,T2,T3
0	1	Covered	T1,T2,T3
1	0	Covered	T1,T2,T3

---

Branch Coverage for Module : flash_ctrl_core_reg_top

	Line No.	Total	Covered	Percent
Branches		115	114	99.13
TERNARY	12106	2	2	100.00
IF	64	3	2	66.67
IF	125	2	2	100.00
IF	128	2	2	100.00
IF	131	2	2	100.00
CASE	13042	99	99	100.00
IF	13720	2	2	100.00
IF	13728	2	2	100.00
CASE	13743	1	1	100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_systems_flash_ctrl_0.1/rtl/autogen/flash_ctrl_core_reg_top.sv' or '../src/lowrisc_systems_flash_ctrl_0.1/rtl/autogen/flash_ctrl_core_reg_top.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	12106	((reg_re || reg_we)) ? 

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	64	if ((!rst_ni))
-2-:	66	if (intg_err)

Branches:

-1-	-2-	Status	Tests
1	-	Covered	T1,T2,T3
0	1	Not Covered
0	0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	125	if (((tl_i.a_address[(AW - 1):0] >= 392) && (tl_i.a_address[(AW - 1):0] < 396)))

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	128	if (((tl_i.a_address[(AW - 1):0] >= 396) && (tl_i.a_address[(AW - 1):0] < 400)))

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	131	if (intg_err)

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	13042	case (1'b1)

Branches:

-1-	Status	Tests
addr_hit[0]	Covered	T1,T2,T3
addr_hit[1]	Covered	T1,T2,T3
addr_hit[2]	Covered	T1,T2,T3
addr_hit[3]	Covered	T1,T2,T3
addr_hit[4]	Covered	T1,T2,T3
addr_hit[5]	Covered	T1,T2,T3
addr_hit[6]	Covered	T1,T2,T3
addr_hit[7]	Covered	T1,T2,T3
addr_hit[8]	Covered	T1,T2,T3
addr_hit[9]	Covered	T1,T2,T3
addr_hit[10]	Covered	T1,T2,T3
addr_hit[11]	Covered	T1,T2,T3
addr_hit[12]	Covered	T1,T2,T3
addr_hit[13]	Covered	T1,T2,T3
addr_hit[14]	Covered	T1,T2,T3
addr_hit[15]	Covered	T1,T2,T3
addr_hit[16]	Covered	T1,T2,T3
addr_hit[17]	Covered	T1,T2,T3
addr_hit[18]	Covered	T1,T2,T3
addr_hit[19]	Covered	T1,T2,T3
addr_hit[20]	Covered	T1,T2,T3
addr_hit[21]	Covered	T1,T2,T3
addr_hit[22]	Covered	T1,T2,T3
addr_hit[23]	Covered	T1,T2,T3
addr_hit[24]	Covered	T1,T2,T3
addr_hit[25]	Covered	T1,T2,T3
addr_hit[26]	Covered	T1,T2,T3
addr_hit[27]	Covered	T1,T2,T3
addr_hit[28]	Covered	T1,T2,T3
addr_hit[29]	Covered	T1,T2,T3
addr_hit[30]	Covered	T1,T2,T3
addr_hit[31]	Covered	T1,T2,T3
addr_hit[32]	Covered	T1,T2,T3
addr_hit[33]	Covered	T1,T2,T3
addr_hit[34]	Covered	T1,T2,T3
addr_hit[35]	Covered	T1,T2,T3
addr_hit[36]	Covered	T1,T2,T3
addr_hit[37]	Covered	T1,T2,T3
addr_hit[38]	Covered	T1,T2,T3
addr_hit[39]	Covered	T1,T2,T3
addr_hit[40]	Covered	T1,T2,T3
addr_hit[41]	Covered	T1,T2,T3
addr_hit[42]	Covered	T1,T2,T3
addr_hit[43]	Covered	T1,T2,T3
addr_hit[44]	Covered	T1,T2,T3
addr_hit[45]	Covered	T1,T2,T3
addr_hit[46]	Covered	T1,T2,T3
addr_hit[47]	Covered	T1,T2,T3
addr_hit[48]	Covered	T1,T2,T3
addr_hit[49]	Covered	T1,T2,T3
addr_hit[50]	Covered	T1,T2,T3
addr_hit[51]	Covered	T1,T2,T3
addr_hit[52]	Covered	T1,T2,T3
addr_hit[53]	Covered	T1,T2,T3
addr_hit[54]	Covered	T1,T2,T3
addr_hit[55]	Covered	T1,T2,T3
addr_hit[56]	Covered	T1,T2,T3
addr_hit[57]	Covered	T1,T2,T3
addr_hit[58]	Covered	T1,T2,T3
addr_hit[59]	Covered	T1,T2,T3
addr_hit[60]	Covered	T1,T2,T3
addr_hit[61]	Covered	T1,T2,T3
addr_hit[62]	Covered	T1,T2,T3
addr_hit[63]	Covered	T1,T2,T3
addr_hit[64]	Covered	T1,T2,T3
addr_hit[65]	Covered	T1,T2,T3
addr_hit[66]	Covered	T1,T2,T3
addr_hit[67]	Covered	T1,T2,T3
addr_hit[68]	Covered	T1,T2,T3
addr_hit[69]	Covered	T1,T2,T3
addr_hit[70]	Covered	T1,T2,T3
addr_hit[71]	Covered	T1,T2,T3
addr_hit[72]	Covered	T1,T2,T3
addr_hit[73]	Covered	T1,T2,T3
addr_hit[74]	Covered	T1,T2,T3
addr_hit[75]	Covered	T1,T2,T3
addr_hit[76]	Covered	T1,T2,T3
addr_hit[77]	Covered	T1,T2,T3
addr_hit[78]	Covered	T1,T2,T3
addr_hit[79]	Covered	T1,T2,T3
addr_hit[80]	Covered	T1,T2,T3
addr_hit[81]	Covered	T1,T2,T3
addr_hit[82]	Covered	T1,T2,T3
addr_hit[83]	Covered	T1,T2,T3
addr_hit[84]	Covered	T1,T2,T3
addr_hit[85]	Covered	T1,T2,T3
addr_hit[86]	Covered	T1,T2,T3
addr_hit[87]	Covered	T1,T2,T3
addr_hit[88]	Covered	T1,T2,T3
addr_hit[89]	Covered	T1,T2,T3
addr_hit[90]	Covered	T1,T2,T3
addr_hit[91]	Covered	T1,T2,T3
addr_hit[92]	Covered	T1,T2,T3
addr_hit[93]	Covered	T1,T2,T3
addr_hit[94]	Covered	T1,T2,T3
addr_hit[95]	Covered	T1,T2,T3
addr_hit[96]	Covered	T1,T2,T3
addr_hit[97]	Covered	T1,T2,T3
default	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	13720	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	13728	if ((!rst_shadowed_ni))

Branches:

-1-	Status	Tests
1	Covered	T1,T2,T3
0	Covered	T1,T2,T3

	LineNo.	Expression
-1-:	13743	case (1'b1)

Branches:

-1-	Status	Tests
default	Covered	T1,T2,T3

---

Assert Coverage for Module : flash_ctrl_core_reg_top

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	4	4	100.00	4	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	4	4	100.00	4	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
en2addrHit	11550209	1996183	0	0
reAfterRv	11550209	1996183	0	0
rePulse	11550209	1576281	0	0
wePulse	11550209	419902	0	0

en2addrHit

Name	Attempts	Real Successes	Failures	Incomplete
Total	11550209	1996183	0	0
T1	31073	1908	0	0
T2	11465	4684	0	0
T3	17456	7284	0	0
T4	8103	546	0	0
T5	17287	6971	0	0
T6	6611	478	0	0
T7	4810	517	0	0
T8	6819	2641	0	0
T9	4361	1556	0	0
T10	211319	29715	0	0

reAfterRv

Name	Attempts	Real Successes	Failures	Incomplete
Total	11550209	1996183	0	0
T1	31073	1908	0	0
T2	11465	4684	0	0
T3	17456	7284	0	0
T4	8103	546	0	0
T5	17287	6971	0	0
T6	6611	478	0	0
T7	4810	517	0	0
T8	6819	2641	0	0
T9	4361	1556	0	0
T10	211319	29715	0	0

rePulse

Name	Attempts	Real Successes	Failures	Incomplete
Total	11550209	1576281	0	0
T1	31073	1058	0	0
T2	11465	3930	0	0
T3	17456	6590	0	0
T4	8103	230	0	0
T5	17287	6103	0	0
T6	6611	270	0	0
T7	4810	321	0	0
T8	6819	2331	0	0
T9	4361	1360	0	0
T10	211319	29003	0	0

wePulse

Name	Attempts	Real Successes	Failures	Incomplete
Total	11550209	419902	0	0
T1	31073	850	0	0
T2	11465	754	0	0
T3	17456	694	0	0
T4	8103	316	0	0
T5	17287	868	0	0
T6	6611	208	0	0
T7	4810	196	0	0
T8	6819	310	0	0
T9	4361	196	0	0
T10	211319	712	0	0