Module Definition
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Module : prim_edge_detector
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_prog_empty_event 100.00 100.00 100.00
tb.dut.u_prog_lvl_event 100.00 100.00 100.00
tb.dut.u_rd_full_event 100.00 100.00 100.00
tb.dut.u_rd_lvl_event 100.00 100.00 100.00



Module Instance : tb.dut.u_prog_empty_event

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
66.52 91.74 69.23 13.28 75.00 83.33 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
g_sync.u_sync 100.00 100.00 100.00



Module Instance : tb.dut.u_prog_lvl_event

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
66.52 91.74 69.23 13.28 75.00 83.33 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
g_sync.u_sync 100.00 100.00 100.00



Module Instance : tb.dut.u_rd_full_event

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
66.52 91.74 69.23 13.28 75.00 83.33 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
g_sync.u_sync 100.00 100.00 100.00



Module Instance : tb.dut.u_rd_lvl_event

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
66.52 91.74 69.23 13.28 75.00 83.33 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
g_sync.u_sync 100.00 100.00 100.00

Line Coverage for Module : prim_edge_detector
Line No.TotalCoveredPercent
TOTAL66100.00
CONT_ASSIGN4511100.00
ALWAYS4833100.00
CONT_ASSIGN5211100.00
CONT_ASSIGN5311100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
48 2 2
49 1 1
52 1 1
53 1 1


Branch Coverage for Module : prim_edge_detector
Line No.TotalCoveredPercent
Branches 2 2 100.00
IF 48 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 48 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.u_prog_empty_event
Line No.TotalCoveredPercent
TOTAL66100.00
CONT_ASSIGN4511100.00
ALWAYS4833100.00
CONT_ASSIGN5211100.00
CONT_ASSIGN5311100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
48 2 2
49 1 1
52 1 1
53 1 1


Branch Coverage for Instance : tb.dut.u_prog_empty_event
Line No.TotalCoveredPercent
Branches 2 2 100.00
IF 48 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 48 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.u_prog_lvl_event
Line No.TotalCoveredPercent
TOTAL66100.00
CONT_ASSIGN4511100.00
ALWAYS4833100.00
CONT_ASSIGN5211100.00
CONT_ASSIGN5311100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
48 2 2
49 1 1
52 1 1
53 1 1


Branch Coverage for Instance : tb.dut.u_prog_lvl_event
Line No.TotalCoveredPercent
Branches 2 2 100.00
IF 48 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 48 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.u_rd_full_event
Line No.TotalCoveredPercent
TOTAL66100.00
CONT_ASSIGN4511100.00
ALWAYS4833100.00
CONT_ASSIGN5211100.00
CONT_ASSIGN5311100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
48 2 2
49 1 1
52 1 1
53 1 1


Branch Coverage for Instance : tb.dut.u_rd_full_event
Line No.TotalCoveredPercent
Branches 2 2 100.00
IF 48 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 48 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

Line Coverage for Instance : tb.dut.u_rd_lvl_event
Line No.TotalCoveredPercent
TOTAL66100.00
CONT_ASSIGN4511100.00
ALWAYS4833100.00
CONT_ASSIGN5211100.00
CONT_ASSIGN5311100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
48 2 2
49 1 1
52 1 1
53 1 1


Branch Coverage for Instance : tb.dut.u_rd_lvl_event
Line No.TotalCoveredPercent
Branches 2 2 100.00
IF 48 2 2 100.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv' or '../src/lowrisc_prim_edge_detector_0.1/rtl/prim_edge_detector.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 48 if ((!rst_ni))

Branches:
-1-StatusTests
1 Covered T1,T2,T3
0 Covered T1,T2,T3

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