Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
239 |
1 |
|
T20 |
6 |
|
T51 |
1 |
|
T61 |
11 |
| others[1] |
217 |
1 |
|
T20 |
14 |
|
T76 |
1 |
|
T61 |
7 |
| others[2] |
226 |
1 |
|
T20 |
8 |
|
T61 |
16 |
|
T91 |
9 |
| others[3] |
363 |
1 |
|
T1 |
1 |
|
T20 |
13 |
|
T50 |
2 |
| false |
112 |
1 |
|
T20 |
7 |
|
T61 |
5 |
|
T91 |
2 |
| true |
13757 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9277 |
1 |
|
T27 |
1 |
|
T310 |
1 |
|
T122 |
1 |
| others[1] |
1224 |
1 |
|
T14 |
1 |
|
T127 |
1 |
|
T311 |
1 |
| others[2] |
1263 |
1 |
|
T332 |
1 |
|
T179 |
1 |
|
T129 |
1 |
| others[3] |
2123 |
1 |
|
T29 |
1 |
|
T186 |
1 |
|
T308 |
1 |
| false |
583 |
1 |
|
T30 |
1 |
|
T341 |
1 |
|
T1 |
1 |
| true |
444 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9289 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T308 |
1 |
| others[1] |
1223 |
1 |
|
T30 |
1 |
|
T180 |
1 |
|
T240 |
1 |
| others[2] |
1223 |
1 |
|
T124 |
1 |
|
T19 |
15 |
|
T20 |
19 |
| others[3] |
2099 |
1 |
|
T29 |
1 |
|
T127 |
1 |
|
T186 |
1 |
| false |
653 |
1 |
|
T338 |
1 |
|
T1 |
1 |
|
T19 |
6 |
| true |
427 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
111 |
1 |
|
T20 |
4 |
|
T61 |
4 |
|
T91 |
6 |
| others[1] |
109 |
1 |
|
T2 |
1 |
|
T20 |
2 |
|
T54 |
1 |
| others[2] |
96 |
1 |
|
T1 |
1 |
|
T20 |
3 |
|
T50 |
2 |
| others[3] |
163 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T20 |
9 |
| false |
54 |
1 |
|
T1 |
1 |
|
T20 |
2 |
|
T61 |
2 |
| true |
14381 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T20 |
9 |
|
T61 |
9 |
|
T101 |
1 |
| others[1] |
244 |
1 |
|
T20 |
7 |
|
T61 |
8 |
|
T91 |
12 |
| others[2] |
219 |
1 |
|
T2 |
1 |
|
T20 |
7 |
|
T61 |
3 |
| others[3] |
405 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T18 |
1 |
| false |
124 |
1 |
|
T1 |
1 |
|
T20 |
5 |
|
T61 |
6 |
| true |
13712 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9104 |
1 |
|
T308 |
1 |
|
T310 |
1 |
|
T333 |
1 |
| others[1] |
1075 |
1 |
|
T14 |
1 |
|
T30 |
1 |
|
T125 |
1 |
| others[2] |
1020 |
1 |
|
T179 |
1 |
|
T129 |
1 |
|
T19 |
7 |
| others[3] |
1783 |
1 |
|
T27 |
1 |
|
T29 |
1 |
|
T186 |
1 |
| false |
580 |
1 |
|
T127 |
1 |
|
T309 |
1 |
|
T2 |
2 |
| true |
1352 |
1 |
|
T3 |
1 |
|
T18 |
1 |
|
T19 |
33 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
219 |
1 |
|
T2 |
1 |
|
T20 |
11 |
|
T51 |
1 |
| others[1] |
200 |
1 |
|
T2 |
1 |
|
T20 |
10 |
|
T53 |
1 |
| others[2] |
217 |
1 |
|
T1 |
2 |
|
T20 |
10 |
|
T61 |
10 |
| others[3] |
404 |
1 |
|
T3 |
1 |
|
T20 |
20 |
|
T54 |
1 |
| false |
150 |
1 |
|
T20 |
5 |
|
T50 |
1 |
|
T61 |
6 |
| true |
13724 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
230 |
1 |
|
T20 |
14 |
|
T50 |
1 |
|
T61 |
13 |
| others[1] |
224 |
1 |
|
T20 |
10 |
|
T76 |
1 |
|
T61 |
12 |
| others[2] |
217 |
1 |
|
T2 |
1 |
|
T20 |
14 |
|
T61 |
9 |
| others[3] |
363 |
1 |
|
T1 |
1 |
|
T20 |
12 |
|
T61 |
13 |
| false |
100 |
1 |
|
T20 |
6 |
|
T40 |
1 |
|
T61 |
2 |
| true |
13780 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9313 |
1 |
|
T308 |
1 |
|
T310 |
1 |
|
T334 |
1 |
| others[1] |
1206 |
1 |
|
T27 |
1 |
|
T29 |
1 |
|
T186 |
1 |
| others[2] |
1273 |
1 |
|
T14 |
1 |
|
T30 |
1 |
|
T179 |
1 |
| others[3] |
2042 |
1 |
|
T127 |
1 |
|
T332 |
1 |
|
T333 |
1 |
| false |
648 |
1 |
|
T311 |
1 |
|
T129 |
1 |
|
T181 |
1 |
| true |
432 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1228 |
1 |
|
T29 |
1 |
|
T127 |
1 |
|
T186 |
1 |
| others[1] |
1297 |
1 |
|
T30 |
1 |
|
T335 |
1 |
|
T1 |
2 |
| others[2] |
1253 |
1 |
|
T14 |
1 |
|
T333 |
1 |
|
T181 |
1 |
| others[3] |
2040 |
1 |
|
T27 |
1 |
|
T308 |
1 |
|
T179 |
1 |
| false |
637 |
1 |
|
T332 |
1 |
|
T240 |
1 |
|
T129 |
1 |
| true |
421 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
110 |
1 |
|
T1 |
2 |
|
T20 |
4 |
|
T61 |
6 |
| others[1] |
114 |
1 |
|
T20 |
4 |
|
T40 |
1 |
|
T61 |
4 |
| others[2] |
92 |
1 |
|
T20 |
2 |
|
T61 |
7 |
|
T91 |
6 |
| others[3] |
160 |
1 |
|
T1 |
1 |
|
T2 |
2 |
|
T20 |
3 |
| false |
53 |
1 |
|
T20 |
3 |
|
T50 |
1 |
|
T61 |
1 |
| true |
6347 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
250 |
1 |
|
T20 |
11 |
|
T50 |
1 |
|
T61 |
8 |
| others[1] |
241 |
1 |
|
T20 |
3 |
|
T50 |
1 |
|
T61 |
8 |
| others[2] |
226 |
1 |
|
T1 |
1 |
|
T18 |
1 |
|
T20 |
13 |
| others[3] |
377 |
1 |
|
T1 |
1 |
|
T20 |
22 |
|
T40 |
1 |
| false |
125 |
1 |
|
T20 |
4 |
|
T61 |
2 |
|
T91 |
5 |
| true |
5657 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1033 |
1 |
|
T27 |
1 |
|
T311 |
1 |
|
T333 |
1 |
| others[1] |
1075 |
1 |
|
T186 |
1 |
|
T332 |
1 |
|
T180 |
1 |
| others[2] |
1054 |
1 |
|
T309 |
1 |
|
T179 |
1 |
|
T124 |
1 |
| others[3] |
1700 |
1 |
|
T29 |
1 |
|
T30 |
1 |
|
T310 |
1 |
| false |
595 |
1 |
|
T14 |
1 |
|
T127 |
1 |
|
T308 |
1 |
| true |
1419 |
1 |
|
T3 |
1 |
|
T18 |
1 |
|
T19 |
32 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
243 |
1 |
|
T1 |
1 |
|
T20 |
11 |
|
T50 |
1 |
| others[1] |
236 |
1 |
|
T20 |
9 |
|
T61 |
16 |
|
T91 |
11 |
| others[2] |
231 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T20 |
20 |
| others[3] |
386 |
1 |
|
T20 |
16 |
|
T61 |
11 |
|
T46 |
1 |
| false |
98 |
1 |
|
T2 |
1 |
|
T20 |
6 |
|
T61 |
1 |
| true |
5682 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
205 |
1 |
|
T20 |
10 |
|
T61 |
9 |
|
T91 |
6 |
| others[1] |
202 |
1 |
|
T18 |
1 |
|
T20 |
5 |
|
T61 |
10 |
| others[2] |
218 |
1 |
|
T20 |
12 |
|
T51 |
1 |
|
T54 |
1 |
| others[3] |
374 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T20 |
16 |
| false |
128 |
1 |
|
T20 |
5 |
|
T61 |
8 |
|
T91 |
3 |
| true |
5749 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1249 |
1 |
|
T127 |
1 |
|
T332 |
1 |
|
T333 |
1 |
| others[1] |
1225 |
1 |
|
T14 |
1 |
|
T30 |
1 |
|
T186 |
1 |
| others[2] |
1336 |
1 |
|
T309 |
1 |
|
T336 |
1 |
|
T1 |
1 |
| others[3] |
1993 |
1 |
|
T29 |
1 |
|
T179 |
1 |
|
T122 |
1 |
| false |
640 |
1 |
|
T27 |
1 |
|
T124 |
1 |
|
T334 |
1 |
| true |
433 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1215 |
1 |
|
T29 |
1 |
|
T332 |
1 |
|
T335 |
1 |
| others[1] |
1269 |
1 |
|
T308 |
1 |
|
T310 |
1 |
|
T311 |
1 |
| others[2] |
1227 |
1 |
|
T27 |
1 |
|
T309 |
1 |
|
T333 |
1 |
| others[3] |
2093 |
1 |
|
T14 |
1 |
|
T30 |
1 |
|
T127 |
1 |
| false |
656 |
1 |
|
T122 |
1 |
|
T129 |
1 |
|
T19 |
7 |
| true |
416 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
122 |
1 |
|
T1 |
1 |
|
T20 |
4 |
|
T50 |
1 |
| others[1] |
103 |
1 |
|
T1 |
2 |
|
T20 |
7 |
|
T61 |
3 |
| others[2] |
92 |
1 |
|
T2 |
1 |
|
T20 |
4 |
|
T54 |
1 |
| others[3] |
191 |
1 |
|
T20 |
6 |
|
T61 |
7 |
|
T91 |
13 |
| false |
57 |
1 |
|
T2 |
1 |
|
T20 |
2 |
|
T50 |
1 |
| true |
6311 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
228 |
1 |
|
T20 |
10 |
|
T61 |
13 |
|
T57 |
1 |
| others[1] |
220 |
1 |
|
T1 |
1 |
|
T20 |
8 |
|
T51 |
1 |
| others[2] |
233 |
1 |
|
T1 |
1 |
|
T20 |
12 |
|
T76 |
1 |
| others[3] |
372 |
1 |
|
T2 |
1 |
|
T20 |
20 |
|
T53 |
1 |
| false |
126 |
1 |
|
T20 |
3 |
|
T61 |
8 |
|
T91 |
5 |
| true |
5697 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1085 |
1 |
|
T29 |
1 |
|
T127 |
1 |
|
T129 |
1 |
| others[1] |
1016 |
1 |
|
T30 |
1 |
|
T186 |
1 |
|
T335 |
1 |
| others[2] |
1063 |
1 |
|
T308 |
1 |
|
T309 |
1 |
|
T310 |
1 |
| others[3] |
1749 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T332 |
1 |
| false |
608 |
1 |
|
T338 |
1 |
|
T130 |
1 |
|
T339 |
1 |
| true |
1355 |
1 |
|
T10 |
1 |
|
T19 |
28 |
|
T12 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
250 |
1 |
|
T20 |
6 |
|
T61 |
12 |
|
T91 |
9 |
| others[1] |
227 |
1 |
|
T1 |
1 |
|
T20 |
13 |
|
T61 |
6 |
| others[2] |
223 |
1 |
|
T20 |
10 |
|
T76 |
1 |
|
T40 |
1 |
| others[3] |
382 |
1 |
|
T2 |
1 |
|
T20 |
14 |
|
T51 |
1 |
| false |
117 |
1 |
|
T20 |
11 |
|
T61 |
6 |
|
T101 |
1 |
| true |
5677 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
208 |
1 |
|
T20 |
6 |
|
T61 |
13 |
|
T91 |
4 |
| others[1] |
218 |
1 |
|
T2 |
1 |
|
T20 |
9 |
|
T50 |
1 |
| others[2] |
238 |
1 |
|
T20 |
10 |
|
T50 |
1 |
|
T40 |
1 |
| others[3] |
375 |
1 |
|
T20 |
20 |
|
T51 |
1 |
|
T54 |
1 |
| false |
105 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T20 |
4 |
| true |
5732 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1227 |
1 |
|
T179 |
1 |
|
T333 |
1 |
|
T240 |
1 |
| others[1] |
1249 |
1 |
|
T14 |
1 |
|
T335 |
1 |
|
T19 |
11 |
| others[2] |
1200 |
1 |
|
T27 |
1 |
|
T127 |
1 |
|
T186 |
1 |
| others[3] |
2098 |
1 |
|
T29 |
1 |
|
T30 |
1 |
|
T309 |
1 |
| false |
655 |
1 |
|
T180 |
1 |
|
T19 |
8 |
|
T20 |
17 |
| true |
447 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1243 |
1 |
|
T127 |
1 |
|
T334 |
1 |
|
T129 |
1 |
| others[1] |
1261 |
1 |
|
T332 |
1 |
|
T179 |
1 |
|
T240 |
1 |
| others[2] |
1273 |
1 |
|
T14 |
1 |
|
T308 |
1 |
|
T310 |
1 |
| others[3] |
2045 |
1 |
|
T29 |
1 |
|
T30 |
1 |
|
T186 |
1 |
| false |
639 |
1 |
|
T27 |
1 |
|
T19 |
6 |
|
T20 |
14 |
| true |
415 |
1 |
|
T3 |
1 |
|
T5 |
1 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
98 |
1 |
|
T20 |
3 |
|
T50 |
1 |
|
T61 |
2 |
| others[1] |
110 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T20 |
2 |
| others[2] |
96 |
1 |
|
T20 |
4 |
|
T40 |
1 |
|
T61 |
5 |
| others[3] |
168 |
1 |
|
T1 |
2 |
|
T20 |
6 |
|
T61 |
7 |
| false |
61 |
1 |
|
T2 |
1 |
|
T20 |
2 |
|
T50 |
1 |
| true |
6343 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
239 |
1 |
|
T1 |
1 |
|
T20 |
11 |
|
T54 |
1 |
| others[1] |
239 |
1 |
|
T5 |
1 |
|
T20 |
11 |
|
T61 |
13 |
| others[2] |
232 |
1 |
|
T1 |
1 |
|
T20 |
8 |
|
T50 |
2 |
| others[3] |
401 |
1 |
|
T2 |
1 |
|
T18 |
1 |
|
T20 |
11 |
| false |
144 |
1 |
|
T1 |
1 |
|
T20 |
6 |
|
T61 |
6 |
| true |
5621 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1100 |
1 |
|
T30 |
1 |
|
T127 |
1 |
|
T308 |
1 |
| others[1] |
1038 |
1 |
|
T332 |
1 |
|
T125 |
1 |
|
T334 |
1 |
| others[2] |
1050 |
1 |
|
T27 |
1 |
|
T310 |
1 |
|
T311 |
1 |
| others[3] |
1748 |
1 |
|
T29 |
1 |
|
T309 |
1 |
|
T333 |
1 |
| false |
504 |
1 |
|
T14 |
1 |
|
T186 |
1 |
|
T19 |
2 |
| true |
1436 |
1 |
|
T3 |
1 |
|
T18 |
1 |
|
T19 |
33 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
261 |
1 |
|
T20 |
11 |
|
T53 |
1 |
|
T61 |
12 |
| others[1] |
221 |
1 |
|
T20 |
9 |
|
T61 |
12 |
|
T91 |
6 |
| others[2] |
237 |
1 |
|
T2 |
1 |
|
T20 |
7 |
|
T56 |
1 |
| others[3] |
357 |
1 |
|
T3 |
1 |
|
T20 |
18 |
|
T61 |
13 |
| false |
133 |
1 |
|
T20 |
7 |
|
T61 |
3 |
|
T91 |
10 |
| true |
5667 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
241 |
1 |
|
T1 |
1 |
|
T20 |
8 |
|
T76 |
1 |
| others[1] |
219 |
1 |
|
T20 |
9 |
|
T51 |
1 |
|
T61 |
7 |
| others[2] |
221 |
1 |
|
T2 |
1 |
|
T20 |
3 |
|
T61 |
14 |
| others[3] |
355 |
1 |
|
T20 |
20 |
|
T50 |
1 |
|
T61 |
9 |
| false |
125 |
1 |
|
T20 |
7 |
|
T40 |
1 |
|
T61 |
4 |
| true |
5715 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1259 |
1 |
|
T27 |
1 |
|
T127 |
1 |
|
T308 |
1 |
| others[1] |
1220 |
1 |
|
T124 |
1 |
|
T125 |
1 |
|
T334 |
1 |
| others[2] |
1218 |
1 |
|
T14 |
1 |
|
T310 |
1 |
|
T179 |
1 |
| others[3] |
2137 |
1 |
|
T29 |
1 |
|
T30 |
1 |
|
T186 |
1 |
| false |
612 |
1 |
|
T309 |
1 |
|
T180 |
1 |
|
T19 |
3 |
| true |
430 |
1 |
|
T3 |
1 |
|
T5 |
1 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1207 |
1 |
|
T30 |
1 |
|
T308 |
1 |
|
T122 |
1 |
| others[1] |
1208 |
1 |
|
T309 |
1 |
|
T332 |
1 |
|
T310 |
1 |
| others[2] |
1265 |
1 |
|
T27 |
1 |
|
T311 |
1 |
|
T333 |
1 |
| others[3] |
2105 |
1 |
|
T14 |
1 |
|
T127 |
1 |
|
T186 |
1 |
| false |
672 |
1 |
|
T29 |
1 |
|
T336 |
1 |
|
T19 |
9 |
| true |
419 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |