Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
83 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T20 |
3 |
| others[1] |
111 |
1 |
|
T2 |
1 |
|
T20 |
5 |
|
T61 |
3 |
| others[2] |
115 |
1 |
|
T1 |
1 |
|
T20 |
3 |
|
T50 |
1 |
| others[3] |
178 |
1 |
|
T20 |
7 |
|
T50 |
1 |
|
T40 |
1 |
| false |
60 |
1 |
|
T1 |
1 |
|
T20 |
2 |
|
T61 |
6 |
| true |
6329 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T1 |
1 |
|
T20 |
3 |
|
T50 |
1 |
| others[1] |
230 |
1 |
|
T2 |
1 |
|
T18 |
1 |
|
T20 |
11 |
| others[2] |
244 |
1 |
|
T20 |
10 |
|
T61 |
15 |
|
T91 |
12 |
| others[3] |
358 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T20 |
13 |
| false |
133 |
1 |
|
T20 |
2 |
|
T40 |
1 |
|
T61 |
7 |
| true |
5694 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1043 |
1 |
|
T30 |
1 |
|
T2 |
1 |
|
T19 |
10 |
| others[1] |
1089 |
1 |
|
T29 |
1 |
|
T309 |
1 |
|
T311 |
1 |
| others[2] |
1054 |
1 |
|
T127 |
1 |
|
T308 |
1 |
|
T179 |
1 |
| others[3] |
1723 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T186 |
1 |
| false |
575 |
1 |
|
T332 |
1 |
|
T180 |
1 |
|
T129 |
1 |
| true |
1392 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
219 |
1 |
|
T20 |
15 |
|
T61 |
13 |
|
T91 |
15 |
| others[1] |
234 |
1 |
|
T20 |
11 |
|
T50 |
1 |
|
T76 |
1 |
| others[2] |
236 |
1 |
|
T2 |
1 |
|
T20 |
16 |
|
T61 |
9 |
| others[3] |
393 |
1 |
|
T3 |
1 |
|
T20 |
18 |
|
T51 |
1 |
| false |
122 |
1 |
|
T20 |
1 |
|
T61 |
7 |
|
T46 |
1 |
| true |
5672 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
237 |
1 |
|
T20 |
5 |
|
T50 |
1 |
|
T61 |
13 |
| others[1] |
212 |
1 |
|
T3 |
1 |
|
T20 |
13 |
|
T76 |
1 |
| others[2] |
209 |
1 |
|
T20 |
7 |
|
T61 |
9 |
|
T91 |
10 |
| others[3] |
359 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T20 |
23 |
| false |
112 |
1 |
|
T20 |
7 |
|
T91 |
6 |
|
T226 |
1 |
| true |
5747 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1214 |
1 |
|
T311 |
1 |
|
T179 |
1 |
|
T240 |
1 |
| others[1] |
1265 |
1 |
|
T30 |
1 |
|
T337 |
1 |
|
T335 |
1 |
| others[2] |
1261 |
1 |
|
T27 |
1 |
|
T186 |
1 |
|
T181 |
1 |
| others[3] |
2072 |
1 |
|
T29 |
1 |
|
T127 |
1 |
|
T332 |
1 |
| false |
634 |
1 |
|
T14 |
1 |
|
T308 |
1 |
|
T309 |
1 |
| true |
430 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1186 |
1 |
|
T27 |
1 |
|
T127 |
1 |
|
T332 |
1 |
| others[1] |
1213 |
1 |
|
T14 |
1 |
|
T29 |
1 |
|
T311 |
1 |
| others[2] |
1238 |
1 |
|
T186 |
1 |
|
T309 |
1 |
|
T310 |
1 |
| others[3] |
2160 |
1 |
|
T30 |
1 |
|
T125 |
1 |
|
T337 |
1 |
| false |
665 |
1 |
|
T308 |
1 |
|
T129 |
1 |
|
T19 |
6 |
| true |
414 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
121 |
1 |
|
T20 |
6 |
|
T50 |
1 |
|
T40 |
1 |
| others[1] |
96 |
1 |
|
T2 |
2 |
|
T20 |
6 |
|
T61 |
3 |
| others[2] |
99 |
1 |
|
T20 |
1 |
|
T50 |
1 |
|
T61 |
6 |
| others[3] |
174 |
1 |
|
T1 |
2 |
|
T20 |
6 |
|
T61 |
9 |
| false |
51 |
1 |
|
T1 |
1 |
|
T61 |
3 |
|
T91 |
2 |
| true |
6335 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
232 |
1 |
|
T18 |
1 |
|
T20 |
9 |
|
T50 |
1 |
| others[1] |
205 |
1 |
|
T20 |
7 |
|
T61 |
10 |
|
T91 |
7 |
| others[2] |
237 |
1 |
|
T20 |
12 |
|
T76 |
1 |
|
T61 |
9 |
| others[3] |
409 |
1 |
|
T1 |
2 |
|
T20 |
18 |
|
T54 |
1 |
| false |
119 |
1 |
|
T20 |
6 |
|
T40 |
1 |
|
T61 |
3 |
| true |
5674 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1063 |
1 |
|
T310 |
1 |
|
T124 |
1 |
|
T339 |
1 |
| others[1] |
1019 |
1 |
|
T27 |
1 |
|
T308 |
1 |
|
T332 |
1 |
| others[2] |
1097 |
1 |
|
T14 |
1 |
|
T29 |
1 |
|
T309 |
1 |
| others[3] |
1741 |
1 |
|
T30 |
1 |
|
T127 |
1 |
|
T186 |
1 |
| false |
522 |
1 |
|
T311 |
1 |
|
T129 |
1 |
|
T19 |
3 |
| true |
1434 |
1 |
|
T10 |
1 |
|
T5 |
1 |
|
T19 |
43 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
223 |
1 |
|
T1 |
1 |
|
T20 |
18 |
|
T61 |
8 |
| others[1] |
245 |
1 |
|
T1 |
1 |
|
T20 |
9 |
|
T50 |
1 |
| others[2] |
246 |
1 |
|
T18 |
1 |
|
T20 |
9 |
|
T61 |
9 |
| others[3] |
384 |
1 |
|
T2 |
1 |
|
T20 |
20 |
|
T76 |
1 |
| false |
116 |
1 |
|
T20 |
6 |
|
T61 |
3 |
|
T91 |
3 |
| true |
5662 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
237 |
1 |
|
T20 |
12 |
|
T54 |
1 |
|
T61 |
5 |
| others[1] |
210 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T20 |
9 |
| others[2] |
210 |
1 |
|
T18 |
1 |
|
T20 |
10 |
|
T61 |
12 |
| others[3] |
390 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T20 |
13 |
| false |
122 |
1 |
|
T20 |
4 |
|
T61 |
2 |
|
T91 |
5 |
| true |
5707 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1227 |
1 |
|
T29 |
1 |
|
T308 |
1 |
|
T311 |
1 |
| others[1] |
1277 |
1 |
|
T27 |
1 |
|
T309 |
1 |
|
T334 |
1 |
| others[2] |
1274 |
1 |
|
T125 |
1 |
|
T339 |
1 |
|
T2 |
1 |
| others[3] |
2050 |
1 |
|
T14 |
1 |
|
T127 |
1 |
|
T186 |
1 |
| false |
620 |
1 |
|
T30 |
1 |
|
T310 |
1 |
|
T341 |
1 |
| true |
428 |
1 |
|
T10 |
1 |
|
T5 |
1 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1233 |
1 |
|
T310 |
1 |
|
T125 |
1 |
|
T337 |
1 |
| others[1] |
1263 |
1 |
|
T30 |
1 |
|
T309 |
1 |
|
T311 |
1 |
| others[2] |
1229 |
1 |
|
T14 |
1 |
|
T127 |
1 |
|
T180 |
1 |
| others[3] |
2106 |
1 |
|
T29 |
1 |
|
T186 |
1 |
|
T308 |
1 |
| false |
631 |
1 |
|
T27 |
1 |
|
T240 |
1 |
|
T341 |
1 |
| true |
414 |
1 |
|
T3 |
1 |
|
T5 |
1 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
101 |
1 |
|
T20 |
4 |
|
T61 |
6 |
|
T91 |
1 |
| others[1] |
119 |
1 |
|
T1 |
2 |
|
T2 |
1 |
|
T20 |
5 |
| others[2] |
96 |
1 |
|
T20 |
3 |
|
T50 |
1 |
|
T61 |
1 |
| others[3] |
165 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T18 |
1 |
| false |
54 |
1 |
|
T1 |
1 |
|
T20 |
2 |
|
T61 |
3 |
| true |
6341 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
241 |
1 |
|
T20 |
11 |
|
T40 |
1 |
|
T61 |
12 |
| others[1] |
234 |
1 |
|
T1 |
1 |
|
T20 |
12 |
|
T61 |
9 |
| others[2] |
240 |
1 |
|
T5 |
1 |
|
T20 |
11 |
|
T61 |
13 |
| others[3] |
408 |
1 |
|
T20 |
16 |
|
T54 |
1 |
|
T56 |
1 |
| false |
102 |
1 |
|
T20 |
4 |
|
T53 |
1 |
|
T61 |
4 |
| true |
5651 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1060 |
1 |
|
T14 |
1 |
|
T129 |
1 |
|
T1 |
1 |
| others[1] |
1081 |
1 |
|
T29 |
1 |
|
T127 |
1 |
|
T179 |
1 |
| others[2] |
1053 |
1 |
|
T308 |
1 |
|
T180 |
1 |
|
T124 |
1 |
| others[3] |
1774 |
1 |
|
T27 |
1 |
|
T30 |
1 |
|
T186 |
1 |
| false |
538 |
1 |
|
T309 |
1 |
|
T240 |
1 |
|
T336 |
1 |
| true |
1370 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T19 |
31 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
222 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T20 |
5 |
| others[1] |
210 |
1 |
|
T2 |
1 |
|
T20 |
11 |
|
T61 |
6 |
| others[2] |
232 |
1 |
|
T20 |
10 |
|
T54 |
1 |
|
T61 |
13 |
| others[3] |
420 |
1 |
|
T1 |
1 |
|
T18 |
1 |
|
T20 |
19 |
| false |
114 |
1 |
|
T1 |
1 |
|
T20 |
8 |
|
T61 |
5 |
| true |
5678 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
214 |
1 |
|
T20 |
10 |
|
T51 |
1 |
|
T61 |
17 |
| others[1] |
221 |
1 |
|
T20 |
10 |
|
T61 |
11 |
|
T101 |
1 |
| others[2] |
240 |
1 |
|
T20 |
10 |
|
T50 |
1 |
|
T54 |
1 |
| others[3] |
373 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
| false |
103 |
1 |
|
T20 |
6 |
|
T61 |
4 |
|
T91 |
2 |
| true |
5725 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1263 |
1 |
|
T310 |
1 |
|
T333 |
1 |
|
T124 |
1 |
| others[1] |
1225 |
1 |
|
T14 |
1 |
|
T29 |
1 |
|
T127 |
1 |
| others[2] |
1183 |
1 |
|
T308 |
1 |
|
T311 |
1 |
|
T240 |
1 |
| others[3] |
2085 |
1 |
|
T27 |
1 |
|
T30 |
1 |
|
T186 |
1 |
| false |
676 |
1 |
|
T179 |
1 |
|
T180 |
1 |
|
T129 |
1 |
| true |
444 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1262 |
1 |
|
T27 |
1 |
|
T179 |
1 |
|
T334 |
1 |
| others[1] |
1267 |
1 |
|
T30 |
1 |
|
T127 |
1 |
|
T332 |
1 |
| others[2] |
1224 |
1 |
|
T14 |
1 |
|
T308 |
1 |
|
T124 |
1 |
| others[3] |
2070 |
1 |
|
T186 |
1 |
|
T309 |
1 |
|
T310 |
1 |
| false |
628 |
1 |
|
T29 |
1 |
|
T341 |
1 |
|
T19 |
6 |
| true |
425 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
94 |
1 |
|
T1 |
1 |
|
T20 |
4 |
|
T61 |
2 |
| others[1] |
107 |
1 |
|
T1 |
1 |
|
T20 |
1 |
|
T76 |
1 |
| others[2] |
103 |
1 |
|
T2 |
2 |
|
T20 |
5 |
|
T61 |
2 |
| others[3] |
199 |
1 |
|
T1 |
1 |
|
T20 |
7 |
|
T50 |
2 |
| false |
46 |
1 |
|
T20 |
2 |
|
T61 |
3 |
|
T91 |
1 |
| true |
6327 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T3 |
1 |
|
T20 |
10 |
|
T53 |
1 |
| others[1] |
246 |
1 |
|
T20 |
10 |
|
T50 |
1 |
|
T51 |
1 |
| others[2] |
251 |
1 |
|
T2 |
1 |
|
T18 |
1 |
|
T20 |
9 |
| others[3] |
377 |
1 |
|
T1 |
1 |
|
T20 |
20 |
|
T76 |
1 |
| false |
115 |
1 |
|
T20 |
4 |
|
T61 |
5 |
|
T91 |
4 |
| true |
5658 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1082 |
1 |
|
T30 |
1 |
|
T186 |
1 |
|
T308 |
1 |
| others[1] |
1051 |
1 |
|
T122 |
1 |
|
T124 |
1 |
|
T129 |
1 |
| others[2] |
1035 |
1 |
|
T27 |
1 |
|
T341 |
1 |
|
T1 |
1 |
| others[3] |
1803 |
1 |
|
T14 |
1 |
|
T127 |
1 |
|
T309 |
1 |
| false |
560 |
1 |
|
T29 |
1 |
|
T180 |
1 |
|
T335 |
1 |
| true |
1345 |
1 |
|
T19 |
29 |
|
T12 |
1 |
|
T51 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
238 |
1 |
|
T20 |
10 |
|
T61 |
9 |
|
T91 |
6 |
| others[1] |
238 |
1 |
|
T20 |
12 |
|
T53 |
1 |
|
T61 |
9 |
| others[2] |
247 |
1 |
|
T1 |
1 |
|
T20 |
10 |
|
T61 |
12 |
| others[3] |
383 |
1 |
|
T2 |
2 |
|
T20 |
14 |
|
T50 |
1 |
| false |
123 |
1 |
|
T20 |
4 |
|
T50 |
1 |
|
T51 |
1 |
| true |
5647 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
224 |
1 |
|
T2 |
1 |
|
T20 |
7 |
|
T40 |
1 |
| others[1] |
214 |
1 |
|
T20 |
9 |
|
T61 |
8 |
|
T91 |
14 |
| others[2] |
220 |
1 |
|
T1 |
1 |
|
T20 |
10 |
|
T54 |
1 |
| others[3] |
392 |
1 |
|
T1 |
1 |
|
T18 |
1 |
|
T20 |
15 |
| false |
99 |
1 |
|
T20 |
9 |
|
T61 |
3 |
|
T91 |
2 |
| true |
5727 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1285 |
1 |
|
T30 |
1 |
|
T127 |
1 |
|
T19 |
14 |
| others[1] |
1267 |
1 |
|
T27 |
1 |
|
T332 |
1 |
|
T310 |
1 |
| others[2] |
1260 |
1 |
|
T14 |
1 |
|
T338 |
1 |
|
T130 |
1 |
| others[3] |
2003 |
1 |
|
T29 |
1 |
|
T186 |
1 |
|
T309 |
1 |
| false |
623 |
1 |
|
T308 |
1 |
|
T311 |
1 |
|
T180 |
1 |
| true |
438 |
1 |
|
T10 |
1 |
|
T5 |
1 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1276 |
1 |
|
T30 |
1 |
|
T127 |
1 |
|
T124 |
1 |
| others[1] |
1267 |
1 |
|
T27 |
1 |
|
T186 |
1 |
|
T308 |
1 |
| others[2] |
1257 |
1 |
|
T14 |
1 |
|
T29 |
1 |
|
T333 |
1 |
| others[3] |
2012 |
1 |
|
T332 |
1 |
|
T310 |
1 |
|
T240 |
1 |
| false |
654 |
1 |
|
T311 |
1 |
|
T180 |
1 |
|
T129 |
1 |
| true |
410 |
1 |
|
T3 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
89 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T20 |
3 |
| others[1] |
104 |
1 |
|
T2 |
1 |
|
T20 |
7 |
|
T61 |
6 |
| others[2] |
100 |
1 |
|
T1 |
1 |
|
T20 |
6 |
|
T50 |
1 |
| others[3] |
163 |
1 |
|
T1 |
1 |
|
T20 |
10 |
|
T40 |
1 |
| false |
46 |
1 |
|
T20 |
2 |
|
T50 |
1 |
|
T61 |
2 |
| true |
6374 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T5 |
1 |
|
T20 |
15 |
|
T61 |
7 |
| others[1] |
238 |
1 |
|
T20 |
4 |
|
T61 |
7 |
|
T57 |
1 |
| others[2] |
243 |
1 |
|
T18 |
1 |
|
T20 |
5 |
|
T61 |
15 |
| others[3] |
408 |
1 |
|
T1 |
1 |
|
T20 |
20 |
|
T50 |
1 |
| false |
129 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T20 |
2 |
| true |
5642 |
1 |
|
T14 |
1 |
|
T27 |
1 |
|
T29 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1075 |
1 |
|
T30 |
1 |
|
T309 |
1 |
|
T311 |
1 |
| others[1] |
1088 |
1 |
|
T29 |
1 |
|
T308 |
1 |
|
T335 |
1 |
| others[2] |
1057 |
1 |
|
T14 |
1 |
|
T127 |
1 |
|
T179 |
1 |
| others[3] |
1714 |
1 |
|
T27 |
1 |
|
T186 |
1 |
|
T332 |
1 |
| false |
530 |
1 |
|
T1 |
1 |
|
T20 |
9 |
|
T12 |
1 |
| true |
1412 |
1 |
|
T10 |
1 |
|
T19 |
35 |
|
T52 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |