Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_flash_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	22505642	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	7568196	1		T14	58		T23	1		T24	2368

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	25719048	1		T14	77		T23	12		T24	1217
values[0x0]	2177082	1		T14	32		T24	564		T27	35
values[0x1]	2177708	1		T14	33		T24	606		T27	30

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15055949	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	15017889	1		T14	92		T23	7		T24	2373

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	99758	1		T24	11		T27	4		T25	4
valid_sources[0x01]	83819	1		T24	17		T25	10		T26	11
valid_sources[0x02]	100488	1		T24	10		T25	4		T26	22
valid_sources[0x03]	134260	1		T24	17		T27	1		T25	7
valid_sources[0x04]	82685	1		T24	3		T25	8		T26	18
valid_sources[0x05]	79214	1		T24	4		T25	6		T26	21
valid_sources[0x06]	90970	1		T24	11		T25	4		T26	3
valid_sources[0x07]	81289	1		T23	1		T24	5		T25	3
valid_sources[0x08]	79338	1		T24	5		T29	32		T25	7
valid_sources[0x09]	79838	1		T24	14		T27	3		T29	6
valid_sources[0x0a]	78682	1		T14	1		T24	6		T25	2
valid_sources[0x0b]	79480	1		T25	6		T26	9		T126	25
valid_sources[0x0c]	114372	1		T24	11		T29	11		T25	1
valid_sources[0x0d]	78513	1		T24	11		T25	7		T26	2
valid_sources[0x0e]	136074	1		T24	5		T25	3		T26	15
valid_sources[0x0f]	89159	1		T24	6		T25	3		T26	2
valid_sources[0x10]	81140	1		T24	11		T25	8		T26	3
valid_sources[0x11]	237014	1		T24	5		T25	9		T26	6
valid_sources[0x12]	77837	1		T24	5		T25	5		T126	27
valid_sources[0x13]	99408	1		T24	6		T29	7		T25	3
valid_sources[0x14]	78512	1		T24	7		T25	1		T26	26
valid_sources[0x15]	80083	1		T24	11		T29	6		T25	3
valid_sources[0x16]	171336	1		T24	13		T30	1		T26	9
valid_sources[0x17]	78705	1		T24	9		T29	12		T25	3
valid_sources[0x18]	110784	1		T14	2		T24	3		T25	6
valid_sources[0x19]	133533	1		T24	13		T25	7		T26	1
valid_sources[0x1a]	78203	1		T24	9		T29	7		T25	4
valid_sources[0x1b]	116561	1		T24	6		T25	5		T30	4
valid_sources[0x1c]	77530	1		T24	4		T29	2		T25	2
valid_sources[0x1d]	78918	1		T24	11		T27	2		T29	4
valid_sources[0x1e]	79128	1		T24	4		T25	6		T26	19
valid_sources[0x1f]	78239	1		T24	7		T25	8		T26	31
valid_sources[0x20]	79202	1		T24	17		T25	4		T26	13
valid_sources[0x21]	93438	1		T24	10		T25	4		T26	4
valid_sources[0x22]	78135	1		T24	9		T25	7		T26	2
valid_sources[0x23]	78763	1		T24	11		T25	7		T26	1
valid_sources[0x24]	108663	1		T23	2		T24	13		T25	2
valid_sources[0x25]	152617	1		T24	12		T25	5		T26	13
valid_sources[0x26]	84420	1		T24	6		T25	2		T126	34
valid_sources[0x27]	258427	1		T24	8		T29	6		T25	3
valid_sources[0x28]	81652	1		T24	9		T25	7		T126	35
valid_sources[0x29]	118804	1		T24	17		T27	3		T25	9
valid_sources[0x2a]	111442	1		T24	19		T25	5		T26	12
valid_sources[0x2b]	389211	1		T24	10		T25	4		T26	1
valid_sources[0x2c]	76724	1		T24	4		T25	8		T26	11
valid_sources[0x2d]	78635	1		T24	11		T25	6		T26	14
valid_sources[0x2e]	123760	1		T24	9		T25	6		T26	1
valid_sources[0x2f]	79422	1		T24	10		T27	4		T25	7
valid_sources[0x30]	77115	1		T24	3		T29	4		T25	4
valid_sources[0x31]	96362	1		T24	6		T25	3		T26	1
valid_sources[0x32]	94175	1		T14	1		T24	7		T27	1
valid_sources[0x33]	80283	1		T24	8		T27	3		T29	5
valid_sources[0x34]	79248	1		T24	9		T27	1		T25	6
valid_sources[0x35]	80211	1		T24	4		T29	6		T25	4
valid_sources[0x36]	256022	1		T24	9		T25	1		T126	30
valid_sources[0x37]	78861	1		T24	29		T27	1		T29	11
valid_sources[0x38]	79993	1		T24	8		T25	1		T26	17
valid_sources[0x39]	414130	1		T24	15		T29	1		T25	4
valid_sources[0x3a]	81837	1		T24	3		T29	8		T25	6
valid_sources[0x3b]	94799	1		T24	4		T25	2		T30	2
valid_sources[0x3c]	100899	1		T14	2		T24	12		T25	2
valid_sources[0x3d]	78692	1		T24	20		T25	3		T26	31
valid_sources[0x3e]	236862	1		T24	5		T27	1		T25	1
valid_sources[0x3f]	79523	1		T24	13		T25	7		T26	2
valid_sources[0x40]	109021	1		T24	6		T27	4		T29	9
valid_sources[0x41]	83108	1		T24	17		T25	4		T26	1
valid_sources[0x42]	78465	1		T24	13		T25	11		T26	27
valid_sources[0x43]	123965	1		T24	4		T25	12		T26	26
valid_sources[0x44]	78295	1		T24	8		T29	4		T25	2
valid_sources[0x45]	79620	1		T14	1		T23	1		T24	7
valid_sources[0x46]	105151	1		T24	14		T29	9		T25	1
valid_sources[0x47]	239658	1		T24	6		T29	12		T25	11
valid_sources[0x48]	134862	1		T24	9		T25	1		T126	22
valid_sources[0x49]	90073	1		T14	3		T24	11		T27	1
valid_sources[0x4a]	97246	1		T24	5		T25	2		T26	9
valid_sources[0x4b]	240782	1		T24	14		T25	6		T26	3
valid_sources[0x4c]	79064	1		T24	11		T25	5		T26	3
valid_sources[0x4d]	232045	1		T24	13		T25	4		T30	2
valid_sources[0x4e]	79183	1		T24	13		T25	10		T30	4
valid_sources[0x4f]	78291	1		T24	9		T27	1		T25	2
valid_sources[0x50]	91171	1		T24	6		T25	6		T26	29
valid_sources[0x51]	78887	1		T24	9		T29	13		T25	5
valid_sources[0x52]	211320	1		T24	7		T25	4		T26	3
valid_sources[0x53]	355190	1		T24	8		T25	11		T26	15
valid_sources[0x54]	121629	1		T24	12		T25	3		T26	2
valid_sources[0x55]	207013	1		T14	4		T24	7		T27	5
valid_sources[0x56]	77901	1		T14	13		T24	9		T27	5
valid_sources[0x57]	262717	1		T24	3		T30	1		T26	9
valid_sources[0x58]	78480	1		T24	9		T27	3		T25	6
valid_sources[0x59]	129981	1		T24	2		T29	2		T25	5
valid_sources[0x5a]	79393	1		T24	6		T25	6		T30	5
valid_sources[0x5b]	250660	1		T24	5		T25	7		T26	1
valid_sources[0x5c]	79001	1		T24	8		T27	1		T29	8
valid_sources[0x5d]	77967	1		T14	1		T24	2		T25	6
valid_sources[0x5e]	81536	1		T24	18		T25	5		T26	4
valid_sources[0x5f]	78697	1		T24	8		T29	3		T25	4
valid_sources[0x60]	79090	1		T24	13		T27	2		T25	6
valid_sources[0x61]	117821	1		T24	7		T27	3		T29	4
valid_sources[0x62]	79558	1		T24	9		T25	7		T26	8
valid_sources[0x63]	77909	1		T24	10		T25	2		T26	1
valid_sources[0x64]	78522	1		T14	7		T24	13		T25	9
valid_sources[0x65]	78520	1		T24	5		T25	5		T26	10
valid_sources[0x66]	77446	1		T24	8		T25	4		T26	9
valid_sources[0x67]	82541	1		T24	10		T29	11		T25	1
valid_sources[0x68]	82089	1		T24	7		T25	12		T26	2
valid_sources[0x69]	78925	1		T24	6		T25	1		T26	12
valid_sources[0x6a]	77379	1		T24	4		T29	14		T25	4
valid_sources[0x6b]	77865	1		T23	1		T24	3		T30	2
valid_sources[0x6c]	77452	1		T24	14		T27	2		T29	105
valid_sources[0x6d]	78249	1		T24	2		T29	4		T25	3
valid_sources[0x6e]	78738	1		T24	9		T25	7		T26	3
valid_sources[0x6f]	119084	1		T24	15		T25	15		T126	45
valid_sources[0x70]	79167	1		T24	12		T27	4		T25	5
valid_sources[0x71]	77475	1		T24	2		T27	2		T29	1
valid_sources[0x72]	79510	1		T24	6		T29	10		T25	1
valid_sources[0x73]	79223	1		T14	2		T24	13		T25	2
valid_sources[0x74]	79052	1		T24	7		T29	1		T25	1
valid_sources[0x75]	82693	1		T24	8		T25	4		T26	5
valid_sources[0x76]	78701	1		T24	7		T27	1		T25	2
valid_sources[0x77]	175302	1		T24	24		T27	1		T25	3
valid_sources[0x78]	79493	1		T24	6		T29	2		T25	3
valid_sources[0x79]	113641	1		T24	6		T25	6		T26	1
valid_sources[0x7a]	78067	1		T24	6		T27	6		T25	3
valid_sources[0x7b]	79029	1		T24	11		T27	2		T29	12
valid_sources[0x7c]	78942	1		T24	15		T27	1		T25	5
valid_sources[0x7d]	78639	1		T24	6		T27	4		T25	1
valid_sources[0x7e]	239406	1		T23	2		T24	6		T29	10
valid_sources[0x7f]	94092	1		T24	6		T25	2		T30	5
valid_sources[0x80]	134360	1		T24	18		T25	2		T126	43

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3813205

1

T14

14

T23

1

T24

1198

values[0x0]

all_enables

biggest_size

1963473

1

T14

25

T24

564

T27

31

values[0x1]

all_enables

biggest_size

1791518

1

T14

19

T24

606

T27

18

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	1972	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4471314	1		T29	542		T25	545		T126	1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	4465418	1		T29	138		T25	152		T126	10
values[0x0]	3161	1		T29	211		T25	161		T118	21
values[0x1]	4707	1		T29	286		T25	251		T126	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	747	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4472539	1		T29	605		T25	554		T126	13

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	17198	1		T29	2		T124	1		T130	2
valid_sources[0x01]	16681	1		T29	2		T209	1		T124	1
valid_sources[0x02]	17053	1		T29	3		T25	6		T209	1
valid_sources[0x03]	16893	1		T29	3		T25	3		T124	1
valid_sources[0x04]	17266	1		T29	1		T302	1		T130	1
valid_sources[0x05]	17289	1		T29	1		T124	1		T1	3
valid_sources[0x06]	16565	1		T29	4		T25	3		T119	1
valid_sources[0x07]	17108	1		T29	3		T25	5		T124	1
valid_sources[0x08]	16711	1		T29	4		T119	1		T120	3
valid_sources[0x09]	16514	1		T29	2		T123	1		T3	63
valid_sources[0x0a]	16892	1		T29	4		T25	1		T1	2
valid_sources[0x0b]	17116	1		T29	1		T210	1		T124	4
valid_sources[0x0c]	16791	1		T119	1		T124	1		T3	37
valid_sources[0x0d]	16549	1		T29	1		T210	1		T124	3
valid_sources[0x0e]	17154	1		T29	1		T120	14		T124	1
valid_sources[0x0f]	17211	1		T29	5		T119	1		T124	1
valid_sources[0x10]	16925	1		T29	3		T124	1		T3	72
valid_sources[0x11]	16845	1		T29	1		T130	3		T3	63
valid_sources[0x12]	17033	1		T29	2		T120	4		T129	2
valid_sources[0x13]	17009	1		T29	2		T130	1		T3	53
valid_sources[0x14]	16964	1		T29	4		T25	9		T124	2
valid_sources[0x15]	17179	1		T124	3		T130	2		T3	65
valid_sources[0x16]	16539	1		T29	2		T209	1		T124	3
valid_sources[0x17]	16597	1		T29	3		T119	1		T124	2
valid_sources[0x18]	16716	1		T25	1		T126	1		T118	1
valid_sources[0x19]	17178	1		T29	6		T25	33		T123	1
valid_sources[0x1a]	16782	1		T29	2		T119	1		T124	1
valid_sources[0x1b]	16698	1		T25	3		T130	2		T3	61
valid_sources[0x1c]	17361	1		T29	1		T126	1		T118	2
valid_sources[0x1d]	17034	1		T29	3		T25	6		T125	31
valid_sources[0x1e]	16860	1		T29	2		T120	2		T130	5
valid_sources[0x1f]	17287	1		T29	5		T25	16		T119	1
valid_sources[0x20]	16782	1		T29	2		T118	3		T119	1
valid_sources[0x21]	17057	1		T29	3		T3	50		T5	78
valid_sources[0x22]	16963	1		T29	3		T210	1		T124	2
valid_sources[0x23]	16813	1		T29	3		T25	5		T118	2
valid_sources[0x24]	17085	1		T29	3		T129	2		T3	53
valid_sources[0x25]	17146	1		T29	5		T130	4		T3	58
valid_sources[0x26]	16788	1		T29	2		T119	1		T124	1
valid_sources[0x27]	16940	1		T29	3		T124	1		T129	2
valid_sources[0x28]	16992	1		T119	1		T124	5		T1	2
valid_sources[0x29]	16598	1		T29	4		T120	6		T124	2
valid_sources[0x2a]	17110	1		T29	1		T25	1		T120	2
valid_sources[0x2b]	16650	1		T29	2		T25	29		T124	2
valid_sources[0x2c]	17207	1		T118	2		T119	1		T124	1
valid_sources[0x2d]	16627	1		T130	2		T3	64		T5	43
valid_sources[0x2e]	16962	1		T118	2		T119	1		T129	2
valid_sources[0x2f]	17923	1		T29	3		T129	1		T130	2
valid_sources[0x30]	17027	1		T29	6		T120	1		T124	1
valid_sources[0x31]	17280	1		T29	2		T124	3		T130	1
valid_sources[0x32]	16541	1		T29	4		T118	2		T119	1
valid_sources[0x33]	17450	1		T29	2		T124	2		T129	1
valid_sources[0x34]	16453	1		T29	2		T25	7		T119	1
valid_sources[0x35]	16741	1		T130	2		T3	43		T5	46
valid_sources[0x36]	17018	1		T29	1		T25	13		T120	6
valid_sources[0x37]	16501	1		T29	3		T119	1		T209	1
valid_sources[0x38]	16416	1		T29	2		T124	1		T130	2
valid_sources[0x39]	17150	1		T29	4		T124	2		T130	2
valid_sources[0x3a]	16446	1		T29	3		T124	1		T130	1
valid_sources[0x3b]	17057	1		T29	2		T209	1		T124	1
valid_sources[0x3c]	16684	1		T29	2		T124	3		T129	1
valid_sources[0x3d]	16886	1		T29	2		T124	1		T129	1
valid_sources[0x3e]	17066	1		T29	1		T124	1		T130	1
valid_sources[0x3f]	17051	1		T29	3		T130	1		T3	56
valid_sources[0x40]	16730	1		T29	2		T124	1		T129	1
valid_sources[0x41]	17032	1		T29	1		T124	1		T129	1
valid_sources[0x42]	16965	1		T29	4		T25	9		T124	5
valid_sources[0x43]	16825	1		T29	2		T124	3		T130	3
valid_sources[0x44]	17105	1		T124	2		T130	1		T1	2
valid_sources[0x45]	16933	1		T29	1		T25	6		T119	1
valid_sources[0x46]	17333	1		T29	5		T25	4		T124	1
valid_sources[0x47]	16864	1		T29	1		T209	1		T124	2
valid_sources[0x48]	16784	1		T29	2		T124	2		T129	1
valid_sources[0x49]	16671	1		T29	1		T125	2		T130	1
valid_sources[0x4a]	17203	1		T29	1		T124	2		T129	1
valid_sources[0x4b]	17501	1		T29	3		T119	1		T130	3
valid_sources[0x4c]	16749	1		T29	4		T119	1		T129	1
valid_sources[0x4d]	16770	1		T29	2		T126	1		T124	2
valid_sources[0x4e]	17028	1		T29	4		T118	4		T123	1
valid_sources[0x4f]	16576	1		T29	5		T126	1		T124	1
valid_sources[0x50]	17388	1		T29	2		T130	1		T3	63
valid_sources[0x51]	16929	1		T29	6		T25	1		T119	2
valid_sources[0x52]	16641	1		T29	3		T124	3		T130	1
valid_sources[0x53]	16863	1		T29	5		T120	1		T129	1
valid_sources[0x54]	16850	1		T29	2		T124	1		T130	2
valid_sources[0x55]	17303	1		T29	6		T124	2		T130	2
valid_sources[0x56]	16767	1		T29	3		T25	6		T129	1
valid_sources[0x57]	17098	1		T130	1		T3	63		T5	57
valid_sources[0x58]	17102	1		T29	2		T119	1		T124	1
valid_sources[0x59]	16436	1		T29	2		T125	18		T129	1
valid_sources[0x5a]	17726	1		T29	2		T25	2		T209	2
valid_sources[0x5b]	17394	1		T29	4		T124	1		T1	1
valid_sources[0x5c]	16598	1		T29	3		T118	3		T124	1
valid_sources[0x5d]	16993	1		T29	4		T124	1		T125	5
valid_sources[0x5e]	17269	1		T29	1		T124	3		T3	51
valid_sources[0x5f]	16827	1		T29	4		T25	4		T124	1
valid_sources[0x60]	17472	1		T29	3		T25	7		T126	1
valid_sources[0x61]	16910	1		T29	3		T124	2		T130	1
valid_sources[0x62]	16558	1		T29	5		T124	2		T129	1
valid_sources[0x63]	17130	1		T25	6		T124	2		T129	2
valid_sources[0x64]	16981	1		T29	3		T118	1		T124	1
valid_sources[0x65]	16875	1		T29	3		T129	1		T3	45
valid_sources[0x66]	17265	1		T29	1		T25	4		T121	3
valid_sources[0x67]	17346	1		T29	1		T130	1		T3	52
valid_sources[0x68]	16664	1		T29	2		T124	2		T129	1
valid_sources[0x69]	17015	1		T29	2		T25	15		T124	3
valid_sources[0x6a]	17005	1		T29	3		T25	36		T120	5
valid_sources[0x6b]	16822	1		T29	2		T124	1		T130	1
valid_sources[0x6c]	17220	1		T129	1		T302	1		T130	3
valid_sources[0x6d]	16975	1		T29	1		T25	4		T124	1
valid_sources[0x6e]	17191	1		T29	2		T118	2		T124	2
valid_sources[0x6f]	16918	1		T29	2		T119	2		T209	1
valid_sources[0x70]	17254	1		T29	1		T118	2		T124	2
valid_sources[0x71]	16768	1		T29	3		T25	1		T119	1
valid_sources[0x72]	16828	1		T29	2		T25	10		T302	1
valid_sources[0x73]	16637	1		T29	2		T119	1		T124	2
valid_sources[0x74]	17093	1		T29	1		T123	1		T129	1
valid_sources[0x75]	17233	1		T29	1		T25	16		T118	3
valid_sources[0x76]	16867	1		T29	4		T130	1		T1	2
valid_sources[0x77]	17281	1		T29	4		T25	8		T130	1
valid_sources[0x78]	17262	1		T29	3		T25	3		T124	1
valid_sources[0x79]	16888	1		T29	1		T25	18		T124	2
valid_sources[0x7a]	16575	1		T29	4		T25	5		T209	1
valid_sources[0x7b]	16985	1		T29	2		T118	1		T119	1
valid_sources[0x7c]	17290	1		T29	2		T25	1		T118	1
valid_sources[0x7d]	17278	1		T29	3		T118	1		T3	67
valid_sources[0x7e]	17306	1		T29	2		T129	1		T130	1
valid_sources[0x7f]	17040	1		T29	2		T25	16		T124	1
valid_sources[0x80]	16647	1		T124	1		T129	1		T130	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

4465317

1

T29

138

T25

152

T118

9

values[0x0]

all_enables

biggest_size

2980

1

T29

204

T25

159

T118

19

values[0x1]

all_enables

biggest_size

3017

1

T29

200

T25

234

T126

1

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30888	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	29997	1		T29	392		T25	255		T126	368

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	39552	1		T29	86		T25	139		T126	868
values[0x0]	10258	1		T29	170		T25	96		T126	226
values[0x1]	11075	1		T29	185		T25	115		T126	203

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	22289	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	38596	1		T29	424		T25	294		T126	694

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	150	1		T25	1		T126	2		T119	2
valid_sources[0x01]	224	1		T25	1		T252	17		T251	18
valid_sources[0x02]	257	1		T25	1		T126	12		T118	2
valid_sources[0x03]	376	1		T126	6		T128	128		T119	1
valid_sources[0x04]	154	1		T126	6		T209	1		T210	5
valid_sources[0x05]	207	1		T25	1		T126	10		T252	8
valid_sources[0x06]	184	1		T126	8		T185	1		T210	3
valid_sources[0x07]	161	1		T25	1		T126	7		T120	4
valid_sources[0x08]	222	1		T126	15		T118	10		T209	14
valid_sources[0x09]	372	1		T25	1		T126	6		T209	1
valid_sources[0x0a]	161	1		T25	4		T126	2		T120	5
valid_sources[0x0b]	220	1		T25	1		T126	6		T120	2
valid_sources[0x0c]	174	1		T25	1		T126	6		T252	22
valid_sources[0x0d]	150	1		T126	8		T209	28		T210	2
valid_sources[0x0e]	179	1		T29	34		T25	3		T126	4
valid_sources[0x0f]	362	1		T126	12		T209	7		T210	4
valid_sources[0x10]	210	1		T29	9		T126	6		T210	3
valid_sources[0x11]	180	1		T25	3		T126	7		T185	2
valid_sources[0x12]	195	1		T25	1		T249	6		T252	8
valid_sources[0x13]	247	1		T25	2		T126	6		T209	6
valid_sources[0x14]	235	1		T209	17		T210	2		T252	32
valid_sources[0x15]	183	1		T126	1		T209	13		T252	11
valid_sources[0x16]	185	1		T25	2		T126	1		T209	6
valid_sources[0x17]	140	1		T29	2		T25	1		T126	4
valid_sources[0x18]	201	1		T29	7		T126	10		T209	3
valid_sources[0x19]	497	1		T126	1		T128	256		T252	19
valid_sources[0x1a]	218	1		T25	2		T126	8		T209	2
valid_sources[0x1b]	199	1		T25	3		T126	4		T209	3
valid_sources[0x1c]	151	1		T126	4		T210	2		T252	6
valid_sources[0x1d]	129	1		T126	3		T209	3		T252	11
valid_sources[0x1e]	179	1		T29	2		T25	2		T126	6
valid_sources[0x1f]	160	1		T185	1		T209	19		T210	3
valid_sources[0x20]	280	1		T126	4		T210	2		T252	33
valid_sources[0x21]	926	1		T25	1		T126	1		T128	768
valid_sources[0x22]	189	1		T126	11		T210	5		T252	25
valid_sources[0x23]	221	1		T126	1		T119	2		T210	5
valid_sources[0x24]	164	1		T25	1		T126	11		T252	20
valid_sources[0x25]	327	1		T25	3		T126	22		T209	7
valid_sources[0x26]	228	1		T25	3		T126	3		T209	16
valid_sources[0x27]	143	1		T25	1		T126	3		T185	2
valid_sources[0x28]	234	1		T25	1		T126	2		T119	1
valid_sources[0x29]	226	1		T29	18		T25	3		T126	4
valid_sources[0x2a]	198	1		T25	1		T126	4		T119	3
valid_sources[0x2b]	309	1		T126	13		T252	16		T251	21
valid_sources[0x2c]	372	1		T29	23		T25	2		T126	4
valid_sources[0x2d]	155	1		T210	2		T252	26		T251	21
valid_sources[0x2e]	197	1		T126	5		T210	1		T252	17
valid_sources[0x2f]	215	1		T25	2		T126	12		T209	35
valid_sources[0x30]	284	1		T29	14		T126	2		T185	1
valid_sources[0x31]	237	1		T120	3		T210	11		T252	4
valid_sources[0x32]	187	1		T25	5		T126	1		T209	21
valid_sources[0x33]	247	1		T25	2		T126	2		T210	3
valid_sources[0x34]	201	1		T29	8		T126	3		T209	1
valid_sources[0x35]	180	1		T25	5		T126	11		T210	1
valid_sources[0x36]	211	1		T29	2		T25	4		T126	7
valid_sources[0x37]	265	1		T126	12		T209	7		T252	25
valid_sources[0x38]	234	1		T25	1		T126	16		T209	7
valid_sources[0x39]	257	1		T25	3		T126	10		T209	8
valid_sources[0x3a]	281	1		T210	1		T252	32		T251	14
valid_sources[0x3b]	223	1		T126	3		T210	7		T252	18
valid_sources[0x3c]	225	1		T25	3		T126	18		T120	2
valid_sources[0x3d]	197	1		T126	11		T209	8		T252	4
valid_sources[0x3e]	181	1		T126	1		T185	1		T210	4
valid_sources[0x3f]	211	1		T126	4		T120	1		T209	1
valid_sources[0x40]	179	1		T126	7		T252	14		T251	14
valid_sources[0x41]	157	1		T210	1		T252	21		T251	16
valid_sources[0x42]	185	1		T29	10		T209	11		T210	3
valid_sources[0x43]	175	1		T126	2		T210	1		T252	9
valid_sources[0x44]	418	1		T25	4		T126	4		T252	17
valid_sources[0x45]	372	1		T126	3		T210	1		T252	11
valid_sources[0x46]	195	1		T25	1		T126	10		T249	13
valid_sources[0x47]	179	1		T126	9		T209	14		T210	4
valid_sources[0x48]	234	1		T25	1		T126	7		T119	2
valid_sources[0x49]	137	1		T126	13		T252	16		T251	23
valid_sources[0x4a]	157	1		T120	2		T209	8		T210	6
valid_sources[0x4b]	221	1		T126	4		T119	1		T210	2
valid_sources[0x4c]	143	1		T29	1		T25	3		T126	8
valid_sources[0x4d]	184	1		T126	7		T209	1		T210	7
valid_sources[0x4e]	181	1		T25	1		T126	7		T119	1
valid_sources[0x4f]	214	1		T25	7		T126	2		T252	36
valid_sources[0x50]	172	1		T126	1		T210	4		T252	12
valid_sources[0x51]	313	1		T126	5		T252	42		T251	10
valid_sources[0x52]	131	1		T126	3		T209	8		T210	4
valid_sources[0x53]	156	1		T25	4		T126	1		T119	2
valid_sources[0x54]	222	1		T25	2		T126	4		T252	16
valid_sources[0x55]	189	1		T126	2		T209	7		T210	6
valid_sources[0x56]	192	1		T126	4		T185	1		T252	14
valid_sources[0x57]	291	1		T126	12		T120	2		T209	7
valid_sources[0x58]	169	1		T25	4		T126	16		T209	19
valid_sources[0x59]	245	1		T25	2		T126	6		T185	1
valid_sources[0x5a]	198	1		T25	8		T126	3		T210	1
valid_sources[0x5b]	293	1		T25	9		T126	4		T209	14
valid_sources[0x5c]	358	1		T29	5		T126	17		T210	2
valid_sources[0x5d]	274	1		T126	3		T210	11		T252	22
valid_sources[0x5e]	178	1		T29	32		T126	1		T209	10
valid_sources[0x5f]	192	1		T25	4		T126	4		T210	3
valid_sources[0x60]	175	1		T25	2		T126	4		T210	3
valid_sources[0x61]	196	1		T29	1		T126	4		T209	14
valid_sources[0x62]	273	1		T25	2		T126	3		T210	3
valid_sources[0x63]	233	1		T29	33		T126	7		T210	2
valid_sources[0x64]	198	1		T29	8		T25	3		T209	17
valid_sources[0x65]	132	1		T126	18		T210	1		T252	5
valid_sources[0x66]	1055	1		T25	2		T126	1		T128	896
valid_sources[0x67]	224	1		T25	4		T126	7		T119	3
valid_sources[0x68]	585	1		T25	1		T126	8		T118	2
valid_sources[0x69]	214	1		T126	3		T120	1		T210	7
valid_sources[0x6a]	444	1		T29	26		T126	6		T120	1
valid_sources[0x6b]	162	1		T29	4		T126	6		T119	2
valid_sources[0x6c]	141	1		T119	10		T209	1		T252	6
valid_sources[0x6d]	301	1		T25	2		T119	1		T209	63
valid_sources[0x6e]	228	1		T126	6		T210	1		T252	11
valid_sources[0x6f]	293	1		T126	3		T119	1		T209	4
valid_sources[0x70]	235	1		T126	5		T119	3		T209	3
valid_sources[0x71]	220	1		T126	7		T210	2		T252	25
valid_sources[0x72]	243	1		T118	1		T210	1		T252	6
valid_sources[0x73]	254	1		T25	1		T126	5		T210	1
valid_sources[0x74]	185	1		T25	2		T126	10		T210	6
valid_sources[0x75]	108	1		T120	2		T185	1		T209	3
valid_sources[0x76]	212	1		T25	5		T126	3		T209	39
valid_sources[0x77]	366	1		T126	11		T119	1		T210	4
valid_sources[0x78]	144	1		T25	8		T126	1		T210	1
valid_sources[0x79]	277	1		T25	9		T126	1		T120	1
valid_sources[0x7a]	221	1		T29	5		T25	7		T126	4
valid_sources[0x7b]	214	1		T126	1		T252	26		T251	17
valid_sources[0x7c]	190	1		T185	1		T209	26		T252	19
valid_sources[0x7d]	129	1		T29	2		T126	6		T185	1
valid_sources[0x7e]	198	1		T25	4		T126	12		T209	6
valid_sources[0x7f]	194	1		T126	2		T119	2		T120	4
valid_sources[0x80]	169	1		T209	9		T210	2		T252	12