SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_tb.dut.u_lc_creator_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_escalate_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_iso_part_sw_wr_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_nvm_debug_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_owner_seed_sw_rw_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_tb.dut.u_lc_seed_hw_rd_en_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 91 | 1 | T2 | 4 | T220 | 2 | T221 | 2 | |||
others[1] | 79 | 1 | T2 | 4 | T220 | 1 | T221 | 1 | |||
others[2] | 81 | 1 | T2 | 1 | T220 | 4 | T221 | 2 | |||
others[3] | 131 | 1 | T2 | 1 | T220 | 3 | T327 | 2 | |||
false | 25643 | 1 | T17 | 1 | T54 | 1 | T55 | 1 | |||
true | 20761 | 1 | T54 | 1 | T61 | 1 | T147 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 1 | 1 | T105 | 1 | - | - | - | - | |||
others[1] | 5 | 1 | T29 | 1 | T328 | 1 | T329 | 1 | |||
others[2] | 2 | 1 | T224 | 1 | T330 | 1 | - | - | |||
others[3] | 9 | 1 | T177 | 1 | T178 | 1 | T226 | 1 | |||
false | 11577 | 1 | T17 | 1 | T54 | 1 | T55 | 1 | |||
true | 3 | 1 | T111 | 1 | T191 | 1 | T331 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2206 | 1 | T5 | 41 | T31 | 95 | T32 | 2 | |||
others[1] | 2190 | 1 | T5 | 36 | T31 | 81 | T114 | 2 | |||
others[2] | 2102 | 1 | T2 | 2 | T5 | 44 | T31 | 66 | |||
others[3] | 3786 | 1 | T2 | 1 | T5 | 78 | T13 | 4 | |||
false | 6903 | 1 | T17 | 1 | T55 | 1 | T60 | 1 | |||
true | 1530 | 1 | T54 | 2 | T61 | 1 | T147 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2164 | 1 | T5 | 43 | T31 | 67 | T192 | 53 | |||
others[1] | 2217 | 1 | T2 | 2 | T5 | 63 | T31 | 88 | |||
others[2] | 2219 | 1 | T5 | 37 | T13 | 2 | T31 | 93 | |||
others[3] | 3551 | 1 | T2 | 1 | T5 | 70 | T13 | 2 | |||
false | 7021 | 1 | T17 | 1 | T55 | 1 | T60 | 1 | |||
true | 1539 | 1 | T54 | 2 | T61 | 1 | T147 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 2085 | 1 | T5 | 45 | T13 | 2 | T31 | 81 | |||
others[1] | 2192 | 1 | T5 | 46 | T31 | 61 | T32 | 2 | |||
others[2] | 2161 | 1 | T5 | 44 | T31 | 72 | T36 | 1 | |||
others[3] | 3550 | 1 | T5 | 62 | T13 | 2 | T31 | 162 | |||
false | 7484 | 1 | T17 | 1 | T54 | 1 | T55 | 1 | |||
true | 47 | 1 | T21 | 1 | T50 | 1 | T35 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 75 | 1 | T2 | 1 | T220 | 2 | T221 | 2 | |||
others[1] | 86 | 1 | T2 | 3 | T220 | 3 | T221 | 2 | |||
others[2] | 76 | 1 | T220 | 1 | T221 | 1 | T301 | 1 | |||
others[3] | 156 | 1 | T2 | 2 | T220 | 1 | T221 | 4 | |||
false | 25528 | 1 | T17 | 1 | T55 | 1 | T60 | 1 | |||
true | 20716 | 1 | T54 | 2 | T61 | 1 | T147 | 2 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 7097 | 1 | T5 | 135 | T13 | 6 | T31 | 284 | |||
others[1] | 7011 | 1 | T5 | 144 | T13 | 4 | T31 | 254 | |||
others[2] | 7030 | 1 | T5 | 155 | T13 | 4 | T31 | 292 | |||
others[3] | 11685 | 1 | T5 | 235 | T13 | 12 | T31 | 431 | |||
false | 3572 | 1 | T5 | 78 | T13 | 8 | T31 | 142 | |||
true | 17958 | 1 | T17 | 1 | T54 | 1 | T55 | 1 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |