Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_flash_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	23629208	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	7937768	1		T15	1		T44	84		T45	207

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	27125163	1		T15	57		T44	254		T45	99
values[0x0]	2220254	1		T44	48		T45	98		T46	43
values[0x1]	2221559	1		T44	55		T45	147		T46	60

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15820937	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	15746039	1		T15	25		T44	167		T45	274

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	851682	1		T44	2		T46	1		T47	5
valid_sources[0x01]	102432	1		T44	1		T47	2		T54	1
valid_sources[0x02]	93867	1		T46	2		T52	1		T49	16
valid_sources[0x03]	93716	1		T44	3		T45	11		T46	1
valid_sources[0x04]	140516	1		T15	1		T47	4		T49	23
valid_sources[0x05]	126691	1		T44	5		T46	1		T47	3
valid_sources[0x06]	93721	1		T46	2		T49	17		T118	1
valid_sources[0x07]	178591	1		T46	1		T49	19		T116	2
valid_sources[0x08]	123753	1		T15	2		T44	3		T46	2
valid_sources[0x09]	93148	1		T46	1		T47	5		T54	1
valid_sources[0x0a]	95402	1		T45	8		T46	2		T49	24
valid_sources[0x0b]	99991	1		T44	2		T46	3		T125	4
valid_sources[0x0c]	92009	1		T47	5		T54	1		T49	35
valid_sources[0x0d]	93176	1		T44	1		T46	1		T52	1
valid_sources[0x0e]	91267	1		T44	1		T46	4		T47	6
valid_sources[0x0f]	187369	1		T46	1		T47	2		T54	1
valid_sources[0x10]	94936	1		T15	1		T47	2		T54	1
valid_sources[0x11]	144027	1		T47	5		T49	19		T116	1
valid_sources[0x12]	92772	1		T44	2		T46	1		T54	1
valid_sources[0x13]	92726	1		T44	2		T46	1		T47	4
valid_sources[0x14]	91160	1		T47	1		T54	1		T49	15
valid_sources[0x15]	92635	1		T15	1		T44	2		T45	2
valid_sources[0x16]	93767	1		T44	3		T46	1		T47	4
valid_sources[0x17]	92965	1		T15	1		T44	1		T45	15
valid_sources[0x18]	90210	1		T44	2		T47	3		T49	36
valid_sources[0x19]	94193	1		T44	2		T46	1		T54	3
valid_sources[0x1a]	114149	1		T44	1		T45	1		T46	1
valid_sources[0x1b]	100166	1		T44	1		T52	1		T54	2
valid_sources[0x1c]	188781	1		T44	2		T46	2		T49	23
valid_sources[0x1d]	103568	1		T15	1		T54	1		T49	26
valid_sources[0x1e]	143870	1		T44	3		T46	1		T47	2
valid_sources[0x1f]	127254	1		T46	1		T47	4		T54	1
valid_sources[0x20]	265483	1		T15	1		T45	11		T46	3
valid_sources[0x21]	118075	1		T15	1		T44	4		T45	1
valid_sources[0x22]	94043	1		T47	1		T54	1		T125	2
valid_sources[0x23]	92328	1		T44	2		T51	3		T46	2
valid_sources[0x24]	92226	1		T44	1		T45	17		T46	5
valid_sources[0x25]	93099	1		T44	4		T46	1		T49	16
valid_sources[0x26]	94107	1		T15	1		T44	1		T45	25
valid_sources[0x27]	326809	1		T15	2		T44	1		T46	2
valid_sources[0x28]	93982	1		T44	4		T46	1		T47	5
valid_sources[0x29]	198826	1		T47	6		T49	15		T118	4
valid_sources[0x2a]	191482	1		T47	1		T54	2		T49	10
valid_sources[0x2b]	91845	1		T44	2		T46	1		T47	7
valid_sources[0x2c]	144174	1		T46	6		T47	5		T52	1
valid_sources[0x2d]	114837	1		T46	1		T47	4		T54	1
valid_sources[0x2e]	119555	1		T44	2		T47	5		T54	1
valid_sources[0x2f]	110852	1		T45	1		T46	2		T47	5
valid_sources[0x30]	92769	1		T44	1		T46	4		T47	5
valid_sources[0x31]	93024	1		T47	3		T49	14		T50	7
valid_sources[0x32]	120371	1		T44	4		T47	3		T52	1
valid_sources[0x33]	91778	1		T44	1		T46	1		T47	2
valid_sources[0x34]	142574	1		T44	6		T45	13		T46	1
valid_sources[0x35]	288669	1		T45	8		T46	2		T47	3
valid_sources[0x36]	94402	1		T44	2		T46	4		T47	5
valid_sources[0x37]	92401	1		T44	2		T47	2		T52	1
valid_sources[0x38]	99874	1		T44	1		T46	2		T47	6
valid_sources[0x39]	97555	1		T44	2		T46	4		T47	10
valid_sources[0x3a]	112808	1		T46	5		T47	1		T54	2
valid_sources[0x3b]	102156	1		T44	1		T46	2		T47	1
valid_sources[0x3c]	113210	1		T44	5		T46	1		T47	8
valid_sources[0x3d]	92293	1		T46	3		T47	1		T125	1
valid_sources[0x3e]	123990	1		T47	1		T125	1		T49	17
valid_sources[0x3f]	92730	1		T44	2		T46	1		T49	20
valid_sources[0x40]	91223	1		T46	2		T47	3		T54	1
valid_sources[0x41]	92471	1		T46	1		T47	2		T125	6
valid_sources[0x42]	272535	1		T15	1		T47	12		T49	17
valid_sources[0x43]	105895	1		T44	2		T46	1		T47	1
valid_sources[0x44]	92703	1		T44	2		T46	2		T47	7
valid_sources[0x45]	144382	1		T44	2		T125	2		T49	18
valid_sources[0x46]	92281	1		T15	2		T44	4		T47	4
valid_sources[0x47]	202226	1		T44	2		T46	2		T52	1
valid_sources[0x48]	91809	1		T44	2		T46	1		T47	4
valid_sources[0x49]	92063	1		T44	1		T46	2		T47	1
valid_sources[0x4a]	92091	1		T44	2		T46	1		T47	7
valid_sources[0x4b]	215406	1		T44	2		T46	1		T47	4
valid_sources[0x4c]	95581	1		T44	2		T45	1		T46	3
valid_sources[0x4d]	106043	1		T44	1		T46	1		T47	1
valid_sources[0x4e]	92865	1		T44	1		T46	1		T47	3
valid_sources[0x4f]	94939	1		T44	2		T46	1		T47	2
valid_sources[0x50]	91241	1		T44	1		T46	1		T47	6
valid_sources[0x51]	106785	1		T46	2		T54	1		T49	26
valid_sources[0x52]	113839	1		T47	1		T49	12		T117	1
valid_sources[0x53]	154733	1		T44	1		T46	3		T49	9
valid_sources[0x54]	90693	1		T44	1		T45	2		T46	2
valid_sources[0x55]	92669	1		T46	6		T47	1		T49	16
valid_sources[0x56]	90240	1		T44	1		T46	1		T49	19
valid_sources[0x57]	94478	1		T44	2		T46	1		T47	9
valid_sources[0x58]	100589	1		T44	3		T45	3		T47	3
valid_sources[0x59]	140749	1		T51	9		T46	1		T47	3
valid_sources[0x5a]	105274	1		T44	1		T45	5		T51	6
valid_sources[0x5b]	113499	1		T44	1		T46	2		T47	7
valid_sources[0x5c]	92493	1		T44	2		T46	1		T52	1
valid_sources[0x5d]	91004	1		T46	2		T47	5		T52	1
valid_sources[0x5e]	97599	1		T44	1		T52	1		T48	179
valid_sources[0x5f]	257961	1		T44	4		T46	1		T47	2
valid_sources[0x60]	120311	1		T44	4		T46	1		T47	7
valid_sources[0x61]	95717	1		T44	2		T47	4		T54	2
valid_sources[0x62]	95940	1		T44	5		T46	1		T47	3
valid_sources[0x63]	93989	1		T44	6		T46	3		T47	2
valid_sources[0x64]	112679	1		T44	2		T46	2		T49	28
valid_sources[0x65]	119059	1		T44	2		T46	1		T47	7
valid_sources[0x66]	93978	1		T44	1		T45	10		T47	5
valid_sources[0x67]	178423	1		T44	1		T46	2		T47	2
valid_sources[0x68]	93525	1		T44	2		T46	1		T47	8
valid_sources[0x69]	95852	1		T44	2		T46	1		T47	3
valid_sources[0x6a]	97000	1		T46	2		T47	6		T54	1
valid_sources[0x6b]	272066	1		T46	1		T47	1		T49	30
valid_sources[0x6c]	95689	1		T44	1		T51	22		T46	2
valid_sources[0x6d]	109052	1		T44	1		T46	3		T47	3
valid_sources[0x6e]	145493	1		T44	1		T46	2		T47	6
valid_sources[0x6f]	680784	1		T15	2		T44	2		T45	11
valid_sources[0x70]	94043	1		T44	2		T52	1		T49	29
valid_sources[0x71]	93349	1		T44	2		T46	2		T47	2
valid_sources[0x72]	193614	1		T46	2		T47	2		T52	1
valid_sources[0x73]	129681	1		T44	2		T46	4		T47	5
valid_sources[0x74]	112715	1		T46	1		T52	1		T125	4
valid_sources[0x75]	94091	1		T44	3		T46	2		T47	3
valid_sources[0x76]	93583	1		T44	2		T45	7		T47	2
valid_sources[0x77]	92939	1		T46	2		T47	2		T125	2
valid_sources[0x78]	91353	1		T15	1		T44	3		T46	1
valid_sources[0x79]	94236	1		T15	2		T44	7		T46	1
valid_sources[0x7a]	92781	1		T46	1		T47	3		T52	2
valid_sources[0x7b]	93003	1		T15	2		T46	1		T52	1
valid_sources[0x7c]	128484	1		T44	1		T46	1		T47	3
valid_sources[0x7d]	93545	1		T46	3		T47	4		T52	1
valid_sources[0x7e]	94846	1		T44	2		T54	3		T49	11
valid_sources[0x7f]	118533	1		T44	3		T47	1		T49	16
valid_sources[0x80]	92652	1		T44	3		T46	2		T125	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

4101734

1

T15

1

T44

24

T45

38

values[0x0]

all_enables

biggest_size

2004901

1

T44

38

T45

92

T46

29

values[0x1]

all_enables

biggest_size

1831133

1

T44

22

T45

77

T46

27

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	1800	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4597816	1		T45	404		T49	1		T116	387

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	4590859	1		T45	107		T49	5		T116	81
values[0x0]	3660	1		T45	144		T116	160		T118	63
values[0x1]	5097	1		T45	165		T49	2		T116	189

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	694	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4598922	1		T45	413		T49	3		T116	412

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	16464	1		T45	5		T116	1		T126	2
valid_sources[0x01]	16662	1		T45	2		T116	1		T122	1
valid_sources[0x02]	16386	1		T45	1		T118	1		T122	2
valid_sources[0x03]	15804	1		T116	3		T123	5		T126	1
valid_sources[0x04]	16596	1		T116	2		T118	1		T122	3
valid_sources[0x05]	17021	1		T45	1		T116	1		T405	1
valid_sources[0x06]	15804	1		T116	2		T126	3		T127	2
valid_sources[0x07]	16040	1		T45	1		T116	3		T118	2
valid_sources[0x08]	16257	1		T45	1		T116	1		T118	1
valid_sources[0x09]	147588	1		T45	4		T118	4		T122	2
valid_sources[0x0a]	16533	1		T116	3		T122	2		T123	1
valid_sources[0x0b]	16553	1		T45	3		T116	1		T118	2
valid_sources[0x0c]	16690	1		T116	1		T118	2		T122	3
valid_sources[0x0d]	16177	1		T116	2		T118	1		T122	2
valid_sources[0x0e]	16454	1		T116	2		T119	1		T122	1
valid_sources[0x0f]	16340	1		T116	1		T118	2		T123	1
valid_sources[0x10]	16348	1		T45	2		T116	2		T126	1
valid_sources[0x11]	16549	1		T45	4		T49	1		T118	1
valid_sources[0x12]	16837	1		T116	1		T126	1		T405	1
valid_sources[0x13]	16449	1		T45	2		T116	4		T122	2
valid_sources[0x14]	16669	1		T45	2		T118	2		T122	3
valid_sources[0x15]	16725	1		T116	2		T122	2		T126	1
valid_sources[0x16]	16132	1		T45	2		T116	3		T118	1
valid_sources[0x17]	16373	1		T116	1		T118	1		T122	2
valid_sources[0x18]	16397	1		T116	1		T118	4		T123	3
valid_sources[0x19]	16322	1		T45	4		T116	6		T122	1
valid_sources[0x1a]	16405	1		T45	2		T118	2		T126	3
valid_sources[0x1b]	15936	1		T116	2		T118	2		T122	3
valid_sources[0x1c]	16534	1		T45	3		T118	1		T122	2
valid_sources[0x1d]	16296	1		T116	3		T122	2		T126	3
valid_sources[0x1e]	16534	1		T45	2		T118	2		T126	3
valid_sources[0x1f]	16655	1		T116	1		T127	1		T128	3
valid_sources[0x20]	16740	1		T45	1		T116	1		T126	1
valid_sources[0x21]	16192	1		T116	3		T118	1		T126	2
valid_sources[0x22]	16718	1		T45	2		T116	1		T118	1
valid_sources[0x23]	17337	1		T45	1		T116	3		T121	29
valid_sources[0x24]	16269	1		T45	2		T116	1		T123	2
valid_sources[0x25]	16479	1		T45	6		T116	2		T122	1
valid_sources[0x26]	16689	1		T45	1		T116	1		T122	2
valid_sources[0x27]	16414	1		T45	2		T49	1		T116	1
valid_sources[0x28]	16594	1		T45	3		T116	4		T126	3
valid_sources[0x29]	16774	1		T116	2		T122	3		T126	2
valid_sources[0x2a]	16282	1		T45	5		T116	1		T118	1
valid_sources[0x2b]	16718	1		T45	3		T116	6		T126	3
valid_sources[0x2c]	16591	1		T116	2		T118	2		T126	4
valid_sources[0x2d]	16695	1		T45	1		T116	3		T122	1
valid_sources[0x2e]	16417	1		T45	2		T116	2		T122	1
valid_sources[0x2f]	16144	1		T116	1		T118	3		T405	1
valid_sources[0x30]	16368	1		T45	1		T116	1		T118	4
valid_sources[0x31]	16536	1		T45	1		T116	1		T122	3
valid_sources[0x32]	16356	1		T45	9		T116	3		T118	1
valid_sources[0x33]	16791	1		T45	2		T116	1		T118	1
valid_sources[0x34]	16089	1		T116	6		T126	1		T127	2
valid_sources[0x35]	16479	1		T45	4		T118	2		T126	2
valid_sources[0x36]	16219	1		T45	3		T116	2		T118	2
valid_sources[0x37]	16267	1		T116	1		T118	1		T122	1
valid_sources[0x38]	16343	1		T45	1		T116	2		T122	1
valid_sources[0x39]	15928	1		T45	3		T118	3		T126	2
valid_sources[0x3a]	16561	1		T118	1		T122	3		T126	2
valid_sources[0x3b]	16576	1		T45	3		T116	1		T118	2
valid_sources[0x3c]	15834	1		T45	2		T116	2		T118	1
valid_sources[0x3d]	16703	1		T45	2		T116	2		T118	2
valid_sources[0x3e]	16717	1		T116	2		T122	4		T126	3
valid_sources[0x3f]	16380	1		T45	5		T116	1		T118	1
valid_sources[0x40]	16479	1		T45	3		T116	2		T118	1
valid_sources[0x41]	15684	1		T45	1		T116	2		T126	3
valid_sources[0x42]	16332	1		T116	2		T126	4		T127	1
valid_sources[0x43]	16034	1		T116	1		T126	3		T128	2
valid_sources[0x44]	16477	1		T45	1		T118	1		T122	2
valid_sources[0x45]	17036	1		T45	4		T116	2		T126	2
valid_sources[0x46]	16394	1		T45	1		T116	1		T118	2
valid_sources[0x47]	16696	1		T116	2		T118	6		T126	4
valid_sources[0x48]	16286	1		T116	2		T122	1		T126	3
valid_sources[0x49]	16511	1		T45	1		T122	1		T126	2
valid_sources[0x4a]	15871	1		T45	1		T116	1		T118	2
valid_sources[0x4b]	16355	1		T45	3		T116	3		T118	1
valid_sources[0x4c]	16407	1		T45	1		T116	3		T118	4
valid_sources[0x4d]	16372	1		T116	1		T118	1		T126	1
valid_sources[0x4e]	16717	1		T45	3		T49	1		T116	1
valid_sources[0x4f]	16372	1		T45	2		T49	1		T116	1
valid_sources[0x50]	16280	1		T116	1		T237	1		T126	1
valid_sources[0x51]	15951	1		T45	1		T116	1		T118	2
valid_sources[0x52]	16217	1		T45	1		T116	1		T119	2
valid_sources[0x53]	16151	1		T45	1		T116	2		T118	1
valid_sources[0x54]	16158	1		T116	2		T118	1		T126	1
valid_sources[0x55]	16164	1		T116	2		T126	2		T127	1
valid_sources[0x56]	16361	1		T45	5		T116	2		T122	1
valid_sources[0x57]	16443	1		T116	2		T118	3		T122	2
valid_sources[0x58]	16602	1		T45	5		T116	2		T118	3
valid_sources[0x59]	16964	1		T45	2		T116	5		T118	1
valid_sources[0x5a]	15926	1		T45	2		T126	1		T127	2
valid_sources[0x5b]	16009	1		T45	2		T116	2		T118	4
valid_sources[0x5c]	16756	1		T116	1		T122	2		T126	1
valid_sources[0x5d]	16121	1		T45	1		T116	1		T126	4
valid_sources[0x5e]	15982	1		T116	2		T126	3		T128	1
valid_sources[0x5f]	16649	1		T116	1		T122	2		T126	2
valid_sources[0x60]	16510	1		T45	2		T116	1		T118	1
valid_sources[0x61]	16470	1		T116	1		T118	1		T122	1
valid_sources[0x62]	16390	1		T116	1		T118	1		T122	2
valid_sources[0x63]	16033	1		T45	1		T118	2		T126	1
valid_sources[0x64]	15981	1		T45	3		T116	3		T122	1
valid_sources[0x65]	16941	1		T45	3		T118	2		T122	1
valid_sources[0x66]	16550	1		T45	1		T116	5		T118	1
valid_sources[0x67]	15941	1		T45	2		T116	3		T118	1
valid_sources[0x68]	16342	1		T45	1		T116	3		T122	2
valid_sources[0x69]	16494	1		T45	3		T116	1		T122	2
valid_sources[0x6a]	16910	1		T116	2		T118	1		T122	2
valid_sources[0x6b]	16296	1		T122	3		T126	1		T127	1
valid_sources[0x6c]	16230	1		T122	5		T127	5		T128	5
valid_sources[0x6d]	16258	1		T45	2		T118	2		T405	1
valid_sources[0x6e]	16192	1		T45	1		T116	2		T119	1
valid_sources[0x6f]	16868	1		T45	1		T116	2		T122	1
valid_sources[0x70]	16257	1		T45	2		T116	4		T237	1
valid_sources[0x71]	15919	1		T116	3		T126	1		T128	4
valid_sources[0x72]	16528	1		T118	1		T122	2		T123	1
valid_sources[0x73]	16384	1		T116	6		T295	1		T128	3
valid_sources[0x74]	16534	1		T45	4		T116	2		T122	5
valid_sources[0x75]	16171	1		T45	1		T122	2		T127	2
valid_sources[0x76]	16397	1		T45	4		T116	3		T118	2
valid_sources[0x77]	16478	1		T116	3		T118	1		T122	2
valid_sources[0x78]	16539	1		T45	4		T49	1		T116	2
valid_sources[0x79]	16896	1		T116	3		T118	1		T126	4
valid_sources[0x7a]	16410	1		T45	2		T116	2		T118	2
valid_sources[0x7b]	16335	1		T45	6		T116	1		T122	1
valid_sources[0x7c]	16822	1		T116	4		T118	2		T122	1
valid_sources[0x7d]	16173	1		T45	1		T116	2		T122	2
valid_sources[0x7e]	16762	1		T45	2		T116	1		T122	1
valid_sources[0x7f]	15953	1		T116	2		T122	1		T126	2
valid_sources[0x80]	15896	1		T45	1		T116	5		T118	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

4590755

1

T45

107

T49

1

T116

81

values[0x0]

all_enables

biggest_size

3495

1

T45

144

T116

156

T118

55

values[0x1]

all_enables

biggest_size

3566

1

T45

153

T116

150

T118

52

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	35124	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	36378	1		T44	17		T46	21		T47	35

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	45433	1		T44	50		T46	52		T47	99
values[0x0]	12686	1		T44	8		T46	11		T47	26
values[0x1]	13383	1		T44	13		T45	11		T46	10

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	25576	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	45926	1		T44	39		T45	7		T46	39

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	229	1		T116	7		T55	7		T122	1
valid_sources[0x01]	319	1		T49	5		T116	4		T50	1
valid_sources[0x02]	285	1		T49	4		T116	4		T50	1
valid_sources[0x03]	273	1		T116	3		T55	6		T56	6
valid_sources[0x04]	252	1		T47	5		T49	21		T118	1
valid_sources[0x05]	319	1		T116	3		T118	1		T55	8
valid_sources[0x06]	256	1		T45	1		T116	1		T50	2
valid_sources[0x07]	185	1		T116	3		T55	8		T56	6
valid_sources[0x08]	240	1		T44	1		T47	2		T49	1
valid_sources[0x09]	211	1		T49	4		T55	5		T122	2
valid_sources[0x0a]	295	1		T116	1		T50	1		T118	1
valid_sources[0x0b]	261	1		T49	3		T118	1		T55	4
valid_sources[0x0c]	212	1		T44	1		T49	4		T116	1
valid_sources[0x0d]	281	1		T47	5		T49	1		T116	6
valid_sources[0x0e]	368	1		T46	1		T49	8		T55	4
valid_sources[0x0f]	242	1		T49	9		T116	2		T118	1
valid_sources[0x10]	232	1		T44	1		T46	5		T116	3
valid_sources[0x11]	290	1		T49	13		T55	3		T56	3
valid_sources[0x12]	243	1		T46	1		T49	2		T55	4
valid_sources[0x13]	264	1		T116	1		T118	2		T55	4
valid_sources[0x14]	280	1		T44	1		T46	1		T55	4
valid_sources[0x15]	212	1		T44	1		T49	2		T116	3
valid_sources[0x16]	266	1		T49	2		T118	1		T55	2
valid_sources[0x17]	239	1		T46	6		T49	8		T116	1
valid_sources[0x18]	235	1		T46	1		T118	2		T55	5
valid_sources[0x19]	197	1		T47	5		T49	9		T116	2
valid_sources[0x1a]	265	1		T49	6		T118	2		T121	2
valid_sources[0x1b]	221	1		T116	5		T118	1		T55	4
valid_sources[0x1c]	276	1		T49	1		T116	3		T55	7
valid_sources[0x1d]	360	1		T44	2		T49	13		T116	2
valid_sources[0x1e]	217	1		T46	1		T118	1		T119	1
valid_sources[0x1f]	379	1		T47	4		T49	3		T116	2
valid_sources[0x20]	311	1		T44	1		T49	9		T116	4
valid_sources[0x21]	303	1		T116	1		T55	5		T122	1
valid_sources[0x22]	239	1		T49	6		T116	6		T55	4
valid_sources[0x23]	492	1		T50	1		T118	1		T55	8
valid_sources[0x24]	215	1		T116	2		T118	1		T55	8
valid_sources[0x25]	244	1		T49	1		T55	6		T56	3
valid_sources[0x26]	241	1		T49	2		T55	2		T122	1
valid_sources[0x27]	292	1		T116	6		T50	1		T118	2
valid_sources[0x28]	282	1		T47	1		T118	1		T55	6
valid_sources[0x29]	278	1		T49	1		T116	1		T55	1
valid_sources[0x2a]	309	1		T55	4		T56	1		T255	12
valid_sources[0x2b]	228	1		T116	6		T55	4		T121	1
valid_sources[0x2c]	214	1		T49	4		T55	4		T122	1
valid_sources[0x2d]	236	1		T116	3		T55	9		T122	1
valid_sources[0x2e]	289	1		T44	2		T49	2		T116	3
valid_sources[0x2f]	300	1		T116	1		T55	5		T122	4
valid_sources[0x30]	301	1		T49	2		T50	1		T118	1
valid_sources[0x31]	456	1		T44	3		T47	8		T49	16
valid_sources[0x32]	296	1		T44	1		T49	2		T116	3
valid_sources[0x33]	327	1		T49	5		T119	7		T55	6
valid_sources[0x34]	206	1		T116	1		T118	1		T55	5
valid_sources[0x35]	231	1		T116	5		T118	2		T55	4
valid_sources[0x36]	291	1		T49	8		T116	1		T50	1
valid_sources[0x37]	221	1		T44	1		T46	2		T49	1
valid_sources[0x38]	232	1		T55	10		T56	8		T123	1
valid_sources[0x39]	241	1		T49	2		T50	1		T55	7
valid_sources[0x3a]	272	1		T47	2		T118	3		T55	8
valid_sources[0x3b]	252	1		T49	1		T55	6		T56	3
valid_sources[0x3c]	435	1		T47	1		T49	3		T116	5
valid_sources[0x3d]	223	1		T49	1		T50	1		T118	1
valid_sources[0x3e]	352	1		T49	5		T56	1		T123	1
valid_sources[0x3f]	290	1		T116	4		T121	1		T255	21
valid_sources[0x40]	334	1		T44	1		T49	8		T50	1
valid_sources[0x41]	238	1		T46	4		T49	8		T55	3
valid_sources[0x42]	189	1		T46	2		T49	5		T50	1
valid_sources[0x43]	208	1		T44	1		T46	1		T49	1
valid_sources[0x44]	301	1		T49	10		T55	6		T122	4
valid_sources[0x45]	193	1		T116	3		T55	2		T56	4
valid_sources[0x46]	230	1		T49	2		T50	1		T55	5
valid_sources[0x47]	266	1		T44	1		T46	3		T55	4
valid_sources[0x48]	282	1		T45	2		T118	1		T55	7
valid_sources[0x49]	234	1		T49	6		T50	1		T118	1
valid_sources[0x4a]	251	1		T44	1		T46	2		T49	6
valid_sources[0x4b]	271	1		T49	1		T116	3		T55	2
valid_sources[0x4c]	244	1		T49	1		T55	2		T121	2
valid_sources[0x4d]	255	1		T44	1		T118	1		T55	3
valid_sources[0x4e]	268	1		T44	1		T47	4		T49	1
valid_sources[0x4f]	301	1		T50	2		T118	1		T55	7
valid_sources[0x50]	280	1		T49	2		T118	1		T55	5
valid_sources[0x51]	294	1		T49	2		T118	1		T55	2
valid_sources[0x52]	243	1		T47	2		T49	10		T50	1
valid_sources[0x53]	296	1		T116	1		T118	5		T55	5
valid_sources[0x54]	325	1		T44	1		T49	6		T116	3
valid_sources[0x55]	320	1		T47	1		T49	8		T50	1
valid_sources[0x56]	244	1		T55	4		T121	1		T56	3
valid_sources[0x57]	382	1		T44	1		T116	1		T118	2
valid_sources[0x58]	321	1		T116	8		T55	6		T56	6
valid_sources[0x59]	340	1		T44	2		T49	1		T116	1
valid_sources[0x5a]	276	1		T44	1		T47	1		T55	7
valid_sources[0x5b]	265	1		T116	3		T118	1		T55	1
valid_sources[0x5c]	255	1		T46	3		T47	1		T118	1
valid_sources[0x5d]	271	1		T49	2		T55	6		T56	2
valid_sources[0x5e]	251	1		T116	1		T118	1		T55	5
valid_sources[0x5f]	248	1		T118	2		T55	4		T56	1
valid_sources[0x60]	232	1		T46	1		T47	2		T49	12
valid_sources[0x61]	280	1		T49	10		T116	1		T118	2
valid_sources[0x62]	270	1		T47	2		T49	1		T55	10
valid_sources[0x63]	237	1		T118	1		T55	4		T56	8
valid_sources[0x64]	254	1		T47	2		T49	4		T116	3
valid_sources[0x65]	237	1		T44	2		T47	2		T49	8
valid_sources[0x66]	255	1		T47	5		T49	3		T116	3
valid_sources[0x67]	264	1		T47	1		T49	3		T50	1
valid_sources[0x68]	228	1		T49	2		T116	8		T118	1
valid_sources[0x69]	238	1		T116	3		T55	7		T56	6
valid_sources[0x6a]	253	1		T47	1		T55	7		T56	4
valid_sources[0x6b]	276	1		T44	1		T118	5		T55	1
valid_sources[0x6c]	270	1		T44	1		T46	7		T49	2
valid_sources[0x6d]	354	1		T49	6		T50	1		T55	4
valid_sources[0x6e]	235	1		T46	1		T116	2		T50	1
valid_sources[0x6f]	350	1		T49	2		T116	3		T118	1
valid_sources[0x70]	241	1		T49	4		T116	6		T50	2
valid_sources[0x71]	276	1		T49	1		T116	2		T55	4
valid_sources[0x72]	248	1		T44	1		T47	2		T49	12
valid_sources[0x73]	216	1		T118	2		T55	8		T56	3
valid_sources[0x74]	204	1		T45	1		T116	5		T50	1
valid_sources[0x75]	372	1		T44	2		T47	8		T49	5
valid_sources[0x76]	284	1		T49	1		T50	1		T118	1
valid_sources[0x77]	342	1		T45	1		T50	1		T55	7
valid_sources[0x78]	263	1		T49	6		T118	3		T55	7
valid_sources[0x79]	229	1		T49	1		T116	3		T118	1
valid_sources[0x7a]	265	1		T49	3		T116	2		T55	5
valid_sources[0x7b]	268	1		T46	2		T49	1		T116	8
valid_sources[0x7c]	236	1		T44	1		T49	3		T50	1
valid_sources[0x7d]	457	1		T44	1		T47	3		T55	2
valid_sources[0x7e]	360	1		T49	6		T116	5		T55	6
valid_sources[0x7f]	260	1		T116	2		T55	2		T122	1
valid_sources[0x80]	450	1		T45	1		T49	1		T116	2