Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
106 |
1 |
|
T30 |
7 |
|
T116 |
1 |
|
T358 |
1 |
| others[1] |
94 |
1 |
|
T46 |
1 |
|
T30 |
2 |
|
T365 |
1 |
| others[2] |
108 |
1 |
|
T30 |
3 |
|
T358 |
1 |
|
T364 |
1 |
| others[3] |
173 |
1 |
|
T29 |
2 |
|
T30 |
6 |
|
T359 |
1 |
| false |
57 |
1 |
|
T30 |
2 |
|
T118 |
1 |
|
T127 |
1 |
| true |
6330 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
246 |
1 |
|
T1 |
1 |
|
T30 |
5 |
|
T213 |
1 |
| others[1] |
228 |
1 |
|
T30 |
2 |
|
T67 |
1 |
|
T136 |
2 |
| others[2] |
206 |
1 |
|
T29 |
1 |
|
T26 |
1 |
|
T61 |
1 |
| others[3] |
384 |
1 |
|
T10 |
1 |
|
T7 |
1 |
|
T46 |
1 |
| false |
131 |
1 |
|
T24 |
1 |
|
T30 |
2 |
|
T365 |
1 |
| true |
5673 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1076 |
1 |
|
T139 |
1 |
|
T203 |
1 |
|
T361 |
1 |
| others[1] |
1048 |
1 |
|
T196 |
1 |
|
T144 |
1 |
|
T335 |
1 |
| others[2] |
1042 |
1 |
|
T54 |
1 |
|
T141 |
1 |
|
T202 |
1 |
| others[3] |
1781 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T197 |
1 |
| false |
521 |
1 |
|
T138 |
1 |
|
T204 |
1 |
|
T145 |
1 |
| true |
1400 |
1 |
|
T6 |
1 |
|
T10 |
1 |
|
T35 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T24 |
1 |
|
T44 |
1 |
|
T39 |
2 |
| others[1] |
227 |
1 |
|
T30 |
4 |
|
T358 |
1 |
|
T59 |
1 |
| others[2] |
241 |
1 |
|
T29 |
1 |
|
T235 |
1 |
|
T30 |
1 |
| others[3] |
389 |
1 |
|
T46 |
1 |
|
T39 |
1 |
|
T30 |
3 |
| false |
133 |
1 |
|
T10 |
1 |
|
T29 |
1 |
|
T67 |
1 |
| true |
5649 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
221 |
1 |
|
T30 |
4 |
|
T59 |
1 |
|
T136 |
1 |
| others[1] |
219 |
1 |
|
T39 |
1 |
|
T30 |
4 |
|
T294 |
1 |
| others[2] |
225 |
1 |
|
T5 |
1 |
|
T29 |
1 |
|
T30 |
2 |
| others[3] |
384 |
1 |
|
T30 |
1 |
|
T358 |
1 |
|
T41 |
1 |
| false |
95 |
1 |
|
T39 |
1 |
|
T363 |
1 |
|
T136 |
1 |
| true |
5724 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1288 |
1 |
|
T203 |
1 |
|
T144 |
1 |
|
T205 |
1 |
| others[1] |
1223 |
1 |
|
T53 |
1 |
|
T141 |
1 |
|
T329 |
1 |
| others[2] |
1208 |
1 |
|
T201 |
1 |
|
T202 |
1 |
|
T204 |
1 |
| others[3] |
2048 |
1 |
|
T16 |
1 |
|
T54 |
1 |
|
T196 |
1 |
| false |
662 |
1 |
|
T138 |
1 |
|
T139 |
1 |
|
T142 |
1 |
| true |
439 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1189 |
1 |
|
T53 |
1 |
|
T54 |
1 |
|
T139 |
1 |
| others[1] |
1274 |
1 |
|
T202 |
1 |
|
T144 |
1 |
|
T145 |
1 |
| others[2] |
1273 |
1 |
|
T203 |
1 |
|
T204 |
1 |
|
T8 |
1 |
| others[3] |
2098 |
1 |
|
T16 |
1 |
|
T138 |
1 |
|
T196 |
1 |
| false |
615 |
1 |
|
T141 |
1 |
|
T201 |
1 |
|
T205 |
1 |
| true |
419 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
122 |
1 |
|
T235 |
1 |
|
T30 |
4 |
|
T112 |
1 |
| others[1] |
105 |
1 |
|
T29 |
1 |
|
T30 |
5 |
|
T360 |
1 |
| others[2] |
106 |
1 |
|
T30 |
3 |
|
T363 |
1 |
|
T365 |
1 |
| others[3] |
192 |
1 |
|
T29 |
1 |
|
T30 |
4 |
|
T358 |
2 |
| false |
62 |
1 |
|
T30 |
4 |
|
T135 |
1 |
|
T109 |
1 |
| true |
6281 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
231 |
1 |
|
T39 |
1 |
|
T30 |
1 |
|
T61 |
1 |
| others[1] |
239 |
1 |
|
T30 |
3 |
|
T68 |
1 |
|
T109 |
9 |
| others[2] |
211 |
1 |
|
T24 |
1 |
|
T30 |
1 |
|
T116 |
1 |
| others[3] |
408 |
1 |
|
T10 |
1 |
|
T44 |
1 |
|
T39 |
1 |
| false |
129 |
1 |
|
T30 |
1 |
|
T109 |
10 |
|
T118 |
4 |
| true |
5650 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1096 |
1 |
|
T54 |
1 |
|
T205 |
1 |
|
T1 |
1 |
| others[1] |
1052 |
1 |
|
T16 |
1 |
|
T139 |
1 |
|
T201 |
1 |
| others[2] |
1037 |
1 |
|
T138 |
1 |
|
T197 |
1 |
|
T141 |
1 |
| others[3] |
1740 |
1 |
|
T53 |
1 |
|
T196 |
1 |
|
T361 |
1 |
| false |
569 |
1 |
|
T142 |
1 |
|
T145 |
1 |
|
T329 |
1 |
| true |
1374 |
1 |
|
T6 |
1 |
|
T5 |
1 |
|
T44 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
235 |
1 |
|
T69 |
1 |
|
T136 |
1 |
|
T109 |
12 |
| others[1] |
232 |
1 |
|
T24 |
1 |
|
T39 |
3 |
|
T116 |
1 |
| others[2] |
224 |
1 |
|
T1 |
1 |
|
T7 |
1 |
|
T29 |
1 |
| others[3] |
368 |
1 |
|
T5 |
1 |
|
T30 |
3 |
|
T358 |
1 |
| false |
130 |
1 |
|
T30 |
1 |
|
T363 |
1 |
|
T40 |
1 |
| true |
5679 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
248 |
1 |
|
T30 |
1 |
|
T358 |
1 |
|
T360 |
1 |
| others[1] |
240 |
1 |
|
T30 |
1 |
|
T358 |
1 |
|
T40 |
1 |
| others[2] |
210 |
1 |
|
T47 |
1 |
|
T39 |
1 |
|
T30 |
1 |
| others[3] |
374 |
1 |
|
T26 |
1 |
|
T235 |
1 |
|
T30 |
5 |
| false |
106 |
1 |
|
T29 |
1 |
|
T247 |
1 |
|
T365 |
1 |
| true |
5690 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1214 |
1 |
|
T138 |
1 |
|
T142 |
1 |
|
T204 |
1 |
| others[1] |
1262 |
1 |
|
T53 |
1 |
|
T196 |
1 |
|
T139 |
1 |
| others[2] |
1265 |
1 |
|
T54 |
1 |
|
T141 |
1 |
|
T205 |
1 |
| others[3] |
2059 |
1 |
|
T16 |
1 |
|
T197 |
1 |
|
T201 |
1 |
| false |
630 |
1 |
|
T145 |
1 |
|
T9 |
3 |
|
T22 |
5 |
| true |
438 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1342 |
1 |
|
T145 |
1 |
|
T329 |
1 |
|
T9 |
4 |
| others[1] |
1272 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T139 |
1 |
| others[2] |
1251 |
1 |
|
T54 |
1 |
|
T201 |
1 |
|
T322 |
1 |
| others[3] |
1947 |
1 |
|
T196 |
1 |
|
T197 |
1 |
|
T141 |
1 |
| false |
630 |
1 |
|
T138 |
1 |
|
T142 |
1 |
|
T202 |
1 |
| true |
426 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
100 |
1 |
|
T29 |
1 |
|
T30 |
3 |
|
T109 |
5 |
| others[1] |
114 |
1 |
|
T30 |
4 |
|
T40 |
1 |
|
T136 |
1 |
| others[2] |
89 |
1 |
|
T39 |
1 |
|
T30 |
3 |
|
T116 |
1 |
| others[3] |
159 |
1 |
|
T5 |
1 |
|
T39 |
1 |
|
T29 |
1 |
| false |
50 |
1 |
|
T30 |
3 |
|
T358 |
1 |
|
T109 |
1 |
| true |
6356 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
219 |
1 |
|
T7 |
1 |
|
T39 |
1 |
|
T30 |
1 |
| others[1] |
252 |
1 |
|
T235 |
1 |
|
T30 |
2 |
|
T66 |
1 |
| others[2] |
245 |
1 |
|
T5 |
1 |
|
T29 |
1 |
|
T30 |
1 |
| others[3] |
381 |
1 |
|
T39 |
1 |
|
T30 |
3 |
|
T358 |
1 |
| false |
133 |
1 |
|
T39 |
1 |
|
T30 |
1 |
|
T109 |
5 |
| true |
5638 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1066 |
1 |
|
T202 |
1 |
|
T22 |
13 |
|
T44 |
1 |
| others[1] |
1081 |
1 |
|
T53 |
1 |
|
T204 |
1 |
|
T322 |
1 |
| others[2] |
1056 |
1 |
|
T138 |
1 |
|
T139 |
1 |
|
T141 |
1 |
| others[3] |
1727 |
1 |
|
T54 |
1 |
|
T197 |
1 |
|
T201 |
1 |
| false |
571 |
1 |
|
T16 |
1 |
|
T196 |
1 |
|
T145 |
1 |
| true |
1367 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
249 |
1 |
|
T30 |
2 |
|
T363 |
1 |
|
T41 |
1 |
| others[1] |
229 |
1 |
|
T39 |
3 |
|
T235 |
1 |
|
T30 |
2 |
| others[2] |
211 |
1 |
|
T47 |
1 |
|
T30 |
1 |
|
T67 |
1 |
| others[3] |
378 |
1 |
|
T10 |
1 |
|
T30 |
5 |
|
T293 |
1 |
| false |
127 |
1 |
|
T367 |
1 |
|
T109 |
4 |
|
T64 |
1 |
| true |
5674 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
215 |
1 |
|
T47 |
1 |
|
T39 |
1 |
|
T30 |
2 |
| others[1] |
236 |
1 |
|
T39 |
2 |
|
T29 |
1 |
|
T30 |
1 |
| others[2] |
202 |
1 |
|
T39 |
1 |
|
T30 |
5 |
|
T294 |
1 |
| others[3] |
394 |
1 |
|
T39 |
1 |
|
T26 |
1 |
|
T30 |
1 |
| false |
117 |
1 |
|
T109 |
2 |
|
T11 |
1 |
|
T118 |
3 |
| true |
5704 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1258 |
1 |
|
T16 |
1 |
|
T54 |
1 |
|
T144 |
1 |
| others[1] |
1191 |
1 |
|
T141 |
1 |
|
T142 |
1 |
|
T202 |
1 |
| others[2] |
1248 |
1 |
|
T53 |
1 |
|
T138 |
1 |
|
T139 |
1 |
| others[3] |
2118 |
1 |
|
T196 |
1 |
|
T197 |
1 |
|
T201 |
1 |
| false |
620 |
1 |
|
T329 |
1 |
|
T22 |
1 |
|
T58 |
1 |
| true |
433 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1193 |
1 |
|
T139 |
1 |
|
T197 |
1 |
|
T142 |
1 |
| others[1] |
1288 |
1 |
|
T196 |
1 |
|
T201 |
1 |
|
T204 |
1 |
| others[2] |
1285 |
1 |
|
T141 |
1 |
|
T202 |
1 |
|
T144 |
1 |
| others[3] |
2036 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T138 |
1 |
| false |
652 |
1 |
|
T54 |
1 |
|
T203 |
1 |
|
T322 |
1 |
| true |
414 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
104 |
1 |
|
T29 |
1 |
|
T30 |
2 |
|
T136 |
1 |
| others[1] |
120 |
1 |
|
T30 |
4 |
|
T365 |
1 |
|
T136 |
1 |
| others[2] |
108 |
1 |
|
T29 |
1 |
|
T30 |
4 |
|
T358 |
1 |
| others[3] |
189 |
1 |
|
T46 |
1 |
|
T47 |
1 |
|
T30 |
8 |
| false |
50 |
1 |
|
T30 |
2 |
|
T109 |
1 |
|
T118 |
2 |
| true |
6297 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T30 |
2 |
|
T112 |
1 |
|
T364 |
1 |
| others[1] |
239 |
1 |
|
T39 |
1 |
|
T29 |
1 |
|
T30 |
1 |
| others[2] |
259 |
1 |
|
T1 |
1 |
|
T24 |
1 |
|
T44 |
1 |
| others[3] |
365 |
1 |
|
T10 |
1 |
|
T5 |
1 |
|
T47 |
1 |
| false |
140 |
1 |
|
T46 |
1 |
|
T39 |
1 |
|
T66 |
1 |
| true |
5623 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1086 |
1 |
|
T54 |
1 |
|
T139 |
1 |
|
T197 |
1 |
| others[1] |
1060 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T201 |
1 |
| others[2] |
1077 |
1 |
|
T196 |
1 |
|
T141 |
1 |
|
T145 |
1 |
| others[3] |
1731 |
1 |
|
T202 |
1 |
|
T205 |
1 |
|
T335 |
1 |
| false |
517 |
1 |
|
T138 |
1 |
|
T322 |
1 |
|
T8 |
1 |
| true |
1397 |
1 |
|
T10 |
1 |
|
T35 |
1 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T30 |
2 |
|
T112 |
1 |
|
T109 |
7 |
| others[1] |
236 |
1 |
|
T5 |
1 |
|
T44 |
1 |
|
T39 |
1 |
| others[2] |
203 |
1 |
|
T30 |
1 |
|
T116 |
1 |
|
T67 |
1 |
| others[3] |
356 |
1 |
|
T7 |
1 |
|
T39 |
2 |
|
T29 |
1 |
| false |
123 |
1 |
|
T109 |
6 |
|
T118 |
5 |
|
T127 |
4 |
| true |
5716 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T47 |
1 |
|
T30 |
3 |
|
T358 |
1 |
| others[1] |
228 |
1 |
|
T26 |
1 |
|
T30 |
2 |
|
T109 |
10 |
| others[2] |
219 |
1 |
|
T30 |
1 |
|
T358 |
1 |
|
T109 |
13 |
| others[3] |
372 |
1 |
|
T39 |
1 |
|
T29 |
2 |
|
T30 |
2 |
| false |
107 |
1 |
|
T30 |
2 |
|
T363 |
1 |
|
T69 |
1 |
| true |
5708 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1265 |
1 |
|
T138 |
1 |
|
T196 |
1 |
|
T139 |
1 |
| others[1] |
1291 |
1 |
|
T197 |
1 |
|
T144 |
1 |
|
T205 |
1 |
| others[2] |
1209 |
1 |
|
T54 |
1 |
|
T142 |
1 |
|
T361 |
1 |
| others[3] |
2061 |
1 |
|
T16 |
1 |
|
T203 |
1 |
|
T329 |
1 |
| false |
616 |
1 |
|
T53 |
1 |
|
T202 |
1 |
|
T322 |
1 |
| true |
426 |
1 |
|
T6 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1257 |
1 |
|
T54 |
1 |
|
T197 |
1 |
|
T329 |
1 |
| others[1] |
1312 |
1 |
|
T138 |
1 |
|
T196 |
1 |
|
T142 |
1 |
| others[2] |
1274 |
1 |
|
T141 |
1 |
|
T202 |
1 |
|
T204 |
1 |
| others[3] |
1966 |
1 |
|
T53 |
1 |
|
T144 |
1 |
|
T361 |
1 |
| false |
643 |
1 |
|
T16 |
1 |
|
T139 |
1 |
|
T201 |
1 |
| true |
416 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
106 |
1 |
|
T29 |
1 |
|
T30 |
2 |
|
T360 |
1 |
| others[1] |
113 |
1 |
|
T39 |
1 |
|
T30 |
9 |
|
T358 |
1 |
| others[2] |
109 |
1 |
|
T30 |
2 |
|
T358 |
1 |
|
T247 |
1 |
| others[3] |
184 |
1 |
|
T5 |
1 |
|
T46 |
1 |
|
T29 |
1 |
| false |
51 |
1 |
|
T235 |
1 |
|
T30 |
1 |
|
T109 |
2 |
| true |
6305 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
230 |
1 |
|
T47 |
1 |
|
T39 |
1 |
|
T30 |
1 |
| others[1] |
219 |
1 |
|
T39 |
1 |
|
T235 |
1 |
|
T30 |
2 |
| others[2] |
207 |
1 |
|
T10 |
1 |
|
T30 |
4 |
|
T112 |
1 |
| others[3] |
432 |
1 |
|
T7 |
1 |
|
T46 |
1 |
|
T39 |
1 |
| false |
130 |
1 |
|
T30 |
1 |
|
T66 |
1 |
|
T358 |
1 |
| true |
5650 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1073 |
1 |
|
T142 |
1 |
|
T144 |
1 |
|
T205 |
1 |
| others[1] |
1071 |
1 |
|
T138 |
1 |
|
T141 |
1 |
|
T202 |
1 |
| others[2] |
1063 |
1 |
|
T16 |
1 |
|
T196 |
1 |
|
T139 |
1 |
| others[3] |
1743 |
1 |
|
T53 |
1 |
|
T54 |
1 |
|
T201 |
1 |
| false |
561 |
1 |
|
T203 |
1 |
|
T8 |
1 |
|
T9 |
1 |
| true |
1357 |
1 |
|
T5 |
1 |
|
T26 |
1 |
|
T235 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |