Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T44 |
1 |
|
T46 |
1 |
|
T47 |
1 |
| others[1] |
261 |
1 |
|
T26 |
1 |
|
T30 |
2 |
|
T67 |
1 |
| others[2] |
228 |
1 |
|
T30 |
3 |
|
T364 |
1 |
|
T136 |
1 |
| others[3] |
367 |
1 |
|
T5 |
1 |
|
T24 |
1 |
|
T39 |
1 |
| false |
119 |
1 |
|
T10 |
1 |
|
T30 |
1 |
|
T360 |
1 |
| true |
5676 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
204 |
1 |
|
T47 |
1 |
|
T26 |
1 |
|
T30 |
3 |
| others[1] |
237 |
1 |
|
T5 |
1 |
|
T39 |
2 |
|
T30 |
3 |
| others[2] |
206 |
1 |
|
T1 |
1 |
|
T39 |
1 |
|
T30 |
1 |
| others[3] |
340 |
1 |
|
T29 |
1 |
|
T30 |
2 |
|
T358 |
1 |
| false |
129 |
1 |
|
T29 |
1 |
|
T30 |
2 |
|
T109 |
4 |
| true |
5752 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1232 |
1 |
|
T16 |
1 |
|
T197 |
1 |
|
T141 |
1 |
| others[1] |
1269 |
1 |
|
T204 |
1 |
|
T145 |
1 |
|
T9 |
6 |
| others[2] |
1248 |
1 |
|
T53 |
1 |
|
T54 |
1 |
|
T142 |
1 |
| others[3] |
2054 |
1 |
|
T138 |
1 |
|
T196 |
1 |
|
T139 |
1 |
| false |
623 |
1 |
|
T203 |
1 |
|
T8 |
1 |
|
T9 |
1 |
| true |
442 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1226 |
1 |
|
T142 |
1 |
|
T204 |
1 |
|
T145 |
1 |
| others[1] |
1258 |
1 |
|
T16 |
1 |
|
T196 |
1 |
|
T201 |
1 |
| others[2] |
1232 |
1 |
|
T54 |
1 |
|
T144 |
1 |
|
T205 |
1 |
| others[3] |
2055 |
1 |
|
T53 |
1 |
|
T138 |
1 |
|
T139 |
1 |
| false |
690 |
1 |
|
T202 |
1 |
|
T9 |
4 |
|
T22 |
9 |
| true |
407 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
80 |
1 |
|
T30 |
5 |
|
T112 |
1 |
|
T135 |
1 |
| others[1] |
120 |
1 |
|
T29 |
1 |
|
T30 |
5 |
|
T358 |
1 |
| others[2] |
91 |
1 |
|
T30 |
1 |
|
T359 |
1 |
|
T247 |
1 |
| others[3] |
180 |
1 |
|
T30 |
7 |
|
T358 |
1 |
|
T360 |
2 |
| false |
49 |
1 |
|
T29 |
1 |
|
T30 |
2 |
|
T136 |
1 |
| true |
6348 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T29 |
1 |
|
T30 |
1 |
|
T67 |
1 |
| others[1] |
244 |
1 |
|
T10 |
1 |
|
T39 |
1 |
|
T26 |
1 |
| others[2] |
237 |
1 |
|
T30 |
1 |
|
T66 |
1 |
|
T358 |
1 |
| others[3] |
372 |
1 |
|
T5 |
1 |
|
T24 |
1 |
|
T39 |
1 |
| false |
131 |
1 |
|
T30 |
1 |
|
T41 |
1 |
|
T135 |
1 |
| true |
5655 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1039 |
1 |
|
T139 |
1 |
|
T197 |
1 |
|
T141 |
1 |
| others[1] |
1068 |
1 |
|
T16 |
1 |
|
T138 |
1 |
|
T201 |
1 |
| others[2] |
1102 |
1 |
|
T53 |
1 |
|
T54 |
1 |
|
T196 |
1 |
| others[3] |
1778 |
1 |
|
T142 |
1 |
|
T321 |
1 |
|
T335 |
1 |
| false |
498 |
1 |
|
T144 |
1 |
|
T6 |
1 |
|
T9 |
2 |
| true |
1383 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
249 |
1 |
|
T30 |
2 |
|
T116 |
1 |
|
T360 |
1 |
| others[1] |
235 |
1 |
|
T46 |
1 |
|
T39 |
2 |
|
T30 |
2 |
| others[2] |
214 |
1 |
|
T44 |
1 |
|
T30 |
2 |
|
T363 |
1 |
| others[3] |
399 |
1 |
|
T7 |
1 |
|
T39 |
1 |
|
T30 |
7 |
| false |
125 |
1 |
|
T24 |
1 |
|
T59 |
1 |
|
T68 |
1 |
| true |
5646 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T39 |
1 |
|
T116 |
1 |
|
T359 |
1 |
| others[1] |
211 |
1 |
|
T39 |
1 |
|
T29 |
1 |
|
T30 |
4 |
| others[2] |
231 |
1 |
|
T29 |
1 |
|
T30 |
1 |
|
T112 |
1 |
| others[3] |
364 |
1 |
|
T39 |
1 |
|
T30 |
4 |
|
T294 |
1 |
| false |
120 |
1 |
|
T235 |
1 |
|
T30 |
2 |
|
T109 |
4 |
| true |
5732 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1222 |
1 |
|
T54 |
1 |
|
T139 |
1 |
|
T197 |
1 |
| others[1] |
1318 |
1 |
|
T53 |
1 |
|
T361 |
1 |
|
T322 |
1 |
| others[2] |
1191 |
1 |
|
T142 |
1 |
|
T201 |
1 |
|
T203 |
1 |
| others[3] |
2075 |
1 |
|
T16 |
1 |
|
T138 |
1 |
|
T141 |
1 |
| false |
620 |
1 |
|
T196 |
1 |
|
T22 |
9 |
|
T39 |
1 |
| true |
442 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1283 |
1 |
|
T201 |
1 |
|
T144 |
1 |
|
T329 |
1 |
| others[1] |
1197 |
1 |
|
T16 |
1 |
|
T205 |
1 |
|
T322 |
1 |
| others[2] |
1223 |
1 |
|
T53 |
1 |
|
T138 |
1 |
|
T203 |
1 |
| others[3] |
2085 |
1 |
|
T196 |
1 |
|
T139 |
1 |
|
T197 |
1 |
| false |
663 |
1 |
|
T54 |
1 |
|
T142 |
1 |
|
T202 |
1 |
| true |
417 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
103 |
1 |
|
T29 |
1 |
|
T30 |
2 |
|
T365 |
1 |
| others[1] |
97 |
1 |
|
T30 |
4 |
|
T247 |
1 |
|
T360 |
2 |
| others[2] |
102 |
1 |
|
T30 |
5 |
|
T358 |
1 |
|
T109 |
3 |
| others[3] |
182 |
1 |
|
T29 |
1 |
|
T30 |
7 |
|
T358 |
1 |
| false |
53 |
1 |
|
T30 |
2 |
|
T109 |
2 |
|
T118 |
3 |
| true |
6331 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
252 |
1 |
|
T39 |
1 |
|
T29 |
1 |
|
T30 |
2 |
| others[1] |
234 |
1 |
|
T5 |
1 |
|
T30 |
1 |
|
T66 |
1 |
| others[2] |
250 |
1 |
|
T39 |
1 |
|
T26 |
1 |
|
T30 |
4 |
| others[3] |
414 |
1 |
|
T10 |
1 |
|
T47 |
1 |
|
T39 |
1 |
| false |
103 |
1 |
|
T247 |
1 |
|
T109 |
7 |
|
T118 |
3 |
| true |
5615 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1005 |
1 |
|
T53 |
1 |
|
T197 |
1 |
|
T142 |
1 |
| others[1] |
1099 |
1 |
|
T203 |
1 |
|
T6 |
1 |
|
T9 |
6 |
| others[2] |
1052 |
1 |
|
T196 |
1 |
|
T202 |
1 |
|
T9 |
5 |
| others[3] |
1756 |
1 |
|
T138 |
1 |
|
T139 |
1 |
|
T141 |
1 |
| false |
548 |
1 |
|
T16 |
1 |
|
T54 |
1 |
|
T35 |
1 |
| true |
1408 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
238 |
1 |
|
T7 |
1 |
|
T30 |
2 |
|
T109 |
8 |
| others[1] |
216 |
1 |
|
T39 |
2 |
|
T26 |
1 |
|
T30 |
1 |
| others[2] |
231 |
1 |
|
T30 |
3 |
|
T112 |
1 |
|
T67 |
1 |
| others[3] |
386 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T46 |
1 |
| false |
138 |
1 |
|
T30 |
2 |
|
T363 |
1 |
|
T360 |
1 |
| true |
5659 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
224 |
1 |
|
T39 |
1 |
|
T30 |
3 |
|
T358 |
1 |
| others[1] |
249 |
1 |
|
T30 |
5 |
|
T59 |
1 |
|
T136 |
1 |
| others[2] |
236 |
1 |
|
T29 |
1 |
|
T235 |
1 |
|
T30 |
1 |
| others[3] |
358 |
1 |
|
T39 |
2 |
|
T26 |
1 |
|
T30 |
3 |
| false |
118 |
1 |
|
T29 |
1 |
|
T30 |
1 |
|
T363 |
1 |
| true |
5683 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1251 |
1 |
|
T16 |
1 |
|
T204 |
1 |
|
T9 |
2 |
| others[1] |
1247 |
1 |
|
T53 |
1 |
|
T138 |
1 |
|
T141 |
1 |
| others[2] |
1261 |
1 |
|
T196 |
1 |
|
T197 |
1 |
|
T145 |
1 |
| others[3] |
2016 |
1 |
|
T54 |
1 |
|
T142 |
1 |
|
T201 |
1 |
| false |
651 |
1 |
|
T139 |
1 |
|
T22 |
12 |
|
T30 |
3 |
| true |
442 |
1 |
|
T6 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1225 |
1 |
|
T54 |
1 |
|
T138 |
1 |
|
T202 |
1 |
| others[1] |
1267 |
1 |
|
T197 |
1 |
|
T141 |
1 |
|
T201 |
1 |
| others[2] |
1239 |
1 |
|
T16 |
1 |
|
T203 |
1 |
|
T361 |
1 |
| others[3] |
2049 |
1 |
|
T53 |
1 |
|
T142 |
1 |
|
T145 |
1 |
| false |
665 |
1 |
|
T196 |
1 |
|
T139 |
1 |
|
T204 |
1 |
| true |
423 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
95 |
1 |
|
T30 |
4 |
|
T358 |
2 |
|
T359 |
1 |
| others[1] |
112 |
1 |
|
T30 |
2 |
|
T365 |
1 |
|
T360 |
1 |
| others[2] |
107 |
1 |
|
T29 |
1 |
|
T30 |
5 |
|
T247 |
1 |
| others[3] |
182 |
1 |
|
T29 |
1 |
|
T235 |
1 |
|
T30 |
7 |
| false |
61 |
1 |
|
T30 |
2 |
|
T109 |
1 |
|
T118 |
5 |
| true |
6311 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
237 |
1 |
|
T30 |
2 |
|
T363 |
1 |
|
T359 |
1 |
| others[1] |
235 |
1 |
|
T39 |
1 |
|
T30 |
3 |
|
T67 |
1 |
| others[2] |
225 |
1 |
|
T29 |
1 |
|
T66 |
1 |
|
T358 |
1 |
| others[3] |
358 |
1 |
|
T39 |
1 |
|
T26 |
1 |
|
T235 |
1 |
| false |
122 |
1 |
|
T39 |
1 |
|
T109 |
5 |
|
T214 |
1 |
| true |
5691 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
996 |
1 |
|
T139 |
1 |
|
T141 |
1 |
|
T201 |
1 |
| others[1] |
1072 |
1 |
|
T54 |
1 |
|
T196 |
1 |
|
T204 |
1 |
| others[2] |
1093 |
1 |
|
T16 |
1 |
|
T197 |
1 |
|
T203 |
1 |
| others[3] |
1817 |
1 |
|
T53 |
1 |
|
T142 |
1 |
|
T144 |
1 |
| false |
555 |
1 |
|
T138 |
1 |
|
T202 |
1 |
|
T361 |
1 |
| true |
1335 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
238 |
1 |
|
T46 |
1 |
|
T47 |
1 |
|
T30 |
1 |
| others[1] |
211 |
1 |
|
T5 |
1 |
|
T29 |
1 |
|
T30 |
2 |
| others[2] |
237 |
1 |
|
T26 |
1 |
|
T235 |
1 |
|
T30 |
1 |
| others[3] |
376 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T39 |
1 |
| false |
119 |
1 |
|
T116 |
1 |
|
T359 |
1 |
|
T136 |
1 |
| true |
5687 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
200 |
1 |
|
T39 |
3 |
|
T29 |
1 |
|
T235 |
1 |
| others[1] |
227 |
1 |
|
T47 |
1 |
|
T29 |
1 |
|
T30 |
4 |
| others[2] |
220 |
1 |
|
T39 |
1 |
|
T26 |
1 |
|
T30 |
1 |
| others[3] |
405 |
1 |
|
T5 |
1 |
|
T30 |
3 |
|
T109 |
16 |
| false |
117 |
1 |
|
T358 |
1 |
|
T136 |
1 |
|
T109 |
8 |
| true |
5699 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1219 |
1 |
|
T16 |
1 |
|
T138 |
1 |
|
T196 |
1 |
| others[1] |
1227 |
1 |
|
T53 |
1 |
|
T139 |
1 |
|
T201 |
1 |
| others[2] |
1249 |
1 |
|
T202 |
1 |
|
T322 |
1 |
|
T9 |
3 |
| others[3] |
2060 |
1 |
|
T142 |
1 |
|
T203 |
1 |
|
T145 |
1 |
| false |
681 |
1 |
|
T54 |
1 |
|
T197 |
1 |
|
T361 |
1 |
| true |
432 |
1 |
|
T6 |
1 |
|
T10 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1239 |
1 |
|
T53 |
1 |
|
T138 |
1 |
|
T204 |
1 |
| others[1] |
1246 |
1 |
|
T144 |
1 |
|
T8 |
1 |
|
T9 |
2 |
| others[2] |
1218 |
1 |
|
T196 |
1 |
|
T197 |
1 |
|
T142 |
1 |
| others[3] |
2079 |
1 |
|
T16 |
1 |
|
T54 |
1 |
|
T139 |
1 |
| false |
672 |
1 |
|
T141 |
1 |
|
T9 |
2 |
|
T22 |
4 |
| true |
414 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
111 |
1 |
|
T1 |
1 |
|
T29 |
1 |
|
T30 |
7 |
| others[1] |
115 |
1 |
|
T30 |
4 |
|
T247 |
1 |
|
T109 |
4 |
| others[2] |
107 |
1 |
|
T39 |
1 |
|
T30 |
3 |
|
T360 |
1 |
| others[3] |
174 |
1 |
|
T29 |
1 |
|
T30 |
5 |
|
T358 |
1 |
| false |
46 |
1 |
|
T30 |
1 |
|
T365 |
1 |
|
T109 |
1 |
| true |
6315 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
264 |
1 |
|
T7 |
1 |
|
T24 |
1 |
|
T39 |
1 |
| others[1] |
252 |
1 |
|
T39 |
2 |
|
T235 |
1 |
|
T30 |
2 |
| others[2] |
247 |
1 |
|
T30 |
2 |
|
T61 |
1 |
|
T67 |
1 |
| others[3] |
418 |
1 |
|
T5 |
1 |
|
T30 |
6 |
|
T112 |
1 |
| false |
104 |
1 |
|
T44 |
1 |
|
T39 |
2 |
|
T29 |
1 |
| true |
5583 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1102 |
1 |
|
T142 |
1 |
|
T202 |
1 |
|
T34 |
1 |
| others[1] |
1015 |
1 |
|
T196 |
1 |
|
T139 |
1 |
|
T203 |
1 |
| others[2] |
990 |
1 |
|
T53 |
1 |
|
T141 |
1 |
|
T144 |
1 |
| others[3] |
1768 |
1 |
|
T16 |
1 |
|
T54 |
1 |
|
T138 |
1 |
| false |
578 |
1 |
|
T9 |
2 |
|
T22 |
6 |
|
T29 |
1 |
| true |
1415 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T39 |
1 |
|
T30 |
1 |
|
T247 |
1 |
| others[1] |
229 |
1 |
|
T30 |
3 |
|
T109 |
12 |
|
T118 |
7 |
| others[2] |
226 |
1 |
|
T1 |
1 |
|
T46 |
1 |
|
T39 |
1 |
| others[3] |
405 |
1 |
|
T7 |
1 |
|
T39 |
1 |
|
T30 |
4 |
| false |
134 |
1 |
|
T24 |
1 |
|
T39 |
1 |
|
T30 |
2 |
| true |
5657 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
232 |
1 |
|
T39 |
1 |
|
T30 |
1 |
|
T112 |
1 |
| others[1] |
255 |
1 |
|
T39 |
1 |
|
T29 |
1 |
|
T30 |
1 |
| others[2] |
224 |
1 |
|
T29 |
1 |
|
T30 |
1 |
|
T358 |
1 |
| others[3] |
350 |
1 |
|
T26 |
1 |
|
T30 |
3 |
|
T365 |
1 |
| false |
139 |
1 |
|
T235 |
1 |
|
T30 |
1 |
|
T109 |
7 |
| true |
5668 |
1 |
|
T16 |
1 |
|
T53 |
1 |
|
T54 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1253 |
1 |
|
T54 |
1 |
|
T196 |
1 |
|
T142 |
1 |
| others[1] |
1174 |
1 |
|
T201 |
1 |
|
T204 |
1 |
|
T329 |
1 |
| others[2] |
1289 |
1 |
|
T138 |
1 |
|
T203 |
1 |
|
T8 |
1 |
| others[3] |
2079 |
1 |
|
T53 |
1 |
|
T139 |
1 |
|
T197 |
1 |
| false |
640 |
1 |
|
T16 |
1 |
|
T321 |
1 |
|
T9 |
1 |
| true |
433 |
1 |
|
T1 |
1 |
|
T6 |
1 |
|
T10 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |