Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_flash_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	21030692	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	6828111	1		T16	39		T48	1815		T49	525

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	24020494	1		T16	58		T48	5859		T49	721
values[0x0]	1916972	1		T16	22		T48	1022		T49	183
values[0x1]	1921337	1		T16	23		T48	1046		T49	223

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	14085149	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	13773654	1		T16	63		T48	3763		T49	711

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	102829	1		T48	33		T53	1		T54	1
valid_sources[0x01]	88814	1		T48	35		T53	1		T137	1
valid_sources[0x02]	86271	1		T48	24		T53	5		T54	1
valid_sources[0x03]	85322	1		T48	35		T54	1		T50	14
valid_sources[0x04]	97556	1		T48	51		T54	1		T137	1
valid_sources[0x05]	685995	1		T48	34		T50	19		T195	10
valid_sources[0x06]	107093	1		T48	30		T53	1		T54	3
valid_sources[0x07]	162529	1		T48	46		T49	88		T137	1
valid_sources[0x08]	119320	1		T48	37		T53	3		T195	13
valid_sources[0x09]	116908	1		T48	25		T53	4		T195	14
valid_sources[0x0a]	85753	1		T48	22		T53	6		T50	28
valid_sources[0x0b]	99156	1		T48	25		T53	1		T138	1
valid_sources[0x0c]	93053	1		T48	18		T53	3		T138	2
valid_sources[0x0d]	114202	1		T48	15		T195	13		T236	195
valid_sources[0x0e]	92284	1		T48	34		T54	1		T50	10
valid_sources[0x0f]	87609	1		T48	28		T53	4		T54	7
valid_sources[0x10]	87699	1		T48	27		T54	2		T137	1
valid_sources[0x11]	89368	1		T48	28		T54	1		T50	22
valid_sources[0x12]	98879	1		T48	30		T54	2		T50	17
valid_sources[0x13]	101273	1		T48	27		T54	4		T50	33
valid_sources[0x14]	103707	1		T48	51		T53	2		T137	1
valid_sources[0x15]	93975	1		T48	29		T53	3		T54	1
valid_sources[0x16]	101642	1		T48	20		T54	2		T50	16
valid_sources[0x17]	85726	1		T48	49		T50	24		T195	15
valid_sources[0x18]	106965	1		T48	22		T53	1		T54	1
valid_sources[0x19]	87358	1		T48	29		T49	321		T53	1
valid_sources[0x1a]	110420	1		T48	42		T53	2		T56	1
valid_sources[0x1b]	86054	1		T48	29		T53	2		T137	2
valid_sources[0x1c]	87922	1		T48	20		T54	3		T55	1
valid_sources[0x1d]	86429	1		T48	38		T50	7		T195	17
valid_sources[0x1e]	106555	1		T48	38		T57	7		T195	17
valid_sources[0x1f]	86303	1		T48	52		T53	1		T54	2
valid_sources[0x20]	85597	1		T48	39		T54	7		T195	13
valid_sources[0x21]	104906	1		T48	26		T50	18		T195	10
valid_sources[0x22]	85509	1		T48	29		T53	3		T54	1
valid_sources[0x23]	90299	1		T48	46		T53	1		T54	4
valid_sources[0x24]	86543	1		T48	27		T53	2		T138	1
valid_sources[0x25]	88890	1		T48	41		T53	3		T54	7
valid_sources[0x26]	84717	1		T48	39		T53	1		T137	1
valid_sources[0x27]	135281	1		T48	15		T54	9		T137	1
valid_sources[0x28]	88795	1		T48	38		T53	7		T54	1
valid_sources[0x29]	255382	1		T48	43		T54	5		T137	1
valid_sources[0x2a]	85366	1		T48	28		T54	1		T57	27
valid_sources[0x2b]	90678	1		T48	44		T53	1		T54	1
valid_sources[0x2c]	512594	1		T48	29		T54	1		T50	8
valid_sources[0x2d]	86015	1		T48	32		T54	1		T195	16
valid_sources[0x2e]	263452	1		T48	22		T55	1		T50	25
valid_sources[0x2f]	87045	1		T48	33		T50	17		T195	18
valid_sources[0x30]	88376	1		T48	27		T54	2		T50	20
valid_sources[0x31]	100146	1		T48	25		T54	3		T50	42
valid_sources[0x32]	157203	1		T48	26		T53	4		T54	5
valid_sources[0x33]	88954	1		T48	50		T53	1		T54	1
valid_sources[0x34]	119104	1		T48	37		T53	4		T54	2
valid_sources[0x35]	175797	1		T48	18		T54	4		T195	10
valid_sources[0x36]	106195	1		T48	34		T53	1		T138	107
valid_sources[0x37]	86554	1		T48	33		T53	1		T195	15
valid_sources[0x38]	106258	1		T48	24		T54	2		T50	5
valid_sources[0x39]	141477	1		T48	33		T54	1		T195	18
valid_sources[0x3a]	86379	1		T48	50		T54	2		T195	10
valid_sources[0x3b]	92146	1		T48	25		T53	2		T54	1
valid_sources[0x3c]	209215	1		T48	43		T53	4		T50	22
valid_sources[0x3d]	103344	1		T48	32		T138	1		T50	2
valid_sources[0x3e]	139346	1		T48	28		T49	83		T54	10
valid_sources[0x3f]	85661	1		T48	24		T53	2		T54	3
valid_sources[0x40]	90635	1		T48	30		T53	4		T54	1
valid_sources[0x41]	85865	1		T48	23		T137	1		T195	17
valid_sources[0x42]	87885	1		T48	22		T53	1		T137	1
valid_sources[0x43]	85840	1		T48	41		T54	1		T137	1
valid_sources[0x44]	86479	1		T48	21		T53	1		T54	4
valid_sources[0x45]	87633	1		T48	35		T53	5		T54	4
valid_sources[0x46]	85279	1		T48	24		T53	2		T54	1
valid_sources[0x47]	101712	1		T48	28		T53	2		T54	2
valid_sources[0x48]	128031	1		T48	27		T54	1		T138	3
valid_sources[0x49]	110030	1		T48	27		T53	4		T50	4
valid_sources[0x4a]	86155	1		T48	41		T54	7		T137	1
valid_sources[0x4b]	115151	1		T48	24		T54	2		T195	13
valid_sources[0x4c]	94477	1		T48	30		T54	5		T50	6
valid_sources[0x4d]	85308	1		T48	37		T54	3		T50	9
valid_sources[0x4e]	88041	1		T48	30		T53	2		T54	3
valid_sources[0x4f]	112140	1		T48	23		T54	2		T195	11
valid_sources[0x50]	88405	1		T48	35		T53	1		T54	2
valid_sources[0x51]	228600	1		T48	35		T53	2		T54	5
valid_sources[0x52]	131941	1		T48	19		T53	4		T195	17
valid_sources[0x53]	111010	1		T48	20		T53	2		T56	2
valid_sources[0x54]	85670	1		T48	40		T53	1		T54	9
valid_sources[0x55]	109308	1		T48	20		T53	2		T50	3
valid_sources[0x56]	89160	1		T48	25		T138	3		T195	10
valid_sources[0x57]	86659	1		T48	37		T54	2		T50	13
valid_sources[0x58]	256015	1		T48	35		T53	1		T54	2
valid_sources[0x59]	133417	1		T48	41		T53	1		T54	5
valid_sources[0x5a]	87330	1		T48	28		T53	12		T50	12
valid_sources[0x5b]	85750	1		T48	43		T53	6		T50	46
valid_sources[0x5c]	108429	1		T48	54		T195	14		T196	2
valid_sources[0x5d]	100708	1		T48	30		T50	6		T195	16
valid_sources[0x5e]	115661	1		T48	27		T50	7		T195	14
valid_sources[0x5f]	87526	1		T48	28		T53	2		T195	18
valid_sources[0x60]	86076	1		T48	17		T53	1		T54	2
valid_sources[0x61]	87473	1		T48	26		T54	2		T195	12
valid_sources[0x62]	88191	1		T48	31		T50	18		T195	13
valid_sources[0x63]	252491	1		T48	24		T50	36		T195	20
valid_sources[0x64]	160577	1		T48	38		T53	1		T54	10
valid_sources[0x65]	87990	1		T48	41		T53	1		T54	3
valid_sources[0x66]	87732	1		T48	20		T53	2		T195	7
valid_sources[0x67]	86351	1		T48	33		T195	18		T236	39
valid_sources[0x68]	87542	1		T48	20		T50	2		T195	14
valid_sources[0x69]	85237	1		T48	20		T50	16		T195	24
valid_sources[0x6a]	85632	1		T48	26		T50	2		T195	17
valid_sources[0x6b]	105518	1		T48	38		T53	1		T195	23
valid_sources[0x6c]	125908	1		T48	28		T195	9		T237	54
valid_sources[0x6d]	112904	1		T48	44		T51	18		T137	1
valid_sources[0x6e]	86593	1		T48	20		T54	2		T138	1
valid_sources[0x6f]	91380	1		T48	24		T50	44		T195	21
valid_sources[0x70]	88202	1		T48	42		T50	11		T195	15
valid_sources[0x71]	87490	1		T48	29		T53	2		T54	1
valid_sources[0x72]	88980	1		T48	29		T53	3		T54	1
valid_sources[0x73]	86983	1		T48	27		T50	26		T195	19
valid_sources[0x74]	87830	1		T48	36		T53	2		T137	2
valid_sources[0x75]	102754	1		T48	27		T53	3		T54	2
valid_sources[0x76]	217314	1		T48	38		T54	1		T56	2
valid_sources[0x77]	133541	1		T48	44		T53	2		T50	27
valid_sources[0x78]	121078	1		T48	27		T53	2		T54	3
valid_sources[0x79]	91282	1		T48	26		T53	1		T195	24
valid_sources[0x7a]	87828	1		T48	47		T137	2		T50	8
valid_sources[0x7b]	86974	1		T48	28		T137	1		T50	9
valid_sources[0x7c]	86701	1		T48	33		T54	2		T50	34
valid_sources[0x7d]	87068	1		T48	33		T54	1		T195	13
valid_sources[0x7e]	104489	1		T48	33		T54	3		T195	19
valid_sources[0x7f]	90383	1		T48	24		T137	1		T195	19
valid_sources[0x80]	123475	1		T48	37		T137	2		T50	35

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3556237

1

T48

494

T49

176

T51

1

values[0x0]

all_enables

biggest_size

1713888

1

T16

21

T48

684

T49

164

values[0x1]

all_enables

biggest_size

1557986

1

T16

18

T48

637

T49

185

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	1934	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4207740	1		T48	2		T49	355		T53	403

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	4202705	1		T48	11		T49	96		T53	89
values[0x0]	2766	1		T48	2		T49	134		T53	161
values[0x1]	4203	1		T48	6		T49	188		T53	195

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	772	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4208902	1		T48	10		T49	400		T53	430

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	16137	1		T49	12		T54	2		T138	1
valid_sources[0x01]	16085	1		T49	15		T138	2		T147	1
valid_sources[0x02]	16270	1		T54	1		T138	2		T144	2
valid_sources[0x03]	16771	1		T330	1		T146	3		T147	13
valid_sources[0x04]	16527	1		T54	1		T138	2		T141	1
valid_sources[0x05]	16025	1		T141	3		T144	4		T330	2
valid_sources[0x06]	16522	1		T138	1		T141	1		T144	2
valid_sources[0x07]	15993	1		T54	1		T138	3		T141	1
valid_sources[0x08]	16710	1		T54	1		T141	1		T144	2
valid_sources[0x09]	16788	1		T54	2		T138	1		T141	2
valid_sources[0x0a]	16211	1		T54	1		T147	4		T1	188
valid_sources[0x0b]	16623	1		T138	1		T141	2		T1	169
valid_sources[0x0c]	16131	1		T54	1		T138	1		T141	1
valid_sources[0x0d]	16244	1		T54	1		T138	3		T141	2
valid_sources[0x0e]	16729	1		T54	1		T138	1		T144	2
valid_sources[0x0f]	16605	1		T49	6		T138	1		T144	3
valid_sources[0x10]	16155	1		T54	1		T138	3		T141	2
valid_sources[0x11]	15874	1		T54	2		T138	1		T147	3
valid_sources[0x12]	16277	1		T138	1		T144	3		T146	3
valid_sources[0x13]	16448	1		T54	1		T138	1		T141	1
valid_sources[0x14]	16301	1		T138	1		T141	1		T144	3
valid_sources[0x15]	16556	1		T49	2		T54	3		T141	1
valid_sources[0x16]	16736	1		T54	8		T138	1		T144	3
valid_sources[0x17]	16285	1		T49	7		T54	2		T144	2
valid_sources[0x18]	16699	1		T54	1		T138	1		T195	8
valid_sources[0x19]	16700	1		T54	1		T141	3		T144	2
valid_sources[0x1a]	16748	1		T141	1		T144	1		T330	1
valid_sources[0x1b]	16272	1		T138	2		T141	2		T146	4
valid_sources[0x1c]	16577	1		T54	2		T138	3		T141	2
valid_sources[0x1d]	16690	1		T54	1		T138	1		T140	10
valid_sources[0x1e]	16415	1		T138	3		T141	1		T144	6
valid_sources[0x1f]	16456	1		T49	6		T54	2		T138	1
valid_sources[0x20]	16248	1		T54	1		T144	6		T1	147
valid_sources[0x21]	16133	1		T140	3		T141	1		T144	3
valid_sources[0x22]	16810	1		T138	1		T141	1		T144	7
valid_sources[0x23]	16611	1		T54	2		T138	2		T144	6
valid_sources[0x24]	16289	1		T49	5		T138	3		T141	2
valid_sources[0x25]	16249	1		T54	2		T138	3		T141	3
valid_sources[0x26]	16237	1		T138	2		T141	2		T144	7
valid_sources[0x27]	16658	1		T138	3		T144	1		T147	2
valid_sources[0x28]	16368	1		T49	3		T54	1		T138	5
valid_sources[0x29]	16374	1		T49	9		T138	1		T141	1
valid_sources[0x2a]	16785	1		T138	3		T145	1		T1	200
valid_sources[0x2b]	16695	1		T54	1		T138	1		T141	2
valid_sources[0x2c]	16702	1		T144	6		T146	1		T1	235
valid_sources[0x2d]	16161	1		T138	1		T144	1		T145	5
valid_sources[0x2e]	17147	1		T141	1		T144	6		T330	1
valid_sources[0x2f]	16571	1		T330	1		T145	10		T1	120
valid_sources[0x30]	16358	1		T49	3		T54	2		T138	1
valid_sources[0x31]	16364	1		T141	1		T144	4		T145	7
valid_sources[0x32]	16512	1		T54	3		T138	2		T141	1
valid_sources[0x33]	16242	1		T48	1		T138	2		T144	1
valid_sources[0x34]	16694	1		T54	2		T138	3		T141	2
valid_sources[0x35]	16731	1		T54	2		T138	3		T141	1
valid_sources[0x36]	16503	1		T49	1		T54	1		T144	3
valid_sources[0x37]	16511	1		T49	2		T146	1		T1	147
valid_sources[0x38]	16247	1		T49	7		T54	3		T138	1
valid_sources[0x39]	16557	1		T138	1		T144	2		T1	119
valid_sources[0x3a]	16456	1		T54	4		T144	2		T147	1
valid_sources[0x3b]	16274	1		T49	3		T54	1		T138	1
valid_sources[0x3c]	16545	1		T141	1		T144	4		T146	2
valid_sources[0x3d]	16003	1		T138	4		T141	2		T144	2
valid_sources[0x3e]	16365	1		T54	1		T138	1		T144	3
valid_sources[0x3f]	16792	1		T54	1		T138	2		T144	4
valid_sources[0x40]	16490	1		T54	1		T138	3		T141	1
valid_sources[0x41]	16276	1		T138	2		T144	3		T146	1
valid_sources[0x42]	16300	1		T54	3		T138	2		T146	1
valid_sources[0x43]	16162	1		T54	1		T144	1		T147	1
valid_sources[0x44]	16563	1		T48	1		T54	1		T138	2
valid_sources[0x45]	16257	1		T54	3		T138	2		T144	3
valid_sources[0x46]	16541	1		T54	1		T138	2		T141	1
valid_sources[0x47]	16478	1		T138	2		T141	1		T144	6
valid_sources[0x48]	16259	1		T54	1		T138	1		T144	4
valid_sources[0x49]	16150	1		T54	2		T138	2		T144	7
valid_sources[0x4a]	16385	1		T49	17		T54	2		T144	2
valid_sources[0x4b]	15840	1		T54	2		T140	22		T144	1
valid_sources[0x4c]	16783	1		T138	1		T141	2		T143	1
valid_sources[0x4d]	16200	1		T49	15		T54	1		T144	2
valid_sources[0x4e]	16304	1		T49	1		T54	1		T138	2
valid_sources[0x4f]	16586	1		T54	1		T138	1		T144	6
valid_sources[0x50]	16839	1		T54	2		T138	1		T141	1
valid_sources[0x51]	16820	1		T54	1		T144	1		T147	2
valid_sources[0x52]	16466	1		T54	1		T138	2		T144	2
valid_sources[0x53]	16139	1		T49	4		T54	1		T138	1
valid_sources[0x54]	16842	1		T141	2		T144	2		T146	1
valid_sources[0x55]	16688	1		T54	2		T138	1		T141	2
valid_sources[0x56]	16484	1		T49	8		T54	1		T138	1
valid_sources[0x57]	16744	1		T54	2		T141	1		T145	4
valid_sources[0x58]	16316	1		T138	1		T141	1		T330	1
valid_sources[0x59]	16935	1		T54	1		T144	2		T147	1
valid_sources[0x5a]	16703	1		T54	3		T141	1		T144	1
valid_sources[0x5b]	16120	1		T54	1		T1	162		T8	86
valid_sources[0x5c]	16303	1		T49	6		T138	2		T147	1
valid_sources[0x5d]	16832	1		T54	2		T138	1		T139	167
valid_sources[0x5e]	16447	1		T49	17		T54	1		T138	2
valid_sources[0x5f]	16812	1		T49	8		T54	3		T138	2
valid_sources[0x60]	16121	1		T138	1		T141	2		T147	7
valid_sources[0x61]	16676	1		T48	1		T54	1		T141	1
valid_sources[0x62]	16506	1		T49	15		T54	1		T138	2
valid_sources[0x63]	16609	1		T49	3		T54	2		T138	1
valid_sources[0x64]	16113	1		T54	3		T138	2		T144	2
valid_sources[0x65]	16387	1		T138	1		T144	7		T1	200
valid_sources[0x66]	16820	1		T138	2		T141	1		T144	1
valid_sources[0x67]	16959	1		T1	142		T8	69		T24	77
valid_sources[0x68]	16534	1		T49	2		T54	2		T138	2
valid_sources[0x69]	16611	1		T48	3		T54	1		T138	3
valid_sources[0x6a]	16221	1		T138	1		T141	1		T330	1
valid_sources[0x6b]	16805	1		T138	1		T144	3		T1	176
valid_sources[0x6c]	16337	1		T138	1		T141	1		T144	4
valid_sources[0x6d]	16607	1		T54	4		T138	1		T144	2
valid_sources[0x6e]	16465	1		T54	4		T330	1		T145	3
valid_sources[0x6f]	16381	1		T54	1		T144	2		T1	139
valid_sources[0x70]	16362	1		T54	1		T138	1		T141	1
valid_sources[0x71]	16168	1		T138	1		T141	2		T144	1
valid_sources[0x72]	15982	1		T48	1		T54	1		T138	3
valid_sources[0x73]	16696	1		T54	1		T138	1		T141	1
valid_sources[0x74]	16284	1		T49	7		T54	1		T141	1
valid_sources[0x75]	16353	1		T138	1		T141	2		T143	1
valid_sources[0x76]	16217	1		T49	1		T54	1		T1	231
valid_sources[0x77]	16590	1		T138	1		T144	1		T145	13
valid_sources[0x78]	16518	1		T54	1		T138	1		T141	1
valid_sources[0x79]	16386	1		T49	1		T54	1		T138	1
valid_sources[0x7a]	16393	1		T49	2		T138	1		T141	2
valid_sources[0x7b]	16333	1		T49	13		T138	2		T141	2
valid_sources[0x7c]	16523	1		T138	2		T144	1		T145	3
valid_sources[0x7d]	16837	1		T54	1		T138	1		T141	1
valid_sources[0x7e]	16574	1		T54	2		T138	3		T144	5
valid_sources[0x7f]	16666	1		T54	2		T138	1		T141	1
valid_sources[0x80]	16703	1		T54	1		T138	1		T144	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

4202596

1

T48

1

T49

96

T53

89

values[0x0]

all_enables

biggest_size

2555

1

T48

1

T49

128

T53

158

values[0x1]

all_enables

biggest_size

2589

1

T49

131

T53

156

T54

74

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	29708	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	30545	1		T48	394		T49	186		T53	130

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	36868	1		T48	867		T49	145		T53	30
values[0x0]	11538	1		T48	224		T49	69		T53	51
values[0x1]	11847	1		T48	206		T49	76		T53	61

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	21330	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	38923	1		T48	738		T49	221		T53	137

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	233	1		T195	3		T236	13		T237	8
valid_sources[0x01]	283	1		T236	27		T237	9		T139	1
valid_sources[0x02]	450	1		T53	1		T195	3		T236	15
valid_sources[0x03]	158	1		T236	24		T237	13		T139	2
valid_sources[0x04]	249	1		T54	3		T195	1		T236	10
valid_sources[0x05]	227	1		T49	49		T53	1		T195	6
valid_sources[0x06]	178	1		T236	19		T237	14		T139	2
valid_sources[0x07]	193	1		T53	1		T195	5		T236	24
valid_sources[0x08]	240	1		T236	21		T237	10		T139	1
valid_sources[0x09]	287	1		T49	1		T53	1		T195	6
valid_sources[0x0a]	192	1		T236	13		T237	10		T139	5
valid_sources[0x0b]	279	1		T53	2		T195	4		T236	18
valid_sources[0x0c]	286	1		T53	1		T236	22		T237	11
valid_sources[0x0d]	163	1		T236	22		T237	10		T140	1
valid_sources[0x0e]	227	1		T138	18		T195	2		T236	21
valid_sources[0x0f]	171	1		T236	26		T237	5		T143	1
valid_sources[0x10]	159	1		T53	1		T195	4		T236	14
valid_sources[0x11]	222	1		T236	12		T237	6		T139	4
valid_sources[0x12]	424	1		T53	1		T195	4		T236	18
valid_sources[0x13]	303	1		T195	2		T236	22		T237	9
valid_sources[0x14]	191	1		T54	3		T138	2		T195	1
valid_sources[0x15]	169	1		T195	3		T236	10		T237	10
valid_sources[0x16]	239	1		T53	1		T195	3		T236	22
valid_sources[0x17]	135	1		T53	1		T195	2		T236	13
valid_sources[0x18]	257	1		T53	1		T236	31		T237	7
valid_sources[0x19]	222	1		T53	1		T138	1		T195	3
valid_sources[0x1a]	198	1		T48	34		T53	1		T236	24
valid_sources[0x1b]	278	1		T195	2		T236	8		T237	16
valid_sources[0x1c]	193	1		T53	1		T195	9		T236	14
valid_sources[0x1d]	198	1		T48	27		T53	2		T138	6
valid_sources[0x1e]	190	1		T195	3		T236	24		T237	12
valid_sources[0x1f]	219	1		T53	2		T54	14		T195	4
valid_sources[0x20]	260	1		T48	66		T49	12		T53	1
valid_sources[0x21]	201	1		T53	1		T195	6		T236	15
valid_sources[0x22]	304	1		T48	36		T53	1		T236	33
valid_sources[0x23]	170	1		T236	21		T237	13		T139	2
valid_sources[0x24]	388	1		T53	1		T195	1		T236	18
valid_sources[0x25]	281	1		T48	64		T195	7		T236	21
valid_sources[0x26]	254	1		T53	1		T236	23		T237	19
valid_sources[0x27]	212	1		T53	1		T195	2		T236	22
valid_sources[0x28]	216	1		T195	2		T236	17		T237	11
valid_sources[0x29]	186	1		T195	4		T236	24		T237	8
valid_sources[0x2a]	146	1		T49	3		T54	4		T195	2
valid_sources[0x2b]	204	1		T236	19		T237	5		T139	2
valid_sources[0x2c]	243	1		T236	29		T237	11		T139	4
valid_sources[0x2d]	213	1		T195	4		T236	14		T237	12
valid_sources[0x2e]	183	1		T195	7		T236	11		T237	5
valid_sources[0x2f]	248	1		T138	3		T195	11		T236	15
valid_sources[0x30]	193	1		T53	1		T195	4		T236	13
valid_sources[0x31]	149	1		T195	2		T236	14		T237	14
valid_sources[0x32]	180	1		T53	1		T195	5		T236	11
valid_sources[0x33]	267	1		T236	21		T237	17		T139	7
valid_sources[0x34]	206	1		T138	2		T195	5		T236	19
valid_sources[0x35]	340	1		T48	136		T236	15		T139	4
valid_sources[0x36]	150	1		T195	7		T236	16		T237	19
valid_sources[0x37]	202	1		T54	9		T195	1		T236	23
valid_sources[0x38]	175	1		T53	2		T54	13		T236	12
valid_sources[0x39]	236	1		T195	1		T236	28		T237	9
valid_sources[0x3a]	135	1		T49	4		T195	2		T236	11
valid_sources[0x3b]	337	1		T53	1		T195	4		T236	14
valid_sources[0x3c]	213	1		T195	2		T236	19		T237	18
valid_sources[0x3d]	213	1		T195	3		T236	31		T237	14
valid_sources[0x3e]	168	1		T49	10		T53	1		T195	3
valid_sources[0x3f]	167	1		T53	1		T195	2		T236	20
valid_sources[0x40]	234	1		T49	7		T53	1		T236	13
valid_sources[0x41]	348	1		T236	17		T237	10		T139	1
valid_sources[0x42]	567	1		T53	2		T195	1		T236	23
valid_sources[0x43]	154	1		T53	2		T195	1		T236	23
valid_sources[0x44]	202	1		T195	1		T236	18		T237	9
valid_sources[0x45]	208	1		T48	66		T53	1		T236	25
valid_sources[0x46]	166	1		T49	10		T53	2		T195	5
valid_sources[0x47]	254	1		T49	3		T195	1		T236	23
valid_sources[0x48]	409	1		T195	4		T236	23		T237	11
valid_sources[0x49]	294	1		T53	1		T54	5		T138	6
valid_sources[0x4a]	253	1		T195	6		T236	19		T237	10
valid_sources[0x4b]	223	1		T54	9		T195	2		T236	19
valid_sources[0x4c]	215	1		T236	25		T237	15		T145	71
valid_sources[0x4d]	165	1		T54	9		T236	16		T237	11
valid_sources[0x4e]	198	1		T195	5		T236	18		T237	13
valid_sources[0x4f]	303	1		T53	1		T236	13		T237	13
valid_sources[0x50]	150	1		T53	1		T236	17		T237	16
valid_sources[0x51]	199	1		T195	3		T236	19		T237	8
valid_sources[0x52]	227	1		T236	26		T237	22		T139	5
valid_sources[0x53]	208	1		T48	62		T53	2		T138	14
valid_sources[0x54]	153	1		T236	13		T237	5		T139	3
valid_sources[0x55]	190	1		T195	3		T236	10		T237	9
valid_sources[0x56]	169	1		T195	6		T236	15		T237	5
valid_sources[0x57]	310	1		T48	101		T195	12		T236	33
valid_sources[0x58]	225	1		T236	23		T237	14		T139	4
valid_sources[0x59]	197	1		T195	1		T236	20		T237	16
valid_sources[0x5a]	172	1		T53	2		T195	6		T236	15
valid_sources[0x5b]	238	1		T236	12		T237	13		T139	3
valid_sources[0x5c]	159	1		T54	7		T236	19		T237	10
valid_sources[0x5d]	234	1		T48	67		T195	7		T236	13
valid_sources[0x5e]	171	1		T195	1		T236	11		T237	3
valid_sources[0x5f]	152	1		T195	5		T236	17		T237	6
valid_sources[0x60]	179	1		T138	6		T236	8		T237	4
valid_sources[0x61]	135	1		T53	1		T236	17		T237	10
valid_sources[0x62]	224	1		T53	1		T236	18		T237	10
valid_sources[0x63]	320	1		T195	6		T236	17		T237	8
valid_sources[0x64]	162	1		T195	6		T236	20		T237	9
valid_sources[0x65]	269	1		T195	1		T236	22		T237	4
valid_sources[0x66]	155	1		T53	1		T236	23		T237	9
valid_sources[0x67]	213	1		T53	1		T236	11		T237	10
valid_sources[0x68]	215	1		T53	1		T195	3		T236	15
valid_sources[0x69]	264	1		T53	1		T236	17		T237	14
valid_sources[0x6a]	178	1		T53	2		T195	8		T236	15
valid_sources[0x6b]	148	1		T53	1		T236	14		T237	13
valid_sources[0x6c]	146	1		T53	1		T236	15		T237	13
valid_sources[0x6d]	321	1		T48	100		T195	13		T236	27
valid_sources[0x6e]	153	1		T195	1		T236	18		T237	21
valid_sources[0x6f]	247	1		T195	3		T236	20		T237	5
valid_sources[0x70]	286	1		T48	97		T53	1		T195	3
valid_sources[0x71]	288	1		T195	1		T236	23		T237	7
valid_sources[0x72]	435	1		T48	35		T53	1		T195	4
valid_sources[0x73]	212	1		T53	1		T195	1		T236	24
valid_sources[0x74]	180	1		T236	19		T237	17		T139	2
valid_sources[0x75]	246	1		T53	1		T195	7		T236	17
valid_sources[0x76]	151	1		T195	5		T236	18		T237	6
valid_sources[0x77]	273	1		T53	1		T236	23		T237	9
valid_sources[0x78]	196	1		T53	1		T195	3		T236	14
valid_sources[0x79]	461	1		T53	1		T195	2		T236	16
valid_sources[0x7a]	158	1		T195	3		T236	19		T237	14
valid_sources[0x7b]	329	1		T48	34		T195	4		T236	24
valid_sources[0x7c]	265	1		T236	18		T237	7		T139	3
valid_sources[0x7d]	163	1		T53	2		T195	1		T236	26
valid_sources[0x7e]	213	1		T49	49		T53	2		T195	5
valid_sources[0x7f]	272	1		T48	35		T195	16		T236	12
valid_sources[0x80]	353	1		T236	15		T237	12		T139	3