Summary for Variable instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for instr_type_cp
Bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
others |
4104 |
1 |
|
T2 |
212 |
|
T12 |
280 |
|
T5 |
6 |
instr_types[0] |
4130 |
1 |
|
T2 |
164 |
|
T12 |
329 |
|
T17 |
25 |
instr_types[1] |
29843 |
1 |
|
T2 |
1617 |
|
T12 |
1358 |
|
T5 |
14 |
Summary for Variable key_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for key_cp
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER |
[auto[1]] |
0 |
1 |
1 |
Covered bins
NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
38077 |
1 |
|
T2 |
1993 |
|
T12 |
1967 |
|
T5 |
20 |
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
6 |
3 |
3 |
50.00 |
3 |
Automatically Generated Cross Bins for key_instr_cross
Element holes
key_cp | instr_type_cp | COUNT | AT LEAST | NUMBER |
[auto[1]] |
* |
-- |
-- |
3 |
Covered bins
key_cp | instr_type_cp | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
others |
4104 |
1 |
|
T2 |
212 |
|
T12 |
280 |
|
T5 |
6 |
auto[0] |
instr_types[0] |
4130 |
1 |
|
T2 |
164 |
|
T12 |
329 |
|
T17 |
25 |
auto[0] |
instr_types[1] |
29843 |
1 |
|
T2 |
1617 |
|
T12 |
1358 |
|
T5 |
14 |