Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T22 |
7 |
|
T56 |
11 |
|
T95 |
11 |
| others[1] |
187 |
1 |
|
T1 |
1 |
|
T20 |
1 |
|
T22 |
9 |
| others[2] |
223 |
1 |
|
T3 |
1 |
|
T8 |
1 |
|
T22 |
11 |
| others[3] |
361 |
1 |
|
T28 |
2 |
|
T22 |
14 |
|
T56 |
17 |
| false |
110 |
1 |
|
T28 |
1 |
|
T22 |
5 |
|
T56 |
3 |
| true |
12271 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
7780 |
1 |
|
T203 |
1 |
|
T114 |
1 |
|
T337 |
1 |
| others[1] |
1238 |
1 |
|
T128 |
1 |
|
T335 |
1 |
|
T338 |
1 |
| others[2] |
1228 |
1 |
|
T46 |
1 |
|
T120 |
1 |
|
T113 |
1 |
| others[3] |
2056 |
1 |
|
T48 |
1 |
|
T49 |
1 |
|
T50 |
1 |
| false |
644 |
1 |
|
T308 |
1 |
|
T123 |
1 |
|
T2 |
1 |
| true |
423 |
1 |
|
T1 |
1 |
|
T19 |
6 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
7682 |
1 |
|
T119 |
1 |
|
T128 |
1 |
|
T341 |
1 |
| others[1] |
1253 |
1 |
|
T120 |
1 |
|
T117 |
1 |
|
T334 |
1 |
| others[2] |
1308 |
1 |
|
T46 |
1 |
|
T131 |
1 |
|
T203 |
1 |
| others[3] |
2034 |
1 |
|
T48 |
1 |
|
T49 |
1 |
|
T50 |
1 |
| false |
671 |
1 |
|
T22 |
13 |
|
T26 |
2 |
|
T56 |
8 |
| true |
421 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
6 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
100 |
1 |
|
T2 |
1 |
|
T22 |
3 |
|
T56 |
3 |
| others[1] |
97 |
1 |
|
T22 |
8 |
|
T56 |
2 |
|
T95 |
2 |
| others[2] |
117 |
1 |
|
T2 |
1 |
|
T22 |
3 |
|
T56 |
3 |
| others[3] |
172 |
1 |
|
T22 |
3 |
|
T56 |
10 |
|
T95 |
10 |
| false |
44 |
1 |
|
T3 |
1 |
|
T28 |
1 |
|
T22 |
2 |
| true |
12839 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
240 |
1 |
|
T22 |
12 |
|
T51 |
1 |
|
T56 |
8 |
| others[1] |
239 |
1 |
|
T28 |
1 |
|
T22 |
9 |
|
T56 |
7 |
| others[2] |
247 |
1 |
|
T19 |
1 |
|
T22 |
8 |
|
T56 |
13 |
| others[3] |
417 |
1 |
|
T2 |
1 |
|
T19 |
4 |
|
T22 |
17 |
| false |
106 |
1 |
|
T19 |
1 |
|
T28 |
1 |
|
T22 |
8 |
| true |
12120 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
7597 |
1 |
|
T113 |
1 |
|
T254 |
1 |
|
T306 |
1 |
| others[1] |
1043 |
1 |
|
T114 |
1 |
|
T307 |
1 |
|
T123 |
1 |
| others[2] |
1068 |
1 |
|
T46 |
1 |
|
T50 |
1 |
|
T129 |
1 |
| others[3] |
1725 |
1 |
|
T48 |
1 |
|
T49 |
1 |
|
T119 |
1 |
| false |
586 |
1 |
|
T204 |
1 |
|
T334 |
1 |
|
T335 |
1 |
| true |
1350 |
1 |
|
T20 |
1 |
|
T8 |
1 |
|
T28 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
239 |
1 |
|
T19 |
1 |
|
T28 |
1 |
|
T22 |
6 |
| others[1] |
252 |
1 |
|
T19 |
1 |
|
T8 |
1 |
|
T28 |
2 |
| others[2] |
213 |
1 |
|
T19 |
3 |
|
T22 |
9 |
|
T51 |
1 |
| others[3] |
377 |
1 |
|
T28 |
2 |
|
T22 |
18 |
|
T56 |
14 |
| false |
124 |
1 |
|
T19 |
1 |
|
T20 |
1 |
|
T24 |
1 |
| true |
12164 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
223 |
1 |
|
T8 |
1 |
|
T22 |
8 |
|
T56 |
11 |
| others[1] |
234 |
1 |
|
T22 |
10 |
|
T56 |
12 |
|
T176 |
1 |
| others[2] |
233 |
1 |
|
T3 |
1 |
|
T28 |
1 |
|
T22 |
14 |
| others[3] |
367 |
1 |
|
T2 |
1 |
|
T22 |
21 |
|
T56 |
18 |
| false |
116 |
1 |
|
T1 |
1 |
|
T22 |
3 |
|
T33 |
1 |
| true |
12196 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
7719 |
1 |
|
T111 |
1 |
|
T128 |
1 |
|
T131 |
1 |
| others[1] |
1245 |
1 |
|
T48 |
1 |
|
T50 |
1 |
|
T119 |
1 |
| others[2] |
1289 |
1 |
|
T49 |
1 |
|
T203 |
1 |
|
T334 |
1 |
| others[3] |
2026 |
1 |
|
T46 |
1 |
|
T254 |
1 |
|
T337 |
1 |
| false |
657 |
1 |
|
T114 |
1 |
|
T2 |
2 |
|
T22 |
14 |
| true |
433 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
5 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1195 |
1 |
|
T120 |
1 |
|
T203 |
1 |
|
T308 |
1 |
| others[1] |
1251 |
1 |
|
T129 |
1 |
|
T113 |
1 |
|
T254 |
1 |
| others[2] |
1251 |
1 |
|
T50 |
1 |
|
T114 |
1 |
|
T332 |
1 |
| others[3] |
2076 |
1 |
|
T49 |
1 |
|
T119 |
1 |
|
T111 |
1 |
| false |
664 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T128 |
1 |
| true |
421 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
6 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
105 |
1 |
|
T22 |
4 |
|
T56 |
6 |
|
T95 |
3 |
| others[1] |
130 |
1 |
|
T2 |
1 |
|
T22 |
4 |
|
T56 |
4 |
| others[2] |
105 |
1 |
|
T22 |
4 |
|
T56 |
3 |
|
T95 |
3 |
| others[3] |
157 |
1 |
|
T28 |
1 |
|
T22 |
7 |
|
T56 |
7 |
| false |
58 |
1 |
|
T2 |
1 |
|
T28 |
1 |
|
T22 |
1 |
| true |
6303 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T19 |
1 |
|
T22 |
10 |
|
T56 |
9 |
| others[1] |
242 |
1 |
|
T2 |
1 |
|
T19 |
2 |
|
T28 |
1 |
| others[2] |
244 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
| others[3] |
365 |
1 |
|
T19 |
1 |
|
T28 |
1 |
|
T22 |
15 |
| false |
111 |
1 |
|
T1 |
1 |
|
T19 |
1 |
|
T22 |
1 |
| true |
5654 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1085 |
1 |
|
T48 |
1 |
|
T128 |
1 |
|
T306 |
1 |
| others[1] |
1078 |
1 |
|
T131 |
1 |
|
T114 |
1 |
|
T308 |
1 |
| others[2] |
1037 |
1 |
|
T49 |
1 |
|
T50 |
1 |
|
T111 |
1 |
| others[3] |
1750 |
1 |
|
T46 |
1 |
|
T119 |
1 |
|
T120 |
1 |
| false |
558 |
1 |
|
T113 |
1 |
|
T3 |
1 |
|
T22 |
9 |
| true |
1350 |
1 |
|
T1 |
1 |
|
T19 |
6 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T19 |
2 |
|
T20 |
1 |
|
T28 |
1 |
| others[1] |
248 |
1 |
|
T2 |
1 |
|
T19 |
1 |
|
T22 |
16 |
| others[2] |
217 |
1 |
|
T1 |
1 |
|
T28 |
1 |
|
T22 |
7 |
| others[3] |
376 |
1 |
|
T19 |
2 |
|
T28 |
2 |
|
T22 |
12 |
| false |
103 |
1 |
|
T19 |
1 |
|
T22 |
3 |
|
T33 |
1 |
| true |
5672 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T22 |
10 |
|
T56 |
10 |
|
T176 |
1 |
| others[1] |
254 |
1 |
|
T2 |
1 |
|
T28 |
1 |
|
T22 |
14 |
| others[2] |
233 |
1 |
|
T22 |
8 |
|
T33 |
1 |
|
T56 |
14 |
| others[3] |
381 |
1 |
|
T28 |
1 |
|
T22 |
13 |
|
T56 |
15 |
| false |
95 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T22 |
7 |
| true |
5666 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1214 |
1 |
|
T46 |
1 |
|
T129 |
1 |
|
T339 |
1 |
| others[1] |
1229 |
1 |
|
T48 |
1 |
|
T50 |
1 |
|
T128 |
1 |
| others[2] |
1279 |
1 |
|
T119 |
1 |
|
T120 |
1 |
|
T131 |
1 |
| others[3] |
2068 |
1 |
|
T49 |
1 |
|
T111 |
1 |
|
T114 |
1 |
| false |
617 |
1 |
|
T204 |
1 |
|
T338 |
1 |
|
T22 |
7 |
| true |
451 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
6 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1230 |
1 |
|
T111 |
1 |
|
T113 |
1 |
|
T308 |
1 |
| others[1] |
1239 |
1 |
|
T46 |
1 |
|
T120 |
1 |
|
T129 |
1 |
| others[2] |
1277 |
1 |
|
T50 |
1 |
|
T131 |
1 |
|
T203 |
1 |
| others[3] |
2061 |
1 |
|
T48 |
1 |
|
T49 |
1 |
|
T119 |
1 |
| false |
629 |
1 |
|
T128 |
1 |
|
T22 |
12 |
|
T26 |
2 |
| true |
422 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
6 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
108 |
1 |
|
T8 |
1 |
|
T22 |
3 |
|
T56 |
8 |
| others[1] |
108 |
1 |
|
T22 |
2 |
|
T56 |
4 |
|
T95 |
1 |
| others[2] |
96 |
1 |
|
T22 |
3 |
|
T56 |
4 |
|
T95 |
1 |
| others[3] |
175 |
1 |
|
T2 |
2 |
|
T22 |
6 |
|
T56 |
6 |
| false |
50 |
1 |
|
T22 |
2 |
|
T56 |
3 |
|
T95 |
3 |
| true |
6321 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
227 |
1 |
|
T2 |
1 |
|
T8 |
1 |
|
T22 |
3 |
| others[1] |
226 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T24 |
1 |
| others[2] |
236 |
1 |
|
T19 |
2 |
|
T22 |
11 |
|
T56 |
15 |
| others[3] |
408 |
1 |
|
T19 |
2 |
|
T28 |
1 |
|
T22 |
16 |
| false |
133 |
1 |
|
T19 |
1 |
|
T22 |
8 |
|
T56 |
2 |
| true |
5628 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1068 |
1 |
|
T111 |
1 |
|
T131 |
1 |
|
T204 |
1 |
| others[1] |
1093 |
1 |
|
T129 |
1 |
|
T203 |
1 |
|
T114 |
1 |
| others[2] |
1035 |
1 |
|
T46 |
1 |
|
T119 |
1 |
|
T120 |
1 |
| others[3] |
1740 |
1 |
|
T48 |
1 |
|
T49 |
1 |
|
T50 |
1 |
| false |
544 |
1 |
|
T308 |
1 |
|
T338 |
1 |
|
T19 |
2 |
| true |
1378 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
228 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T22 |
11 |
| others[1] |
230 |
1 |
|
T3 |
1 |
|
T28 |
1 |
|
T22 |
10 |
| others[2] |
220 |
1 |
|
T28 |
1 |
|
T24 |
1 |
|
T22 |
12 |
| others[3] |
413 |
1 |
|
T28 |
1 |
|
T22 |
17 |
|
T56 |
20 |
| false |
124 |
1 |
|
T22 |
5 |
|
T51 |
1 |
|
T56 |
5 |
| true |
5643 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T20 |
1 |
|
T22 |
9 |
|
T56 |
13 |
| others[1] |
205 |
1 |
|
T28 |
2 |
|
T22 |
7 |
|
T56 |
8 |
| others[2] |
227 |
1 |
|
T2 |
1 |
|
T22 |
8 |
|
T73 |
1 |
| others[3] |
398 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T22 |
24 |
| false |
140 |
1 |
|
T22 |
5 |
|
T56 |
4 |
|
T95 |
6 |
| true |
5659 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1248 |
1 |
|
T49 |
1 |
|
T119 |
1 |
|
T334 |
1 |
| others[1] |
1281 |
1 |
|
T120 |
1 |
|
T129 |
1 |
|
T248 |
1 |
| others[2] |
1206 |
1 |
|
T48 |
1 |
|
T111 |
1 |
|
T128 |
1 |
| others[3] |
2066 |
1 |
|
T46 |
1 |
|
T203 |
1 |
|
T113 |
1 |
| false |
615 |
1 |
|
T50 |
1 |
|
T308 |
1 |
|
T204 |
1 |
| true |
442 |
1 |
|
T1 |
1 |
|
T19 |
5 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1215 |
1 |
|
T111 |
1 |
|
T254 |
1 |
|
T338 |
1 |
| others[1] |
1248 |
1 |
|
T46 |
1 |
|
T50 |
1 |
|
T119 |
1 |
| others[2] |
1195 |
1 |
|
T48 |
1 |
|
T128 |
1 |
|
T131 |
1 |
| others[3] |
2098 |
1 |
|
T120 |
1 |
|
T337 |
1 |
|
T334 |
1 |
| false |
677 |
1 |
|
T49 |
1 |
|
T114 |
1 |
|
T340 |
1 |
| true |
425 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
6 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
98 |
1 |
|
T2 |
1 |
|
T22 |
4 |
|
T56 |
6 |
| others[1] |
96 |
1 |
|
T22 |
2 |
|
T95 |
2 |
|
T178 |
1 |
| others[2] |
95 |
1 |
|
T2 |
1 |
|
T22 |
4 |
|
T343 |
1 |
| others[3] |
162 |
1 |
|
T22 |
10 |
|
T56 |
8 |
|
T95 |
5 |
| false |
63 |
1 |
|
T22 |
2 |
|
T33 |
1 |
|
T178 |
1 |
| true |
6344 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
254 |
1 |
|
T2 |
1 |
|
T22 |
8 |
|
T73 |
1 |
| others[1] |
238 |
1 |
|
T20 |
1 |
|
T28 |
2 |
|
T22 |
9 |
| others[2] |
247 |
1 |
|
T22 |
10 |
|
T56 |
9 |
|
T57 |
1 |
| others[3] |
384 |
1 |
|
T3 |
1 |
|
T24 |
1 |
|
T22 |
18 |
| false |
95 |
1 |
|
T22 |
4 |
|
T56 |
4 |
|
T95 |
4 |
| true |
5640 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1008 |
1 |
|
T129 |
1 |
|
T204 |
1 |
|
T335 |
1 |
| others[1] |
1066 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T128 |
1 |
| others[2] |
1062 |
1 |
|
T50 |
1 |
|
T203 |
1 |
|
T334 |
1 |
| others[3] |
1783 |
1 |
|
T119 |
1 |
|
T120 |
1 |
|
T111 |
1 |
| false |
585 |
1 |
|
T49 |
1 |
|
T113 |
1 |
|
T254 |
1 |
| true |
1354 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
6 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T3 |
1 |
|
T28 |
1 |
|
T22 |
8 |
| others[1] |
220 |
1 |
|
T19 |
2 |
|
T22 |
8 |
|
T56 |
10 |
| others[2] |
226 |
1 |
|
T19 |
1 |
|
T22 |
9 |
|
T56 |
14 |
| others[3] |
366 |
1 |
|
T2 |
1 |
|
T19 |
3 |
|
T20 |
1 |
| false |
105 |
1 |
|
T22 |
5 |
|
T56 |
5 |
|
T95 |
4 |
| true |
5731 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
213 |
1 |
|
T28 |
1 |
|
T22 |
13 |
|
T56 |
6 |
| others[1] |
220 |
1 |
|
T28 |
2 |
|
T22 |
4 |
|
T56 |
10 |
| others[2] |
226 |
1 |
|
T22 |
10 |
|
T56 |
9 |
|
T95 |
6 |
| others[3] |
356 |
1 |
|
T20 |
1 |
|
T22 |
16 |
|
T73 |
1 |
| false |
106 |
1 |
|
T22 |
9 |
|
T56 |
5 |
|
T95 |
6 |
| true |
5737 |
1 |
|
T46 |
1 |
|
T48 |
1 |
|
T49 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1212 |
1 |
|
T50 |
1 |
|
T114 |
1 |
|
T308 |
1 |
| others[1] |
1281 |
1 |
|
T120 |
1 |
|
T131 |
1 |
|
T203 |
1 |
| others[2] |
1247 |
1 |
|
T46 |
1 |
|
T119 |
1 |
|
T113 |
1 |
| others[3] |
2068 |
1 |
|
T48 |
1 |
|
T49 |
1 |
|
T128 |
1 |
| false |
607 |
1 |
|
T111 |
1 |
|
T334 |
1 |
|
T332 |
1 |
| true |
443 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
5 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1261 |
1 |
|
T46 |
1 |
|
T50 |
1 |
|
T119 |
1 |
| others[1] |
1242 |
1 |
|
T131 |
1 |
|
T113 |
1 |
|
T204 |
1 |
| others[2] |
1275 |
1 |
|
T49 |
1 |
|
T129 |
1 |
|
T117 |
1 |
| others[3] |
2026 |
1 |
|
T48 |
1 |
|
T111 |
1 |
|
T308 |
1 |
| false |
623 |
1 |
|
T114 |
1 |
|
T340 |
1 |
|
T344 |
1 |
| true |
431 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
6 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |