Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_flash_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	20626610	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	7452383	1		T16	1		T42	945		T43	1133

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	23835037	1		T16	57		T42	2761		T43	568
values[0x0]	2120335	1		T42	517		T43	316		T46	22
values[0x1]	2123621	1		T42	517		T43	264		T46	23

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13796324	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	14282669	1		T16	24		T42	1851		T43	1138

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	125254	1		T42	31		T45	3		T44	5
valid_sources[0x01]	84235	1		T42	7		T43	3		T49	1
valid_sources[0x02]	103179	1		T42	4		T43	2		T49	1
valid_sources[0x03]	83375	1		T42	25		T45	1		T49	1
valid_sources[0x04]	115739	1		T16	3		T42	33		T43	41
valid_sources[0x05]	82947	1		T42	53		T43	4		T45	1
valid_sources[0x06]	86292	1		T42	17		T45	1		T44	2
valid_sources[0x07]	83250	1		T42	6		T44	10		T50	2
valid_sources[0x08]	82657	1		T42	16		T45	1		T44	3
valid_sources[0x09]	83249	1		T42	7		T44	5		T50	3
valid_sources[0x0a]	81671	1		T42	9		T43	8		T45	2
valid_sources[0x0b]	122109	1		T42	27		T49	1		T44	4
valid_sources[0x0c]	167297	1		T16	1		T42	13		T45	1
valid_sources[0x0d]	87286	1		T43	10		T46	4		T49	1
valid_sources[0x0e]	106573	1		T16	1		T42	18		T45	1
valid_sources[0x0f]	81560	1		T42	8		T44	6		T50	1
valid_sources[0x10]	99362	1		T42	15		T46	1		T48	1
valid_sources[0x11]	123316	1		T42	5		T46	2		T45	1
valid_sources[0x12]	83514	1		T42	22		T46	3		T44	11
valid_sources[0x13]	85721	1		T42	13		T46	3		T44	7
valid_sources[0x14]	92055	1		T42	3		T43	35		T46	5
valid_sources[0x15]	104797	1		T42	7		T44	4		T50	1
valid_sources[0x16]	82800	1		T42	19		T45	1		T49	1
valid_sources[0x17]	82386	1		T42	22		T45	2		T44	6
valid_sources[0x18]	91866	1		T42	7		T45	1		T49	2
valid_sources[0x19]	82529	1		T42	10		T43	6		T46	1
valid_sources[0x1a]	82504	1		T42	34		T43	1		T44	8
valid_sources[0x1b]	146268	1		T42	28		T44	4		T50	2
valid_sources[0x1c]	84294	1		T45	1		T49	1		T44	4
valid_sources[0x1d]	82999	1		T42	15		T45	2		T48	2
valid_sources[0x1e]	112304	1		T42	30		T49	3		T44	10
valid_sources[0x1f]	82458	1		T16	1		T42	5		T44	6
valid_sources[0x20]	81507	1		T42	15		T48	2		T49	2
valid_sources[0x21]	88423	1		T42	23		T45	1		T44	3
valid_sources[0x22]	82317	1		T42	21		T45	1		T44	3
valid_sources[0x23]	216409	1		T42	38		T43	31		T45	1
valid_sources[0x24]	84593	1		T42	20		T43	14		T46	1
valid_sources[0x25]	83846	1		T42	23		T46	2		T49	1
valid_sources[0x26]	107989	1		T42	46		T48	3		T44	11
valid_sources[0x27]	252261	1		T42	5		T48	3		T44	2
valid_sources[0x28]	85041	1		T42	33		T45	1		T44	3
valid_sources[0x29]	82351	1		T42	22		T49	2		T44	4
valid_sources[0x2a]	81423	1		T43	14		T47	1		T44	3
valid_sources[0x2b]	81820	1		T42	16		T43	1		T44	11
valid_sources[0x2c]	81565	1		T16	2		T42	32		T45	1
valid_sources[0x2d]	82778	1		T42	18		T45	3		T49	1
valid_sources[0x2e]	146080	1		T42	20		T49	1		T44	3
valid_sources[0x2f]	82924	1		T42	33		T45	2		T48	1
valid_sources[0x30]	82267	1		T42	27		T43	17		T45	1
valid_sources[0x31]	87402	1		T42	9		T45	1		T44	3
valid_sources[0x32]	81876	1		T16	4		T42	40		T48	1
valid_sources[0x33]	82943	1		T16	1		T42	18		T45	4
valid_sources[0x34]	156601	1		T42	9		T43	16		T45	1
valid_sources[0x35]	83711	1		T42	22		T46	3		T45	1
valid_sources[0x36]	106358	1		T45	1		T44	2		T50	2
valid_sources[0x37]	82030	1		T42	36		T47	2		T45	1
valid_sources[0x38]	99320	1		T42	20		T45	3		T44	5
valid_sources[0x39]	81838	1		T42	14		T45	2		T48	1
valid_sources[0x3a]	84372	1		T16	2		T42	10		T45	1
valid_sources[0x3b]	146222	1		T16	1		T42	7		T43	13
valid_sources[0x3c]	105230	1		T42	6		T43	34		T45	2
valid_sources[0x3d]	91540	1		T42	31		T46	2		T45	2
valid_sources[0x3e]	93200	1		T42	20		T45	3		T49	1
valid_sources[0x3f]	126414	1		T42	6		T43	9		T45	1
valid_sources[0x40]	1014790	1		T42	17		T43	4		T45	1
valid_sources[0x41]	82840	1		T16	1		T42	20		T43	20
valid_sources[0x42]	105007	1		T45	3		T44	5		T50	6
valid_sources[0x43]	204800	1		T42	10		T43	13		T44	2
valid_sources[0x44]	82996	1		T42	4		T46	1		T45	1
valid_sources[0x45]	83570	1		T42	30		T43	2		T44	4
valid_sources[0x46]	81867	1		T42	14		T45	1		T49	1
valid_sources[0x47]	98202	1		T16	1		T42	13		T45	1
valid_sources[0x48]	96883	1		T42	13		T43	8		T45	2
valid_sources[0x49]	89288	1		T42	31		T45	1		T48	1
valid_sources[0x4a]	163185	1		T43	26		T45	1		T48	2
valid_sources[0x4b]	103944	1		T42	1		T45	2		T48	3
valid_sources[0x4c]	85151	1		T42	7		T46	2		T45	3
valid_sources[0x4d]	125563	1		T42	8		T43	4		T46	7
valid_sources[0x4e]	83450	1		T42	20		T43	21		T45	2
valid_sources[0x4f]	82328	1		T42	4		T43	29		T45	1
valid_sources[0x50]	108198	1		T42	22		T44	8		T50	2
valid_sources[0x51]	83595	1		T42	8		T46	1		T44	4
valid_sources[0x52]	82637	1		T42	14		T43	14		T49	1
valid_sources[0x53]	80864	1		T42	7		T43	3		T45	1
valid_sources[0x54]	82394	1		T42	40		T45	1		T44	6
valid_sources[0x55]	82026	1		T42	4		T43	6		T45	1
valid_sources[0x56]	118163	1		T45	4		T48	2		T44	2
valid_sources[0x57]	82853	1		T42	1		T45	1		T49	2
valid_sources[0x58]	92281	1		T43	6		T45	1		T49	1
valid_sources[0x59]	82579	1		T16	1		T42	30		T44	6
valid_sources[0x5a]	82493	1		T42	1		T43	19		T48	5
valid_sources[0x5b]	83228	1		T42	10		T45	3		T44	8
valid_sources[0x5c]	84285	1		T42	8		T43	34		T46	1
valid_sources[0x5d]	109011	1		T42	6		T45	2		T44	2
valid_sources[0x5e]	130107	1		T16	1		T42	6		T43	14
valid_sources[0x5f]	85052	1		T42	13		T46	9		T45	4
valid_sources[0x60]	232240	1		T42	13		T45	3		T49	2
valid_sources[0x61]	81273	1		T16	1		T42	15		T43	7
valid_sources[0x62]	107267	1		T42	19		T45	1		T44	5
valid_sources[0x63]	83075	1		T42	20		T44	8		T50	2
valid_sources[0x64]	81678	1		T42	35		T45	1		T44	4
valid_sources[0x65]	82729	1		T42	7		T44	6		T50	2
valid_sources[0x66]	84378	1		T16	1		T42	12		T43	2
valid_sources[0x67]	81518	1		T42	26		T43	3		T45	1
valid_sources[0x68]	86119	1		T42	8		T46	2		T45	2
valid_sources[0x69]	81597	1		T16	1		T42	10		T44	5
valid_sources[0x6a]	118527	1		T42	1		T49	1		T44	4
valid_sources[0x6b]	81168	1		T16	1		T42	20		T44	4
valid_sources[0x6c]	83760	1		T42	8		T46	2		T45	3
valid_sources[0x6d]	106479	1		T42	3		T46	1		T45	2
valid_sources[0x6e]	82619	1		T42	29		T45	1		T44	5
valid_sources[0x6f]	82650	1		T42	11		T46	12		T45	1
valid_sources[0x70]	86174	1		T42	5		T45	1		T48	4
valid_sources[0x71]	83003	1		T42	10		T46	5		T48	5
valid_sources[0x72]	83264	1		T42	5		T44	2		T50	1
valid_sources[0x73]	82092	1		T46	1		T45	1		T49	2
valid_sources[0x74]	119701	1		T42	11		T43	9		T46	1
valid_sources[0x75]	101239	1		T49	1		T44	3		T50	2
valid_sources[0x76]	81838	1		T42	11		T45	1		T49	1
valid_sources[0x77]	82011	1		T16	1		T42	29		T43	11
valid_sources[0x78]	84016	1		T42	6		T46	9		T45	3
valid_sources[0x79]	128115	1		T16	2		T43	15		T45	1
valid_sources[0x7a]	102737	1		T42	14		T49	1		T44	2
valid_sources[0x7b]	128920	1		T42	9		T47	1		T45	2
valid_sources[0x7c]	82161	1		T42	6		T45	1		T44	6
valid_sources[0x7d]	103525	1		T42	22		T45	1		T48	2
valid_sources[0x7e]	82743	1		T42	11		T46	4		T45	1
valid_sources[0x7f]	82319	1		T16	1		T42	14		T43	27
valid_sources[0x80]	83178	1		T42	16		T43	6		T45	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3792355

1

T16

1

T42

272

T43

553

values[0x0]

all_enables

biggest_size

1912547

1

T42

362

T43

316

T46

21

values[0x1]

all_enables

biggest_size

1747481

1

T42

311

T43

264

T46

18

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	1500	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	4471948	1		T42	1		T45	22		T50	316

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	4466595	1		T42	1		T45	5		T50	79
values[0x0]	2882	1		T42	2		T45	10		T50	141
values[0x1]	3971	1		T42	4		T45	15		T50	137

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	562	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	4472886	1		T42	5		T45	26		T50	344

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	16175	1		T114	2		T118	1		T127	4
valid_sources[0x01]	16546	1		T114	1		T123	1		T125	1
valid_sources[0x02]	16580	1		T50	1		T114	1		T116	1
valid_sources[0x03]	16324	1		T114	2		T123	2		T125	4
valid_sources[0x04]	16526	1		T50	3		T123	1		T125	1
valid_sources[0x05]	16377	1		T194	3		T123	1		T125	2
valid_sources[0x06]	16284	1		T45	1		T123	1		T127	3
valid_sources[0x07]	16312	1		T50	2		T125	2		T126	2
valid_sources[0x08]	16266	1		T50	5		T114	1		T125	1
valid_sources[0x09]	16617	1		T114	2		T117	75		T123	1
valid_sources[0x0a]	16186	1		T50	2		T125	3		T126	3
valid_sources[0x0b]	16895	1		T114	1		T123	1		T126	2
valid_sources[0x0c]	15931	1		T118	1		T126	2		T127	2
valid_sources[0x0d]	16360	1		T114	1		T125	1		T127	3
valid_sources[0x0e]	16189	1		T114	4		T123	1		T125	7
valid_sources[0x0f]	16055	1		T114	1		T125	3		T3	40
valid_sources[0x10]	16517	1		T118	1		T125	3		T126	1
valid_sources[0x11]	16502	1		T45	1		T50	4		T116	4
valid_sources[0x12]	16346	1		T50	1		T126	1		T127	4
valid_sources[0x13]	16227	1		T50	4		T114	1		T123	3
valid_sources[0x14]	16255	1		T45	1		T112	1		T123	1
valid_sources[0x15]	16291	1		T114	1		T125	3		T126	4
valid_sources[0x16]	16665	1		T50	1		T116	5		T125	2
valid_sources[0x17]	16357	1		T123	1		T125	2		T3	70
valid_sources[0x18]	16383	1		T50	3		T112	1		T114	1
valid_sources[0x19]	16628	1		T118	1		T126	9		T127	2
valid_sources[0x1a]	16692	1		T116	2		T239	1		T125	4
valid_sources[0x1b]	16550	1		T45	1		T114	1		T118	1
valid_sources[0x1c]	16152	1		T50	7		T115	14		T125	1
valid_sources[0x1d]	17053	1		T114	1		T240	5		T125	5
valid_sources[0x1e]	16474	1		T125	6		T127	2		T3	39
valid_sources[0x1f]	16329	1		T45	1		T123	2		T125	2
valid_sources[0x20]	16461	1		T114	1		T118	1		T123	1
valid_sources[0x21]	16706	1		T112	2		T114	1		T123	4
valid_sources[0x22]	16517	1		T50	1		T114	1		T118	1
valid_sources[0x23]	16377	1		T125	1		T126	3		T127	1
valid_sources[0x24]	16367	1		T50	6		T112	1		T125	1
valid_sources[0x25]	16624	1		T252	1		T125	1		T126	1
valid_sources[0x26]	16107	1		T50	4		T238	1		T125	8
valid_sources[0x27]	16518	1		T116	1		T127	6		T3	76
valid_sources[0x28]	16371	1		T50	4		T118	1		T127	2
valid_sources[0x29]	16585	1		T112	1		T114	2		T115	22
valid_sources[0x2a]	16530	1		T112	1		T114	4		T126	2
valid_sources[0x2b]	16138	1		T114	1		T123	1		T125	1
valid_sources[0x2c]	16307	1		T114	1		T125	1		T127	2
valid_sources[0x2d]	16808	1		T126	3		T3	59		T8	169
valid_sources[0x2e]	16070	1		T50	4		T116	1		T125	1
valid_sources[0x2f]	16149	1		T50	2		T114	3		T240	1
valid_sources[0x30]	16313	1		T50	2		T123	2		T125	6
valid_sources[0x31]	16443	1		T50	14		T114	2		T123	1
valid_sources[0x32]	16286	1		T50	7		T118	1		T123	1
valid_sources[0x33]	16375	1		T114	1		T123	2		T125	4
valid_sources[0x34]	16873	1		T50	3		T114	1		T126	1
valid_sources[0x35]	15891	1		T50	2		T114	1		T123	1
valid_sources[0x36]	16885	1		T50	17		T112	6		T114	1
valid_sources[0x37]	16572	1		T118	1		T125	1		T126	1
valid_sources[0x38]	16587	1		T45	1		T124	146		T127	3
valid_sources[0x39]	16788	1		T50	3		T111	174		T126	4
valid_sources[0x3a]	17526	1		T118	1		T125	1		T127	3
valid_sources[0x3b]	16485	1		T116	1		T118	1		T125	2
valid_sources[0x3c]	16215	1		T45	1		T114	1		T123	1
valid_sources[0x3d]	16582	1		T45	1		T237	16		T118	1
valid_sources[0x3e]	16584	1		T50	4		T127	6		T3	32
valid_sources[0x3f]	16941	1		T123	2		T126	1		T127	1
valid_sources[0x40]	16448	1		T50	10		T116	3		T125	1
valid_sources[0x41]	16386	1		T114	1		T118	1		T123	2
valid_sources[0x42]	16827	1		T114	2		T3	73		T8	154
valid_sources[0x43]	16418	1		T114	3		T118	2		T126	1
valid_sources[0x44]	17022	1		T194	1		T114	4		T125	1
valid_sources[0x45]	16482	1		T50	1		T112	1		T114	2
valid_sources[0x46]	16011	1		T50	3		T125	1		T126	2
valid_sources[0x47]	16187	1		T50	2		T114	1		T118	2
valid_sources[0x48]	16343	1		T50	6		T118	1		T123	3
valid_sources[0x49]	16643	1		T50	4		T114	2		T127	2
valid_sources[0x4a]	17061	1		T114	2		T240	2		T118	1
valid_sources[0x4b]	16097	1		T114	1		T116	1		T118	1
valid_sources[0x4c]	16702	1		T50	2		T112	1		T116	1
valid_sources[0x4d]	16187	1		T111	113		T114	2		T252	1
valid_sources[0x4e]	16303	1		T50	1		T114	3		T238	2
valid_sources[0x4f]	16449	1		T45	1		T112	1		T116	2
valid_sources[0x50]	16699	1		T45	1		T112	1		T118	1
valid_sources[0x51]	16072	1		T114	1		T126	1		T127	5
valid_sources[0x52]	16805	1		T125	4		T126	1		T127	2
valid_sources[0x53]	16027	1		T50	7		T125	3		T126	1
valid_sources[0x54]	147555	1		T114	3		T125	5		T127	1
valid_sources[0x55]	16415	1		T114	1		T118	1		T125	5
valid_sources[0x56]	16612	1		T114	1		T123	2		T126	1
valid_sources[0x57]	16390	1		T50	3		T112	1		T118	1
valid_sources[0x58]	17422	1		T116	2		T118	2		T127	2
valid_sources[0x59]	16526	1		T42	1		T50	3		T112	2
valid_sources[0x5a]	16627	1		T239	1		T118	1		T123	1
valid_sources[0x5b]	16134	1		T50	9		T123	1		T125	3
valid_sources[0x5c]	16229	1		T50	1		T127	1		T3	47
valid_sources[0x5d]	16304	1		T114	1		T118	3		T125	2
valid_sources[0x5e]	16807	1		T50	2		T114	1		T116	1
valid_sources[0x5f]	16364	1		T112	2		T114	2		T126	2
valid_sources[0x60]	16473	1		T45	1		T50	5		T125	1
valid_sources[0x61]	16108	1		T114	1		T126	3		T127	3
valid_sources[0x62]	16283	1		T118	1		T125	4		T127	1
valid_sources[0x63]	16453	1		T118	1		T123	2		T127	4
valid_sources[0x64]	16037	1		T125	4		T127	2		T3	77
valid_sources[0x65]	16531	1		T50	3		T194	3		T112	1
valid_sources[0x66]	16196	1		T112	1		T114	2		T123	3
valid_sources[0x67]	16870	1		T125	1		T126	1		T127	6
valid_sources[0x68]	16710	1		T45	1		T50	3		T114	2
valid_sources[0x69]	16455	1		T112	1		T123	2		T125	3
valid_sources[0x6a]	16356	1		T112	2		T114	2		T127	7
valid_sources[0x6b]	16214	1		T125	1		T126	3		T127	5
valid_sources[0x6c]	16381	1		T123	1		T126	5		T127	5
valid_sources[0x6d]	16554	1		T127	6		T3	63		T8	140
valid_sources[0x6e]	16693	1		T50	1		T112	2		T114	1
valid_sources[0x6f]	15979	1		T50	3		T118	1		T127	4
valid_sources[0x70]	16486	1		T50	6		T123	1		T126	6
valid_sources[0x71]	16468	1		T45	1		T114	2		T123	1
valid_sources[0x72]	16667	1		T123	1		T127	1		T3	69
valid_sources[0x73]	16568	1		T126	5		T127	3		T3	48
valid_sources[0x74]	16499	1		T114	1		T118	1		T127	1
valid_sources[0x75]	16536	1		T112	3		T114	1		T123	1
valid_sources[0x76]	16606	1		T50	1		T114	2		T118	2
valid_sources[0x77]	16767	1		T50	3		T114	1		T127	2
valid_sources[0x78]	16069	1		T50	4		T127	3		T3	72
valid_sources[0x79]	16319	1		T50	4		T114	3		T116	1
valid_sources[0x7a]	16756	1		T114	1		T118	1		T127	1
valid_sources[0x7b]	16648	1		T50	4		T112	1		T114	5
valid_sources[0x7c]	16422	1		T45	1		T123	5		T125	5
valid_sources[0x7d]	16280	1		T114	1		T123	2		T127	2
valid_sources[0x7e]	16240	1		T45	1		T50	1		T114	1
valid_sources[0x7f]	16698	1		T114	1		T125	3		T126	2
valid_sources[0x80]	16489	1		T114	1		T118	1		T123	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

4466503

1

T42

1

T45

5

T50

79

values[0x0]

all_enables

biggest_size

2738

1

T45

10

T50

138

T111

105

values[0x1]

all_enables

biggest_size

2707

1

T45

7

T50

99

T111

98

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30289	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	31805	1		T42	186		T45	28		T50	634

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	38903	1		T42	423		T45	38		T50	173
values[0x0]	11391	1		T42	105		T45	8		T50	243
values[0x1]	11800	1		T42	107		T45	10		T50	283

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	22159	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	39935	1		T42	346		T45	36		T50	672

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	212	1		T42	2		T50	2		T194	1
valid_sources[0x01]	878	1		T111	1		T194	2		T112	1
valid_sources[0x02]	217	1		T42	3		T50	1		T111	1
valid_sources[0x03]	145	1		T42	2		T50	2		T111	2
valid_sources[0x04]	162	1		T42	3		T50	1		T111	1
valid_sources[0x05]	273	1		T42	10		T50	4		T111	5
valid_sources[0x06]	432	1		T42	2		T45	1		T50	4
valid_sources[0x07]	168	1		T50	1		T111	1		T112	1
valid_sources[0x08]	151	1		T42	3		T50	1		T111	3
valid_sources[0x09]	240	1		T42	5		T50	4		T111	2
valid_sources[0x0a]	175	1		T42	4		T50	4		T111	1
valid_sources[0x0b]	238	1		T42	5		T50	4		T111	3
valid_sources[0x0c]	339	1		T42	2		T45	1		T50	1
valid_sources[0x0d]	224	1		T42	1		T50	1		T111	4
valid_sources[0x0e]	228	1		T50	4		T111	1		T115	1
valid_sources[0x0f]	157	1		T42	3		T111	5		T194	3
valid_sources[0x10]	204	1		T42	4		T50	1		T111	2
valid_sources[0x11]	295	1		T42	1		T50	5		T111	1
valid_sources[0x12]	174	1		T42	4		T111	5		T194	4
valid_sources[0x13]	257	1		T42	1		T50	4		T111	4
valid_sources[0x14]	205	1		T42	2		T50	2		T111	1
valid_sources[0x15]	307	1		T42	1		T45	6		T50	5
valid_sources[0x16]	203	1		T42	2		T50	7		T111	3
valid_sources[0x17]	270	1		T42	2		T111	5		T194	2
valid_sources[0x18]	207	1		T42	3		T50	1		T194	6
valid_sources[0x19]	171	1		T42	2		T50	4		T111	2
valid_sources[0x1a]	184	1		T45	1		T50	3		T111	6
valid_sources[0x1b]	220	1		T42	2		T45	3		T50	6
valid_sources[0x1c]	255	1		T42	7		T50	4		T111	1
valid_sources[0x1d]	161	1		T42	1		T45	1		T50	1
valid_sources[0x1e]	289	1		T50	3		T111	4		T237	16
valid_sources[0x1f]	197	1		T42	1		T50	2		T111	2
valid_sources[0x20]	293	1		T50	4		T111	3		T114	1
valid_sources[0x21]	170	1		T42	1		T111	1		T115	1
valid_sources[0x22]	194	1		T42	1		T45	9		T50	1
valid_sources[0x23]	208	1		T42	3		T50	4		T112	1
valid_sources[0x24]	205	1		T50	7		T251	1		T237	1
valid_sources[0x25]	349	1		T42	3		T50	3		T111	1
valid_sources[0x26]	214	1		T42	5		T50	2		T194	8
valid_sources[0x27]	201	1		T42	7		T50	3		T111	2
valid_sources[0x28]	267	1		T42	6		T50	1		T111	1
valid_sources[0x29]	214	1		T42	1		T45	2		T50	1
valid_sources[0x2a]	1032	1		T42	4		T50	1		T111	1
valid_sources[0x2b]	189	1		T42	3		T50	1		T111	1
valid_sources[0x2c]	166	1		T42	3		T111	1		T237	2
valid_sources[0x2d]	231	1		T42	5		T50	2		T194	11
valid_sources[0x2e]	252	1		T42	4		T50	3		T111	1
valid_sources[0x2f]	205	1		T42	1		T50	3		T112	1
valid_sources[0x30]	275	1		T42	5		T50	3		T111	1
valid_sources[0x31]	146	1		T42	1		T50	2		T111	3
valid_sources[0x32]	285	1		T50	1		T194	1		T114	3
valid_sources[0x33]	167	1		T45	3		T50	2		T114	1
valid_sources[0x34]	229	1		T42	8		T50	3		T111	2
valid_sources[0x35]	189	1		T42	1		T45	1		T50	2
valid_sources[0x36]	235	1		T42	1		T50	4		T111	3
valid_sources[0x37]	244	1		T42	8		T45	2		T50	4
valid_sources[0x38]	239	1		T42	2		T50	3		T194	10
valid_sources[0x39]	154	1		T42	3		T45	1		T50	1
valid_sources[0x3a]	270	1		T50	3		T111	2		T112	1
valid_sources[0x3b]	203	1		T42	2		T50	1		T194	10
valid_sources[0x3c]	159	1		T50	5		T112	1		T115	1
valid_sources[0x3d]	210	1		T42	8		T50	2		T111	1
valid_sources[0x3e]	275	1		T42	2		T50	1		T111	2
valid_sources[0x3f]	225	1		T42	3		T50	1		T111	4
valid_sources[0x40]	268	1		T42	2		T50	2		T111	3
valid_sources[0x41]	139	1		T42	2		T50	2		T111	4
valid_sources[0x42]	310	1		T42	4		T50	2		T111	2
valid_sources[0x43]	168	1		T42	1		T50	2		T111	1
valid_sources[0x44]	202	1		T50	4		T111	1		T194	8
valid_sources[0x45]	170	1		T42	1		T50	3		T114	1
valid_sources[0x46]	284	1		T42	1		T50	5		T111	3
valid_sources[0x47]	183	1		T42	3		T50	1		T111	4
valid_sources[0x48]	193	1		T42	3		T50	4		T111	1
valid_sources[0x49]	177	1		T42	9		T50	4		T111	8
valid_sources[0x4a]	192	1		T50	5		T111	1		T114	1
valid_sources[0x4b]	259	1		T42	3		T50	3		T111	1
valid_sources[0x4c]	192	1		T42	1		T50	1		T111	1
valid_sources[0x4d]	230	1		T42	2		T50	3		T111	2
valid_sources[0x4e]	304	1		T42	2		T50	1		T111	5
valid_sources[0x4f]	231	1		T42	4		T50	5		T111	6
valid_sources[0x50]	232	1		T50	1		T111	1		T239	2
valid_sources[0x51]	205	1		T50	4		T111	2		T194	2
valid_sources[0x52]	246	1		T42	2		T50	2		T111	3
valid_sources[0x53]	163	1		T50	5		T111	1		T112	1
valid_sources[0x54]	191	1		T42	3		T50	2		T111	2
valid_sources[0x55]	212	1		T42	3		T50	1		T111	4
valid_sources[0x56]	166	1		T42	1		T50	2		T111	4
valid_sources[0x57]	214	1		T42	4		T50	2		T111	3
valid_sources[0x58]	354	1		T42	4		T45	2		T50	4
valid_sources[0x59]	200	1		T42	2		T50	4		T111	1
valid_sources[0x5a]	288	1		T42	4		T50	8		T111	1
valid_sources[0x5b]	243	1		T50	1		T111	1		T194	2
valid_sources[0x5c]	161	1		T42	1		T50	1		T194	16
valid_sources[0x5d]	215	1		T42	6		T50	1		T111	4
valid_sources[0x5e]	362	1		T42	5		T50	3		T111	1
valid_sources[0x5f]	216	1		T42	3		T50	2		T111	3
valid_sources[0x60]	301	1		T42	1		T50	3		T112	1
valid_sources[0x61]	212	1		T50	4		T111	2		T194	3
valid_sources[0x62]	256	1		T42	1		T50	6		T111	4
valid_sources[0x63]	263	1		T42	4		T50	1		T111	2
valid_sources[0x64]	441	1		T42	3		T50	4		T111	2
valid_sources[0x65]	182	1		T42	4		T50	3		T111	1
valid_sources[0x66]	187	1		T42	1		T50	1		T111	1
valid_sources[0x67]	248	1		T42	4		T50	3		T194	1
valid_sources[0x68]	258	1		T42	3		T45	2		T50	5
valid_sources[0x69]	228	1		T50	2		T111	1		T194	1
valid_sources[0x6a]	222	1		T42	3		T50	4		T111	4
valid_sources[0x6b]	167	1		T114	1		T237	7		T239	5
valid_sources[0x6c]	206	1		T42	1		T111	3		T194	1
valid_sources[0x6d]	396	1		T42	4		T50	2		T111	3
valid_sources[0x6e]	196	1		T42	1		T50	4		T111	2
valid_sources[0x6f]	169	1		T42	3		T50	3		T111	1
valid_sources[0x70]	306	1		T42	4		T111	1		T194	2
valid_sources[0x71]	200	1		T42	1		T50	3		T111	2
valid_sources[0x72]	182	1		T42	2		T50	1		T111	4
valid_sources[0x73]	209	1		T42	6		T50	2		T111	2
valid_sources[0x74]	174	1		T42	3		T50	2		T111	2
valid_sources[0x75]	139	1		T42	2		T45	1		T50	3
valid_sources[0x76]	219	1		T42	3		T50	4		T111	2
valid_sources[0x77]	187	1		T42	4		T50	9		T114	2
valid_sources[0x78]	206	1		T42	3		T50	6		T111	5
valid_sources[0x79]	209	1		T50	7		T111	4		T194	6
valid_sources[0x7a]	198	1		T42	2		T50	3		T111	3
valid_sources[0x7b]	226	1		T42	4		T50	3		T111	2
valid_sources[0x7c]	211	1		T50	3		T111	2		T114	1
valid_sources[0x7d]	205	1		T42	4		T50	4		T111	1
valid_sources[0x7e]	279	1		T42	2		T50	4		T194	3
valid_sources[0x7f]	237	1		T42	4		T50	4		T111	1
valid_sources[0x80]	177	1		T42	4		T50	2		T114	3