Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.71 95.86 94.17 98.95 92.52 98.46 98.30 98.68


Total test records in report: 1276
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html

T1032 /workspace/coverage/default/1.flash_ctrl_rw_serr.816735257 Jan 17 03:16:27 PM PST 24 Jan 17 03:25:30 PM PST 24 3212177400 ps
T1033 /workspace/coverage/default/12.flash_ctrl_disable.976790443 Jan 17 03:22:43 PM PST 24 Jan 17 03:23:06 PM PST 24 20994600 ps
T1034 /workspace/coverage/default/65.flash_ctrl_otp_reset.1491590365 Jan 17 03:28:10 PM PST 24 Jan 17 03:30:21 PM PST 24 85364100 ps
T1035 /workspace/coverage/default/13.flash_ctrl_hw_read_seed_err.457214612 Jan 17 03:23:01 PM PST 24 Jan 17 03:23:15 PM PST 24 47610500 ps
T1036 /workspace/coverage/default/0.flash_ctrl_ro.1494604283 Jan 17 03:15:16 PM PST 24 Jan 17 03:17:15 PM PST 24 1770569200 ps
T1037 /workspace/coverage/default/22.flash_ctrl_alert_test.463426696 Jan 17 03:25:02 PM PST 24 Jan 17 03:25:19 PM PST 24 40374300 ps
T1038 /workspace/coverage/default/15.flash_ctrl_rw_evict_all_en.4179378532 Jan 17 03:23:28 PM PST 24 Jan 17 03:24:03 PM PST 24 87423100 ps
T1039 /workspace/coverage/default/3.flash_ctrl_oversize_error.1191719856 Jan 17 03:18:20 PM PST 24 Jan 17 03:20:26 PM PST 24 3029598900 ps
T1040 /workspace/coverage/default/17.flash_ctrl_wo.790343895 Jan 17 03:24:02 PM PST 24 Jan 17 03:26:33 PM PST 24 4051520900 ps
T1041 /workspace/coverage/default/27.flash_ctrl_smoke.2501493682 Jan 17 03:25:43 PM PST 24 Jan 17 03:27:24 PM PST 24 100051200 ps
T1042 /workspace/coverage/default/9.flash_ctrl_re_evict.1073898717 Jan 17 03:21:38 PM PST 24 Jan 17 03:22:15 PM PST 24 89064300 ps
T1043 /workspace/coverage/default/4.flash_ctrl_re_evict.1696565140 Jan 17 03:19:05 PM PST 24 Jan 17 03:19:46 PM PST 24 140900400 ps
T1044 /workspace/coverage/default/8.flash_ctrl_prog_reset.2447777960 Jan 17 03:21:18 PM PST 24 Jan 17 03:21:33 PM PST 24 36243100 ps
T1045 /workspace/coverage/default/35.flash_ctrl_hw_sec_otp.3595738469 Jan 17 03:26:37 PM PST 24 Jan 17 03:27:20 PM PST 24 865145000 ps
T1046 /workspace/coverage/default/5.flash_ctrl_hw_sec_otp.2517947810 Jan 17 03:19:31 PM PST 24 Jan 17 03:22:56 PM PST 24 4936293900 ps
T1047 /workspace/coverage/default/16.flash_ctrl_intr_rd_slow_flash.1032744030 Jan 17 03:23:48 PM PST 24 Jan 17 03:27:15 PM PST 24 21483737100 ps
T1048 /workspace/coverage/default/38.flash_ctrl_connect.2957286729 Jan 17 03:27:00 PM PST 24 Jan 17 03:27:18 PM PST 24 55170800 ps
T1049 /workspace/coverage/default/0.flash_ctrl_oversize_error.2965992499 Jan 17 03:15:25 PM PST 24 Jan 17 03:18:45 PM PST 24 4749304600 ps
T1050 /workspace/coverage/default/1.flash_ctrl_invalid_op.1239664700 Jan 17 03:16:18 PM PST 24 Jan 17 03:17:31 PM PST 24 2130757800 ps
T1051 /workspace/coverage/default/9.flash_ctrl_rw_serr.3678581966 Jan 17 03:21:44 PM PST 24 Jan 17 03:31:49 PM PST 24 12225856300 ps
T1052 /workspace/coverage/default/7.flash_ctrl_error_prog_win.3441246313 Jan 17 03:20:23 PM PST 24 Jan 17 03:33:42 PM PST 24 2244310200 ps
T1053 /workspace/coverage/default/8.flash_ctrl_intr_rd_slow_flash.4077136831 Jan 17 03:21:26 PM PST 24 Jan 17 03:25:08 PM PST 24 16806455100 ps
T1054 /workspace/coverage/default/5.flash_ctrl_invalid_op.726835103 Jan 17 03:19:34 PM PST 24 Jan 17 03:20:54 PM PST 24 23172963100 ps
T1055 /workspace/coverage/default/25.flash_ctrl_otp_reset.3463899662 Jan 17 03:25:29 PM PST 24 Jan 17 03:27:46 PM PST 24 38093400 ps
T1056 /workspace/coverage/default/4.flash_ctrl_erase_suspend.1475632103 Jan 17 03:18:52 PM PST 24 Jan 17 03:28:17 PM PST 24 9320596000 ps
T1057 /workspace/coverage/default/29.flash_ctrl_prog_reset.3029941373 Jan 17 03:25:58 PM PST 24 Jan 17 03:26:12 PM PST 24 21691400 ps
T1058 /workspace/coverage/default/10.flash_ctrl_hw_rma_reset.1290267918 Jan 17 03:21:48 PM PST 24 Jan 17 03:36:25 PM PST 24 160168479400 ps
T1059 /workspace/coverage/default/9.flash_ctrl_ro.882689236 Jan 17 03:21:39 PM PST 24 Jan 17 03:23:20 PM PST 24 1454896500 ps
T1060 /workspace/coverage/default/0.flash_ctrl_intr_rd.3564864159 Jan 17 03:15:24 PM PST 24 Jan 17 03:17:57 PM PST 24 5108816100 ps
T1061 /workspace/coverage/default/17.flash_ctrl_rand_ops.4176326840 Jan 17 03:23:57 PM PST 24 Jan 17 03:32:11 PM PST 24 68342200 ps
T1062 /workspace/coverage/default/6.flash_ctrl_ro_derr.521104971 Jan 17 03:20:09 PM PST 24 Jan 17 03:22:18 PM PST 24 666874500 ps
T1063 /workspace/coverage/default/0.flash_ctrl_error_mp.2631287235 Jan 17 03:15:00 PM PST 24 Jan 17 03:52:56 PM PST 24 34373174000 ps
T1064 /workspace/coverage/default/34.flash_ctrl_disable.3944964197 Jan 17 03:26:29 PM PST 24 Jan 17 03:26:53 PM PST 24 11069200 ps
T1065 /workspace/coverage/default/6.flash_ctrl_hw_sec_otp.2153537568 Jan 17 03:19:57 PM PST 24 Jan 17 03:21:15 PM PST 24 5210066000 ps
T1066 /workspace/coverage/default/44.flash_ctrl_otp_reset.1428644308 Jan 17 03:27:22 PM PST 24 Jan 17 03:29:34 PM PST 24 73848500 ps
T1067 /workspace/coverage/default/23.flash_ctrl_otp_reset.3469574260 Jan 17 03:25:02 PM PST 24 Jan 17 03:27:14 PM PST 24 41905500 ps
T384 /workspace/coverage/default/1.flash_ctrl_fs_sup.1139795232 Jan 17 03:16:53 PM PST 24 Jan 17 03:17:29 PM PST 24 1096108000 ps
T1068 /workspace/coverage/default/14.flash_ctrl_hw_rma_reset.2002356930 Jan 17 03:23:05 PM PST 24 Jan 17 03:36:51 PM PST 24 540411373700 ps
T1069 /workspace/coverage/default/2.flash_ctrl_hw_read_seed_err.2664328053 Jan 17 03:17:53 PM PST 24 Jan 17 03:18:08 PM PST 24 15377400 ps
T367 /workspace/coverage/default/22.flash_ctrl_sec_info_access.2968790859 Jan 17 03:25:03 PM PST 24 Jan 17 03:26:11 PM PST 24 10046888400 ps
T1070 /workspace/coverage/default/1.flash_ctrl_lcmgr_intg.683392835 Jan 17 03:16:53 PM PST 24 Jan 17 03:17:06 PM PST 24 15755200 ps
T1071 /workspace/coverage/default/4.flash_ctrl_rw.1751232876 Jan 17 03:18:59 PM PST 24 Jan 17 03:26:09 PM PST 24 2600465200 ps
T1072 /workspace/coverage/default/3.flash_ctrl_intr_rd_slow_flash.2340081870 Jan 17 03:18:26 PM PST 24 Jan 17 03:21:48 PM PST 24 8799552700 ps
T1073 /workspace/coverage/default/1.flash_ctrl_prog_reset.3946850427 Jan 17 03:16:44 PM PST 24 Jan 17 03:16:59 PM PST 24 75316100 ps
T227 /workspace/coverage/default/0.flash_ctrl_phy_ack_consistency.2523920653 Jan 17 03:15:54 PM PST 24 Jan 17 03:16:12 PM PST 24 45181700 ps
T1074 /workspace/coverage/default/7.flash_ctrl_rw.865990007 Jan 17 03:20:29 PM PST 24 Jan 17 03:28:14 PM PST 24 3030828000 ps
T1075 /workspace/coverage/default/39.flash_ctrl_rw_evict_all_en.4099697804 Jan 17 03:27:02 PM PST 24 Jan 17 03:27:35 PM PST 24 157648800 ps
T1076 /workspace/coverage/default/35.flash_ctrl_connect.295418145 Jan 17 03:26:43 PM PST 24 Jan 17 03:27:00 PM PST 24 15530800 ps
T1077 /workspace/coverage/default/54.flash_ctrl_connect.3640120447 Jan 17 03:27:43 PM PST 24 Jan 17 03:28:00 PM PST 24 43581200 ps
T1078 /workspace/coverage/default/12.flash_ctrl_sec_info_access.219412365 Jan 17 03:22:44 PM PST 24 Jan 17 03:23:58 PM PST 24 1553734600 ps
T356 /workspace/coverage/default/2.flash_ctrl_sec_info_access.436551897 Jan 17 03:17:38 PM PST 24 Jan 17 03:19:15 PM PST 24 28953275300 ps
T1079 /workspace/coverage/default/56.flash_ctrl_connect.3090130568 Jan 17 03:27:43 PM PST 24 Jan 17 03:28:00 PM PST 24 44393700 ps
T1080 /workspace/coverage/default/40.flash_ctrl_smoke.2148423577 Jan 17 03:27:01 PM PST 24 Jan 17 03:28:18 PM PST 24 28422000 ps
T1081 /workspace/coverage/default/14.flash_ctrl_phy_arb.957388225 Jan 17 03:22:58 PM PST 24 Jan 17 03:26:14 PM PST 24 51787300 ps
T1082 /workspace/coverage/default/31.flash_ctrl_smoke.3122968087 Jan 17 03:26:07 PM PST 24 Jan 17 03:28:10 PM PST 24 39470800 ps
T1083 /workspace/coverage/default/3.flash_ctrl_sw_op.1857156432 Jan 17 03:17:58 PM PST 24 Jan 17 03:18:24 PM PST 24 41458100 ps
T1084 /workspace/coverage/default/0.flash_ctrl_smoke.3741343663 Jan 17 03:14:37 PM PST 24 Jan 17 03:16:38 PM PST 24 84305600 ps
T1085 /workspace/coverage/default/57.flash_ctrl_connect.3710909187 Jan 17 03:27:56 PM PST 24 Jan 17 03:28:10 PM PST 24 115452900 ps
T1086 /workspace/coverage/default/1.flash_ctrl_serr_counter.1842274953 Jan 17 03:16:29 PM PST 24 Jan 17 03:17:49 PM PST 24 4227714100 ps
T1087 /workspace/coverage/default/1.flash_ctrl_otp_reset.586382113 Jan 17 03:16:11 PM PST 24 Jan 17 03:18:03 PM PST 24 41874200 ps
T1088 /workspace/coverage/default/9.flash_ctrl_intr_rd.2473241878 Jan 17 03:21:38 PM PST 24 Jan 17 03:24:48 PM PST 24 21762608100 ps
T1089 /workspace/coverage/default/4.flash_ctrl_serr_counter.1895527481 Jan 17 03:18:59 PM PST 24 Jan 17 03:19:56 PM PST 24 530997000 ps
T1090 /workspace/coverage/default/5.flash_ctrl_hw_read_seed_err.1557063689 Jan 17 03:19:56 PM PST 24 Jan 17 03:20:11 PM PST 24 25830500 ps
T1091 /workspace/coverage/default/6.flash_ctrl_hw_read_seed_err.1750436482 Jan 17 03:20:24 PM PST 24 Jan 17 03:20:38 PM PST 24 15281700 ps
T1092 /workspace/coverage/default/29.flash_ctrl_intr_rd_slow_flash.2154417877 Jan 17 03:25:57 PM PST 24 Jan 17 03:29:31 PM PST 24 33155249000 ps
T1093 /workspace/coverage/default/1.flash_ctrl_intr_wr_slow_flash.2241032614 Jan 17 03:16:44 PM PST 24 Jan 17 03:22:44 PM PST 24 63552205500 ps
T1094 /workspace/coverage/default/20.flash_ctrl_alert_test.1485295956 Jan 17 03:24:57 PM PST 24 Jan 17 03:25:11 PM PST 24 136316300 ps
T1095 /workspace/coverage/default/17.flash_ctrl_connect.2344215616 Jan 17 03:24:06 PM PST 24 Jan 17 03:24:21 PM PST 24 13879600 ps
T1096 /workspace/coverage/default/3.flash_ctrl_otp_reset.2944702898 Jan 17 03:17:59 PM PST 24 Jan 17 03:19:48 PM PST 24 240076000 ps
T1097 /workspace/coverage/default/0.flash_ctrl_alert_test.3736962383 Jan 17 03:16:01 PM PST 24 Jan 17 03:16:15 PM PST 24 234286000 ps
T1098 /workspace/coverage/default/68.flash_ctrl_connect.2495365207 Jan 17 03:28:04 PM PST 24 Jan 17 03:28:25 PM PST 24 17065200 ps
T1099 /workspace/coverage/default/50.flash_ctrl_connect.3889321469 Jan 17 03:27:45 PM PST 24 Jan 17 03:28:01 PM PST 24 15449800 ps
T1100 /workspace/coverage/default/13.flash_ctrl_lcmgr_intg.1809015074 Jan 17 03:23:01 PM PST 24 Jan 17 03:23:15 PM PST 24 84720800 ps
T1101 /workspace/coverage/default/4.flash_ctrl_intr_wr_slow_flash.2714365108 Jan 17 03:19:07 PM PST 24 Jan 17 03:25:38 PM PST 24 100063096500 ps
T1102 /workspace/coverage/default/5.flash_ctrl_alert_test.4039396357 Jan 17 03:19:56 PM PST 24 Jan 17 03:20:11 PM PST 24 73855600 ps
T1103 /workspace/coverage/default/7.flash_ctrl_prog_reset.3595833244 Jan 17 03:20:45 PM PST 24 Jan 17 03:20:59 PM PST 24 21723600 ps
T1104 /workspace/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.3410468166 Jan 17 03:24:40 PM PST 24 Jan 17 03:26:54 PM PST 24 10012559600 ps
T1105 /workspace/coverage/default/38.flash_ctrl_smoke.2801032881 Jan 17 03:26:59 PM PST 24 Jan 17 03:29:05 PM PST 24 40270600 ps
T1106 /workspace/coverage/default/33.flash_ctrl_sec_info_access.3309019752 Jan 17 03:26:30 PM PST 24 Jan 17 03:27:49 PM PST 24 4668108400 ps
T1107 /workspace/coverage/default/40.flash_ctrl_alert_test.3155442982 Jan 17 03:27:02 PM PST 24 Jan 17 03:27:17 PM PST 24 126841300 ps
T1108 /workspace/coverage/default/31.flash_ctrl_rw_evict.1596934357 Jan 17 03:26:06 PM PST 24 Jan 17 03:26:38 PM PST 24 46032700 ps
T1109 /workspace/coverage/default/14.flash_ctrl_wo.1373258515 Jan 17 03:23:08 PM PST 24 Jan 17 03:26:00 PM PST 24 13603595800 ps
T1110 /workspace/coverage/default/71.flash_ctrl_connect.1500435801 Jan 17 03:28:09 PM PST 24 Jan 17 03:28:23 PM PST 24 53142800 ps
T1111 /workspace/coverage/default/11.flash_ctrl_smoke.2288347401 Jan 17 03:22:03 PM PST 24 Jan 17 03:23:18 PM PST 24 14600100 ps
T1112 /workspace/coverage/default/27.flash_ctrl_rw_evict_all_en.3773974889 Jan 17 03:25:42 PM PST 24 Jan 17 03:26:18 PM PST 24 102865300 ps
T1113 /workspace/coverage/default/4.flash_ctrl_fetch_code.3750025919 Jan 17 03:18:53 PM PST 24 Jan 17 03:19:15 PM PST 24 261657100 ps
T1114 /workspace/coverage/default/31.flash_ctrl_intr_rd_slow_flash.2933970212 Jan 17 03:26:05 PM PST 24 Jan 17 03:30:21 PM PST 24 39643988400 ps
T1115 /workspace/coverage/default/75.flash_ctrl_connect.2501636351 Jan 17 03:28:08 PM PST 24 Jan 17 03:28:25 PM PST 24 28244500 ps
T1116 /workspace/coverage/default/42.flash_ctrl_hw_sec_otp.1688277280 Jan 17 03:27:12 PM PST 24 Jan 17 03:28:13 PM PST 24 2568258400 ps
T1117 /workspace/coverage/default/20.flash_ctrl_connect.877116948 Jan 17 03:24:56 PM PST 24 Jan 17 03:25:11 PM PST 24 166045800 ps
T1118 /workspace/coverage/default/24.flash_ctrl_rw_evict_all_en.2598438092 Jan 17 03:25:24 PM PST 24 Jan 17 03:25:56 PM PST 24 282921900 ps
T1119 /workspace/coverage/default/16.flash_ctrl_smoke.3192010813 Jan 17 03:23:41 PM PST 24 Jan 17 03:25:43 PM PST 24 33311800 ps
T1120 /workspace/coverage/default/2.flash_ctrl_error_prog_win.2540280881 Jan 17 03:17:12 PM PST 24 Jan 17 03:33:04 PM PST 24 955965800 ps
T1121 /workspace/coverage/default/32.flash_ctrl_intr_rd_slow_flash.2164003282 Jan 17 03:26:11 PM PST 24 Jan 17 03:29:22 PM PST 24 8749112100 ps
T1122 /workspace/coverage/default/12.flash_ctrl_alert_test.2592936498 Jan 17 03:22:43 PM PST 24 Jan 17 03:22:57 PM PST 24 17594100 ps
T1123 /workspace/coverage/default/34.flash_ctrl_hw_sec_otp.3144412563 Jan 17 03:26:30 PM PST 24 Jan 17 03:28:22 PM PST 24 6121277000 ps
T1124 /workspace/coverage/default/8.flash_ctrl_alert_test.2383191618 Jan 17 03:21:29 PM PST 24 Jan 17 03:21:47 PM PST 24 117141900 ps
T1125 /workspace/coverage/default/21.flash_ctrl_smoke.2871813418 Jan 17 03:24:58 PM PST 24 Jan 17 03:26:14 PM PST 24 33044700 ps
T1126 /workspace/coverage/default/4.flash_ctrl_serr_address.3345992741 Jan 17 03:19:00 PM PST 24 Jan 17 03:20:12 PM PST 24 598422900 ps
T1127 /workspace/coverage/default/3.flash_ctrl_alert_test.2262127378 Jan 17 03:18:37 PM PST 24 Jan 17 03:18:51 PM PST 24 97056900 ps
T1128 /workspace/coverage/default/34.flash_ctrl_intr_rd.1830071698 Jan 17 03:26:30 PM PST 24 Jan 17 03:29:06 PM PST 24 4460276700 ps
T1129 /workspace/coverage/default/4.flash_ctrl_sec_info_access.727295709 Jan 17 03:19:13 PM PST 24 Jan 17 03:20:33 PM PST 24 2317714300 ps
T1130 /workspace/coverage/default/2.flash_ctrl_oversize_error.786557519 Jan 17 03:17:16 PM PST 24 Jan 17 03:20:01 PM PST 24 1828408400 ps
T1131 /workspace/coverage/default/77.flash_ctrl_otp_reset.3075570546 Jan 17 03:28:14 PM PST 24 Jan 17 03:30:03 PM PST 24 37741800 ps
T360 /workspace/coverage/default/8.flash_ctrl_sec_info_access.2884850509 Jan 17 03:21:25 PM PST 24 Jan 17 03:22:39 PM PST 24 10781355100 ps
T1132 /workspace/coverage/default/0.flash_ctrl_invalid_op.3451314882 Jan 17 03:14:59 PM PST 24 Jan 17 03:16:37 PM PST 24 41852807500 ps
T1133 /workspace/coverage/default/21.flash_ctrl_rw_evict.791272787 Jan 17 03:24:55 PM PST 24 Jan 17 03:25:26 PM PST 24 71799900 ps
T1134 /workspace/coverage/default/64.flash_ctrl_otp_reset.2277427713 Jan 17 03:27:59 PM PST 24 Jan 17 03:30:13 PM PST 24 38743500 ps
T1135 /workspace/coverage/default/9.flash_ctrl_connect.3641525618 Jan 17 03:21:46 PM PST 24 Jan 17 03:22:03 PM PST 24 54882400 ps
T1136 /workspace/coverage/default/7.flash_ctrl_lcmgr_intg.4122373551 Jan 17 03:20:48 PM PST 24 Jan 17 03:21:02 PM PST 24 15246100 ps
T1137 /workspace/coverage/default/4.flash_ctrl_host_ctrl_arb.3774840404 Jan 17 03:18:54 PM PST 24 Jan 17 03:52:14 PM PST 24 457173068400 ps
T1138 /workspace/coverage/default/10.flash_ctrl_otp_reset.4125778093 Jan 17 03:21:55 PM PST 24 Jan 17 03:24:12 PM PST 24 176463000 ps
T1139 /workspace/coverage/default/10.flash_ctrl_rw.2574657509 Jan 17 03:21:53 PM PST 24 Jan 17 03:30:34 PM PST 24 6787462100 ps
T1140 /workspace/coverage/default/3.flash_ctrl_host_ctrl_arb.618750356 Jan 17 03:18:02 PM PST 24 Jan 17 03:58:04 PM PST 24 297990289400 ps
T1141 /workspace/coverage/default/3.flash_ctrl_rw_derr.2070373867 Jan 17 03:18:12 PM PST 24 Jan 17 03:27:34 PM PST 24 45800438700 ps
T1142 /workspace/coverage/default/3.flash_ctrl_hw_rma_reset.3658749088 Jan 17 03:18:03 PM PST 24 Jan 17 03:33:16 PM PST 24 480374372500 ps
T1143 /workspace/coverage/default/1.flash_ctrl_sw_op.3263464023 Jan 17 03:16:00 PM PST 24 Jan 17 03:16:26 PM PST 24 27447300 ps
T107 /workspace/coverage/default/0.flash_ctrl_sec_cm.3971572069 Jan 17 03:15:46 PM PST 24 Jan 17 04:33:19 PM PST 24 2196527100 ps
T395 /workspace/coverage/default/34.flash_ctrl_rw_evict.1476515032 Jan 17 03:26:31 PM PST 24 Jan 17 03:27:03 PM PST 24 53246500 ps
T1144 /workspace/coverage/default/5.flash_ctrl_wo.1784548747 Jan 17 03:19:51 PM PST 24 Jan 17 03:23:10 PM PST 24 14504722300 ps
T1145 /workspace/coverage/default/1.flash_ctrl_intr_rd_slow_flash.629554836 Jan 17 03:16:44 PM PST 24 Jan 17 03:20:49 PM PST 24 34525398100 ps
T1146 /workspace/coverage/default/5.flash_ctrl_rand_ops.3326628407 Jan 17 03:19:31 PM PST 24 Jan 17 03:28:38 PM PST 24 97896000 ps
T1147 /workspace/coverage/default/1.flash_ctrl_alert_test.915845642 Jan 17 03:16:59 PM PST 24 Jan 17 03:17:14 PM PST 24 82220200 ps
T1148 /workspace/coverage/default/4.flash_ctrl_derr_detect.1430834368 Jan 17 03:19:11 PM PST 24 Jan 17 03:20:58 PM PST 24 165332000 ps
T1149 /workspace/coverage/default/39.flash_ctrl_connect.606263549 Jan 17 03:27:05 PM PST 24 Jan 17 03:27:28 PM PST 24 15552400 ps
T1150 /workspace/coverage/default/46.flash_ctrl_disable.1953851288 Jan 17 03:27:28 PM PST 24 Jan 17 03:27:51 PM PST 24 11674000 ps
T1151 /workspace/coverage/default/0.flash_ctrl_derr_detect.3046401647 Jan 17 03:15:17 PM PST 24 Jan 17 03:17:01 PM PST 24 297961000 ps
T1152 /workspace/coverage/default/7.flash_ctrl_phy_arb.1620059357 Jan 17 03:20:27 PM PST 24 Jan 17 03:24:14 PM PST 24 53541000 ps
T1153 /workspace/coverage/default/12.flash_ctrl_lcmgr_intg.3940085376 Jan 17 03:22:44 PM PST 24 Jan 17 03:22:58 PM PST 24 21176900 ps
T1154 /workspace/coverage/default/45.flash_ctrl_connect.2889410290 Jan 17 03:27:23 PM PST 24 Jan 17 03:27:40 PM PST 24 66515100 ps
T1155 /workspace/coverage/default/27.flash_ctrl_prog_reset.2463445510 Jan 17 03:25:43 PM PST 24 Jan 17 03:30:16 PM PST 24 15943310800 ps
T1156 /workspace/coverage/default/4.flash_ctrl_invalid_op.1416279865 Jan 17 03:18:59 PM PST 24 Jan 17 03:20:33 PM PST 24 5688228200 ps
T1157 /workspace/coverage/default/6.flash_ctrl_mp_regions.2189394263 Jan 17 03:19:57 PM PST 24 Jan 17 03:28:06 PM PST 24 71689177900 ps
T1158 /workspace/coverage/default/25.flash_ctrl_intr_rd_slow_flash.256226554 Jan 17 03:25:26 PM PST 24 Jan 17 03:28:45 PM PST 24 9191346800 ps
T1159 /workspace/coverage/default/44.flash_ctrl_smoke.452294626 Jan 17 03:27:21 PM PST 24 Jan 17 03:28:38 PM PST 24 156826900 ps
T15 /workspace/coverage/default/1.flash_ctrl_phy_host_grant_err.568095483 Jan 17 03:16:53 PM PST 24 Jan 17 03:17:07 PM PST 24 72445500 ps
T1160 /workspace/coverage/default/33.flash_ctrl_smoke.2792458448 Jan 17 03:26:20 PM PST 24 Jan 17 03:28:46 PM PST 24 33390200 ps
T1161 /workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.903800893 Jan 17 12:55:41 PM PST 24 Jan 17 12:55:55 PM PST 24 42639500 ps
T1162 /workspace/coverage/cover_reg_top/0.flash_ctrl_csr_bit_bash.645707656 Jan 17 12:54:53 PM PST 24 Jan 17 12:55:48 PM PST 24 1126782500 ps
T310 /workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.4011482117 Jan 17 12:55:30 PM PST 24 Jan 17 01:10:35 PM PST 24 1268070400 ps
T298 /workspace/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.335015452 Jan 17 12:55:45 PM PST 24 Jan 17 12:56:04 PM PST 24 149967700 ps
T1163 /workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors_with_csr_rw.3857450840 Jan 17 12:55:20 PM PST 24 Jan 17 12:55:37 PM PST 24 22341400 ps
T1164 /workspace/coverage/cover_reg_top/0.flash_ctrl_csr_aliasing.2887861311 Jan 17 12:54:56 PM PST 24 Jan 17 12:55:37 PM PST 24 1192477700 ps
T299 /workspace/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.2677167350 Jan 17 12:55:10 PM PST 24 Jan 17 12:55:58 PM PST 24 50683500 ps
T1165 /workspace/coverage/cover_reg_top/6.flash_ctrl_intr_test.2807854505 Jan 17 12:55:20 PM PST 24 Jan 17 12:55:35 PM PST 24 24406600 ps
T1166 /workspace/coverage/cover_reg_top/0.flash_ctrl_tl_intg_err.3083659703 Jan 17 12:54:58 PM PST 24 Jan 17 01:02:30 PM PST 24 187054400 ps
T267 /workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.2203863989 Jan 17 12:55:48 PM PST 24 Jan 17 12:56:09 PM PST 24 70063900 ps
T1167 /workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.1067465092 Jan 17 12:55:44 PM PST 24 Jan 17 12:56:00 PM PST 24 18574800 ps
T1168 /workspace/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.3346479038 Jan 17 12:55:05 PM PST 24 Jan 17 12:56:10 PM PST 24 4969541400 ps
T1169 /workspace/coverage/cover_reg_top/17.flash_ctrl_csr_rw.185327077 Jan 17 12:55:41 PM PST 24 Jan 17 12:55:59 PM PST 24 37651200 ps
T1170 /workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.2546967052 Jan 17 12:55:21 PM PST 24 Jan 17 12:55:39 PM PST 24 25560000 ps
T266 /workspace/coverage/cover_reg_top/19.flash_ctrl_tl_errors.4035868003 Jan 17 12:55:49 PM PST 24 Jan 17 12:56:09 PM PST 24 146834900 ps
T300 /workspace/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.2046755880 Jan 17 12:55:47 PM PST 24 Jan 17 12:56:09 PM PST 24 129917500 ps
T1171 /workspace/coverage/cover_reg_top/4.flash_ctrl_csr_aliasing.2322364142 Jan 17 12:55:03 PM PST 24 Jan 17 12:55:37 PM PST 24 858886100 ps
T1172 /workspace/coverage/cover_reg_top/46.flash_ctrl_intr_test.3111021575 Jan 17 12:56:09 PM PST 24 Jan 17 12:56:24 PM PST 24 64875200 ps
T1173 /workspace/coverage/cover_reg_top/1.flash_ctrl_mem_walk.2133417405 Jan 17 12:55:01 PM PST 24 Jan 17 12:55:15 PM PST 24 185488900 ps
T301 /workspace/coverage/cover_reg_top/3.flash_ctrl_same_csr_outstanding.1593334662 Jan 17 12:55:04 PM PST 24 Jan 17 12:55:39 PM PST 24 786947400 ps
T1174 /workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.746174537 Jan 17 12:55:26 PM PST 24 Jan 17 12:55:43 PM PST 24 70486100 ps
T1175 /workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.3190843814 Jan 17 12:55:21 PM PST 24 Jan 17 12:55:40 PM PST 24 121740800 ps
T1176 /workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.2422009002 Jan 17 12:55:47 PM PST 24 Jan 17 12:56:04 PM PST 24 21016800 ps
T264 /workspace/coverage/cover_reg_top/14.flash_ctrl_tl_errors.3896322056 Jan 17 12:55:38 PM PST 24 Jan 17 12:55:56 PM PST 24 48374300 ps
T302 /workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.1819868250 Jan 17 12:55:25 PM PST 24 Jan 17 12:55:44 PM PST 24 1580674300 ps
T1177 /workspace/coverage/cover_reg_top/31.flash_ctrl_intr_test.4269399276 Jan 17 12:55:54 PM PST 24 Jan 17 12:56:15 PM PST 24 16145300 ps
T1178 /workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.471858081 Jan 17 12:55:40 PM PST 24 Jan 17 12:55:56 PM PST 24 12679400 ps
T1179 /workspace/coverage/cover_reg_top/12.flash_ctrl_same_csr_outstanding.740106567 Jan 17 12:55:30 PM PST 24 Jan 17 12:55:51 PM PST 24 65700300 ps
T1180 /workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.3959940021 Jan 17 12:55:08 PM PST 24 Jan 17 12:55:23 PM PST 24 43619000 ps
T1181 /workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.3421457095 Jan 17 12:55:21 PM PST 24 Jan 17 12:55:38 PM PST 24 22017000 ps
T255 /workspace/coverage/cover_reg_top/4.flash_ctrl_mem_partial_access.1006880684 Jan 17 12:55:09 PM PST 24 Jan 17 12:55:25 PM PST 24 19015700 ps
T309 /workspace/coverage/cover_reg_top/5.flash_ctrl_tl_errors.4180778061 Jan 17 12:55:09 PM PST 24 Jan 17 12:55:28 PM PST 24 322851700 ps
T263 /workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.2448945121 Jan 17 12:55:02 PM PST 24 Jan 17 12:55:19 PM PST 24 33522100 ps
T1182 /workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.1633827293 Jan 17 12:55:04 PM PST 24 Jan 17 12:55:18 PM PST 24 130100300 ps
T1183 /workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.135278831 Jan 17 12:55:42 PM PST 24 Jan 17 12:55:59 PM PST 24 19860100 ps
T1184 /workspace/coverage/cover_reg_top/37.flash_ctrl_intr_test.2086365593 Jan 17 12:55:54 PM PST 24 Jan 17 12:56:14 PM PST 24 30366900 ps
T1185 /workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.597518814 Jan 17 12:55:04 PM PST 24 Jan 17 12:55:18 PM PST 24 54794400 ps
T1186 /workspace/coverage/cover_reg_top/10.flash_ctrl_intr_test.1449481646 Jan 17 12:55:25 PM PST 24 Jan 17 12:55:40 PM PST 24 50364100 ps
T1187 /workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.782562103 Jan 17 12:55:10 PM PST 24 Jan 17 12:55:26 PM PST 24 17444500 ps
T1188 /workspace/coverage/cover_reg_top/10.flash_ctrl_same_csr_outstanding.3965609008 Jan 17 12:55:26 PM PST 24 Jan 17 12:55:42 PM PST 24 274167700 ps
T1189 /workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.3868105621 Jan 17 12:55:09 PM PST 24 Jan 17 12:55:27 PM PST 24 39956100 ps
T1190 /workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.4140579610 Jan 17 12:55:05 PM PST 24 Jan 17 12:55:19 PM PST 24 118353500 ps
T1191 /workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.4126757705 Jan 17 12:55:37 PM PST 24 Jan 17 12:55:54 PM PST 24 40345900 ps
T1192 /workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors.2049735746 Jan 17 12:55:49 PM PST 24 Jan 17 12:56:08 PM PST 24 41312200 ps
T1193 /workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.3319432506 Jan 17 12:55:53 PM PST 24 Jan 17 12:56:08 PM PST 24 28075700 ps
T1194 /workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors.1011029259 Jan 17 12:55:21 PM PST 24 Jan 17 12:55:35 PM PST 24 53639200 ps
T1195 /workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.874525402 Jan 17 12:55:04 PM PST 24 Jan 17 12:55:18 PM PST 24 140347300 ps
T1196 /workspace/coverage/cover_reg_top/34.flash_ctrl_intr_test.3935037777 Jan 17 12:55:59 PM PST 24 Jan 17 12:56:16 PM PST 24 53217200 ps
T1197 /workspace/coverage/cover_reg_top/13.flash_ctrl_shadow_reg_errors_with_csr_rw.1134570815 Jan 17 12:55:30 PM PST 24 Jan 17 12:55:50 PM PST 24 40995200 ps
T1198 /workspace/coverage/cover_reg_top/0.flash_ctrl_csr_mem_rw_with_rand_reset.2078537476 Jan 17 12:54:55 PM PST 24 Jan 17 12:55:11 PM PST 24 38243400 ps
T1199 /workspace/coverage/cover_reg_top/2.flash_ctrl_tl_errors.3435291547 Jan 17 12:55:10 PM PST 24 Jan 17 12:55:29 PM PST 24 255045600 ps
T1200 /workspace/coverage/cover_reg_top/7.flash_ctrl_same_csr_outstanding.2221508640 Jan 17 12:55:19 PM PST 24 Jan 17 12:55:36 PM PST 24 65075400 ps
T1201 /workspace/coverage/cover_reg_top/0.flash_ctrl_csr_rw.506754469 Jan 17 12:54:55 PM PST 24 Jan 17 12:55:10 PM PST 24 34768400 ps
T256 /workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.3051651285 Jan 17 12:55:14 PM PST 24 Jan 17 12:55:35 PM PST 24 15995800 ps
T315 /workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.703441040 Jan 17 12:55:54 PM PST 24 Jan 17 01:10:54 PM PST 24 1997702900 ps
T1202 /workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.280286687 Jan 17 12:55:18 PM PST 24 Jan 17 12:55:37 PM PST 24 82035900 ps
T1203 /workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.2133027841 Jan 17 12:55:04 PM PST 24 Jan 17 12:55:18 PM PST 24 46069700 ps
T1204 /workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.2866456922 Jan 17 12:55:23 PM PST 24 Jan 17 12:55:40 PM PST 24 29998800 ps
T1205 /workspace/coverage/cover_reg_top/1.flash_ctrl_csr_rw.47020110 Jan 17 12:55:09 PM PST 24 Jan 17 12:55:29 PM PST 24 28664800 ps
T1206 /workspace/coverage/cover_reg_top/3.flash_ctrl_csr_mem_rw_with_rand_reset.220540021 Jan 17 12:55:08 PM PST 24 Jan 17 12:55:27 PM PST 24 57178800 ps
T1207 /workspace/coverage/cover_reg_top/10.flash_ctrl_csr_rw.1538036522 Jan 17 12:55:32 PM PST 24 Jan 17 12:55:49 PM PST 24 201038400 ps
T1208 /workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.3876450975 Jan 17 12:56:10 PM PST 24 Jan 17 12:56:24 PM PST 24 16470900 ps
T1209 /workspace/coverage/cover_reg_top/28.flash_ctrl_intr_test.2086841415 Jan 17 12:55:52 PM PST 24 Jan 17 12:56:07 PM PST 24 18588300 ps
T1210 /workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors.3893015152 Jan 17 12:55:14 PM PST 24 Jan 17 12:55:37 PM PST 24 22516800 ps
T1211 /workspace/coverage/cover_reg_top/12.flash_ctrl_shadow_reg_errors_with_csr_rw.3301628806 Jan 17 12:55:27 PM PST 24 Jan 17 12:55:41 PM PST 24 24256200 ps
T1212 /workspace/coverage/cover_reg_top/13.flash_ctrl_intr_test.3030067394 Jan 17 12:55:30 PM PST 24 Jan 17 12:55:47 PM PST 24 16151600 ps
T1213 /workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.3905779222 Jan 17 12:55:11 PM PST 24 Jan 17 12:55:50 PM PST 24 1334454800 ps
T1214 /workspace/coverage/cover_reg_top/8.flash_ctrl_intr_test.3531675030 Jan 17 12:55:21 PM PST 24 Jan 17 12:55:36 PM PST 24 15785600 ps
T1215 /workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors.1583849324 Jan 17 12:55:10 PM PST 24 Jan 17 12:55:26 PM PST 24 12367300 ps
T1216 /workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.691705867 Jan 17 12:55:10 PM PST 24 Jan 17 12:55:26 PM PST 24 16695100 ps
T265 /workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.1621267193 Jan 17 12:55:48 PM PST 24 Jan 17 12:56:11 PM PST 24 312803300 ps
T1217 /workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors_with_csr_rw.1363533805 Jan 17 12:55:44 PM PST 24 Jan 17 12:55:58 PM PST 24 19669600 ps
T1218 /workspace/coverage/cover_reg_top/6.flash_ctrl_csr_rw.1289473744 Jan 17 12:55:17 PM PST 24 Jan 17 12:55:38 PM PST 24 131648400 ps
T311 /workspace/coverage/cover_reg_top/7.flash_ctrl_tl_intg_err.3171574530 Jan 17 12:55:20 PM PST 24 Jan 17 01:02:48 PM PST 24 886133700 ps
T1219 /workspace/coverage/cover_reg_top/48.flash_ctrl_intr_test.651469381 Jan 17 12:56:08 PM PST 24 Jan 17 12:56:23 PM PST 24 83075300 ps
T1220 /workspace/coverage/cover_reg_top/47.flash_ctrl_intr_test.1378734085 Jan 17 12:56:08 PM PST 24 Jan 17 12:56:22 PM PST 24 110934800 ps
T1221 /workspace/coverage/cover_reg_top/13.flash_ctrl_same_csr_outstanding.1444345213 Jan 17 12:55:41 PM PST 24 Jan 17 12:56:17 PM PST 24 329860200 ps
T1222 /workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.949652922 Jan 17 12:55:20 PM PST 24 Jan 17 12:55:35 PM PST 24 13972300 ps
T1223 /workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors_with_csr_rw.3221539195 Jan 17 12:55:49 PM PST 24 Jan 17 12:56:08 PM PST 24 14515100 ps
T316 /workspace/coverage/cover_reg_top/18.flash_ctrl_tl_intg_err.634212946 Jan 17 12:55:47 PM PST 24 Jan 17 01:03:28 PM PST 24 1076934800 ps
T1224 /workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.1642858870 Jan 17 12:55:40 PM PST 24 Jan 17 12:55:59 PM PST 24 504318900 ps
T1225 /workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.4252167632 Jan 17 12:55:51 PM PST 24 Jan 17 12:56:07 PM PST 24 14504000 ps
T1226 /workspace/coverage/cover_reg_top/3.flash_ctrl_tl_errors.1859582685 Jan 17 12:55:07 PM PST 24 Jan 17 12:55:25 PM PST 24 40131800 ps
T1227 /workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.1999169385 Jan 17 12:55:36 PM PST 24 Jan 17 12:55:52 PM PST 24 27408800 ps
T1228 /workspace/coverage/cover_reg_top/6.flash_ctrl_shadow_reg_errors_with_csr_rw.3795296100 Jan 17 12:55:18 PM PST 24 Jan 17 12:55:37 PM PST 24 20281000 ps
T1229 /workspace/coverage/cover_reg_top/24.flash_ctrl_intr_test.247366086 Jan 17 12:55:47 PM PST 24 Jan 17 12:56:04 PM PST 24 18935700 ps
T317 /workspace/coverage/cover_reg_top/2.flash_ctrl_tl_intg_err.1801061555 Jan 17 12:55:10 PM PST 24 Jan 17 01:01:38 PM PST 24 806376200 ps
T1230 /workspace/coverage/cover_reg_top/1.flash_ctrl_csr_aliasing.2676507034 Jan 17 12:55:11 PM PST 24 Jan 17 12:55:47 PM PST 24 239994700 ps
T1231 /workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.1373216470 Jan 17 12:55:21 PM PST 24 Jan 17 12:55:40 PM PST 24 43479600 ps
T1232 /workspace/coverage/cover_reg_top/11.flash_ctrl_shadow_reg_errors_with_csr_rw.4046174642 Jan 17 12:55:37 PM PST 24 Jan 17 12:55:53 PM PST 24 50360100 ps
T1233 /workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.1469118536 Jan 17 12:55:27 PM PST 24 Jan 17 12:55:45 PM PST 24 40133600 ps
T1234 /workspace/coverage/cover_reg_top/9.flash_ctrl_tl_errors.3989970652 Jan 17 12:55:21 PM PST 24 Jan 17 12:55:41 PM PST 24 105558800 ps
T1235 /workspace/coverage/cover_reg_top/21.flash_ctrl_intr_test.1056496542 Jan 17 12:55:49 PM PST 24 Jan 17 12:56:06 PM PST 24 149412800 ps
T1236 /workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.94487632 Jan 17 12:55:50 PM PST 24 Jan 17 12:56:07 PM PST 24 51767400 ps
T1237 /workspace/coverage/cover_reg_top/18.flash_ctrl_csr_mem_rw_with_rand_reset.2859754730 Jan 17 12:55:54 PM PST 24 Jan 17 12:56:20 PM PST 24 83443100 ps
T1238 /workspace/coverage/cover_reg_top/6.flash_ctrl_csr_mem_rw_with_rand_reset.2453179288 Jan 17 12:55:27 PM PST 24 Jan 17 12:55:45 PM PST 24 93317500 ps
T1239 /workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.814791037 Jan 17 12:55:10 PM PST 24 Jan 17 12:55:28 PM PST 24 14492500 ps
T1240 /workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.2784237122 Jan 17 12:55:19 PM PST 24 Jan 17 12:55:40 PM PST 24 549439500 ps
T1241 /workspace/coverage/cover_reg_top/19.flash_ctrl_csr_rw.2791377209 Jan 17 12:55:50 PM PST 24 Jan 17 12:56:10 PM PST 24 35554600 ps
T1242 /workspace/coverage/cover_reg_top/22.flash_ctrl_intr_test.3594018626 Jan 17 12:55:48 PM PST 24 Jan 17 12:56:06 PM PST 24 25347000 ps
T1243 /workspace/coverage/cover_reg_top/14.flash_ctrl_csr_mem_rw_with_rand_reset.696172779 Jan 17 12:55:39 PM PST 24 Jan 17 12:55:57 PM PST 24 35045600 ps
T1244 /workspace/coverage/cover_reg_top/10.flash_ctrl_shadow_reg_errors_with_csr_rw.3972455184 Jan 17 12:55:21 PM PST 24 Jan 17 12:55:38 PM PST 24 45617200 ps
T1245 /workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.1701601324 Jan 17 12:55:11 PM PST 24 Jan 17 12:55:47 PM PST 24 236459000 ps
T312 /workspace/coverage/cover_reg_top/17.flash_ctrl_tl_intg_err.3518569861 Jan 17 12:55:44 PM PST 24 Jan 17 01:03:17 PM PST 24 337886200 ps
T1246 /workspace/coverage/cover_reg_top/33.flash_ctrl_intr_test.2576190258 Jan 17 12:55:54 PM PST 24 Jan 17 12:56:15 PM PST 24 48439900 ps
T1247 /workspace/coverage/cover_reg_top/30.flash_ctrl_intr_test.4227856036 Jan 17 12:55:53 PM PST 24 Jan 17 12:56:08 PM PST 24 23400100 ps
T1248 /workspace/coverage/cover_reg_top/2.flash_ctrl_csr_bit_bash.2080154060 Jan 17 12:55:05 PM PST 24 Jan 17 12:56:02 PM PST 24 10301295500 ps
T1249 /workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.167070070 Jan 17 12:55:37 PM PST 24 Jan 17 12:55:55 PM PST 24 42230200 ps
T1250 /workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.2728977908 Jan 17 12:55:25 PM PST 24 Jan 17 12:55:42 PM PST 24 43976900 ps
T1251 /workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors.2594459971 Jan 17 12:55:43 PM PST 24 Jan 17 12:55:56 PM PST 24 30752000 ps
T1252 /workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.1461695023 Jan 17 12:55:14 PM PST 24 Jan 17 12:55:52 PM PST 24 61662300 ps
T1253 /workspace/coverage/cover_reg_top/18.flash_ctrl_intr_test.1312796624 Jan 17 12:55:45 PM PST 24 Jan 17 12:55:59 PM PST 24 51380500 ps
T1254 /workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.636702228 Jan 17 12:55:25 PM PST 24 Jan 17 12:55:42 PM PST 24 18515300 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%