Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
222 |
1 |
|
T23 |
1 |
|
T38 |
1 |
|
T24 |
1 |
| others[1] |
214 |
1 |
|
T45 |
1 |
|
T52 |
7 |
|
T109 |
11 |
| others[2] |
256 |
1 |
|
T38 |
2 |
|
T52 |
9 |
|
T109 |
9 |
| others[3] |
399 |
1 |
|
T1 |
1 |
|
T29 |
1 |
|
T38 |
2 |
| false |
111 |
1 |
|
T38 |
1 |
|
T25 |
1 |
|
T52 |
5 |
| true |
12978 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
206 |
1 |
|
T25 |
2 |
|
T45 |
1 |
|
T52 |
8 |
| others[1] |
223 |
1 |
|
T45 |
1 |
|
T52 |
10 |
|
T109 |
8 |
| others[2] |
222 |
1 |
|
T23 |
1 |
|
T25 |
1 |
|
T52 |
13 |
| others[3] |
372 |
1 |
|
T25 |
1 |
|
T52 |
16 |
|
T109 |
15 |
| false |
114 |
1 |
|
T25 |
1 |
|
T45 |
1 |
|
T52 |
4 |
| true |
13043 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8533 |
1 |
|
T2 |
1 |
|
T6 |
15 |
|
T23 |
1 |
| others[1] |
1257 |
1 |
|
T6 |
8 |
|
T21 |
2 |
|
T24 |
1 |
| others[2] |
1249 |
1 |
|
T6 |
14 |
|
T18 |
1 |
|
T23 |
1 |
| others[3] |
2098 |
1 |
|
T1 |
1 |
|
T6 |
21 |
|
T29 |
1 |
| false |
627 |
1 |
|
T6 |
4 |
|
T25 |
1 |
|
T76 |
7 |
| true |
416 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8485 |
1 |
|
T6 |
13 |
|
T20 |
1 |
|
T43 |
1 |
| others[1] |
1215 |
1 |
|
T6 |
16 |
|
T18 |
1 |
|
T21 |
1 |
| others[2] |
1244 |
1 |
|
T6 |
6 |
|
T21 |
1 |
|
T24 |
2 |
| others[3] |
2129 |
1 |
|
T2 |
1 |
|
T6 |
18 |
|
T29 |
1 |
| false |
702 |
1 |
|
T1 |
1 |
|
T6 |
9 |
|
T42 |
1 |
| true |
405 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
100 |
1 |
|
T25 |
1 |
|
T52 |
6 |
|
T109 |
4 |
| others[1] |
115 |
1 |
|
T23 |
1 |
|
T4 |
1 |
|
T25 |
2 |
| others[2] |
111 |
1 |
|
T1 |
1 |
|
T29 |
1 |
|
T23 |
1 |
| others[3] |
166 |
1 |
|
T21 |
2 |
|
T24 |
1 |
|
T25 |
2 |
| false |
55 |
1 |
|
T24 |
1 |
|
T109 |
2 |
|
T216 |
1 |
| true |
13633 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
237 |
1 |
|
T23 |
2 |
|
T38 |
1 |
|
T45 |
1 |
| others[1] |
190 |
1 |
|
T25 |
1 |
|
T52 |
9 |
|
T109 |
6 |
| others[2] |
233 |
1 |
|
T3 |
1 |
|
T41 |
1 |
|
T52 |
10 |
| others[3] |
402 |
1 |
|
T21 |
1 |
|
T29 |
1 |
|
T38 |
5 |
| false |
124 |
1 |
|
T4 |
1 |
|
T45 |
1 |
|
T52 |
3 |
| true |
12994 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8303 |
1 |
|
T3 |
1 |
|
T6 |
15 |
|
T38 |
1 |
| others[1] |
1103 |
1 |
|
T6 |
8 |
|
T21 |
1 |
|
T23 |
1 |
| others[2] |
1079 |
1 |
|
T6 |
14 |
|
T23 |
1 |
|
T38 |
1 |
| others[3] |
1791 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
21 |
| false |
566 |
1 |
|
T6 |
4 |
|
T29 |
1 |
|
T38 |
1 |
| true |
1338 |
1 |
|
T20 |
1 |
|
T10 |
1 |
|
T41 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T4 |
1 |
|
T42 |
1 |
|
T52 |
8 |
| others[1] |
238 |
1 |
|
T1 |
1 |
|
T23 |
1 |
|
T25 |
1 |
| others[2] |
217 |
1 |
|
T20 |
1 |
|
T44 |
1 |
|
T53 |
1 |
| others[3] |
368 |
1 |
|
T21 |
1 |
|
T25 |
3 |
|
T45 |
2 |
| false |
115 |
1 |
|
T29 |
1 |
|
T23 |
1 |
|
T24 |
1 |
| true |
13000 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
218 |
1 |
|
T25 |
2 |
|
T34 |
1 |
|
T52 |
6 |
| others[1] |
225 |
1 |
|
T24 |
1 |
|
T25 |
2 |
|
T52 |
8 |
| others[2] |
216 |
1 |
|
T21 |
1 |
|
T41 |
1 |
|
T45 |
1 |
| others[3] |
342 |
1 |
|
T4 |
1 |
|
T25 |
1 |
|
T45 |
2 |
| false |
136 |
1 |
|
T25 |
1 |
|
T52 |
5 |
|
T109 |
4 |
| true |
13043 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8453 |
1 |
|
T6 |
11 |
|
T23 |
1 |
|
T11 |
1 |
| others[1] |
1240 |
1 |
|
T2 |
1 |
|
T6 |
17 |
|
T23 |
1 |
| others[2] |
1245 |
1 |
|
T6 |
11 |
|
T18 |
1 |
|
T21 |
1 |
| others[3] |
2182 |
1 |
|
T6 |
19 |
|
T25 |
4 |
|
T76 |
33 |
| false |
641 |
1 |
|
T1 |
1 |
|
T6 |
4 |
|
T21 |
1 |
| true |
419 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1288 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
10 |
| others[1] |
1243 |
1 |
|
T6 |
12 |
|
T20 |
1 |
|
T25 |
4 |
| others[2] |
1257 |
1 |
|
T6 |
15 |
|
T23 |
1 |
|
T25 |
1 |
| others[3] |
2081 |
1 |
|
T6 |
17 |
|
T18 |
1 |
|
T21 |
1 |
| false |
652 |
1 |
|
T6 |
8 |
|
T21 |
1 |
|
T23 |
1 |
| true |
405 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
100 |
1 |
|
T23 |
1 |
|
T25 |
1 |
|
T52 |
4 |
| others[1] |
119 |
1 |
|
T4 |
1 |
|
T25 |
3 |
|
T74 |
1 |
| others[2] |
99 |
1 |
|
T1 |
1 |
|
T21 |
1 |
|
T29 |
1 |
| others[3] |
169 |
1 |
|
T24 |
1 |
|
T25 |
3 |
|
T52 |
8 |
| false |
49 |
1 |
|
T21 |
1 |
|
T52 |
1 |
|
T109 |
1 |
| true |
6390 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
247 |
1 |
|
T23 |
1 |
|
T38 |
3 |
|
T45 |
2 |
| others[1] |
255 |
1 |
|
T24 |
1 |
|
T25 |
3 |
|
T45 |
1 |
| others[2] |
211 |
1 |
|
T20 |
1 |
|
T52 |
12 |
|
T109 |
7 |
| others[3] |
389 |
1 |
|
T23 |
1 |
|
T38 |
1 |
|
T4 |
1 |
| false |
119 |
1 |
|
T38 |
2 |
|
T52 |
2 |
|
T109 |
10 |
| true |
5705 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1059 |
1 |
|
T1 |
1 |
|
T6 |
12 |
|
T25 |
1 |
| others[1] |
1045 |
1 |
|
T3 |
1 |
|
T6 |
9 |
|
T29 |
1 |
| others[2] |
1089 |
1 |
|
T6 |
16 |
|
T20 |
1 |
|
T23 |
1 |
| others[3] |
1807 |
1 |
|
T6 |
17 |
|
T18 |
1 |
|
T19 |
1 |
| false |
549 |
1 |
|
T2 |
1 |
|
T6 |
8 |
|
T35 |
1 |
| true |
1377 |
1 |
|
T10 |
1 |
|
T38 |
6 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
235 |
1 |
|
T20 |
1 |
|
T23 |
2 |
|
T39 |
1 |
| others[1] |
267 |
1 |
|
T21 |
1 |
|
T38 |
1 |
|
T25 |
1 |
| others[2] |
245 |
1 |
|
T21 |
1 |
|
T38 |
2 |
|
T24 |
1 |
| others[3] |
399 |
1 |
|
T29 |
1 |
|
T38 |
1 |
|
T41 |
1 |
| false |
111 |
1 |
|
T38 |
2 |
|
T52 |
5 |
|
T109 |
6 |
| true |
5669 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
226 |
1 |
|
T21 |
1 |
|
T25 |
1 |
|
T45 |
2 |
| others[1] |
220 |
1 |
|
T52 |
10 |
|
T109 |
8 |
|
T342 |
1 |
| others[2] |
229 |
1 |
|
T23 |
1 |
|
T39 |
1 |
|
T25 |
1 |
| others[3] |
347 |
1 |
|
T24 |
1 |
|
T25 |
2 |
|
T52 |
14 |
| false |
119 |
1 |
|
T23 |
1 |
|
T25 |
1 |
|
T52 |
6 |
| true |
5785 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1261 |
1 |
|
T6 |
13 |
|
T18 |
1 |
|
T21 |
1 |
| others[1] |
1252 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
16 |
| others[2] |
1263 |
1 |
|
T6 |
10 |
|
T29 |
1 |
|
T23 |
1 |
| others[3] |
2099 |
1 |
|
T6 |
21 |
|
T24 |
1 |
|
T25 |
4 |
| false |
620 |
1 |
|
T6 |
2 |
|
T76 |
14 |
|
T52 |
12 |
| true |
431 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1254 |
1 |
|
T6 |
12 |
|
T23 |
1 |
|
T25 |
1 |
| others[1] |
1259 |
1 |
|
T1 |
1 |
|
T6 |
9 |
|
T24 |
1 |
| others[2] |
1204 |
1 |
|
T6 |
13 |
|
T18 |
1 |
|
T29 |
1 |
| others[3] |
2166 |
1 |
|
T2 |
1 |
|
T6 |
25 |
|
T21 |
1 |
| false |
639 |
1 |
|
T6 |
3 |
|
T21 |
1 |
|
T33 |
1 |
| true |
404 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
90 |
1 |
|
T25 |
2 |
|
T52 |
4 |
|
T109 |
4 |
| others[1] |
118 |
1 |
|
T21 |
1 |
|
T29 |
1 |
|
T25 |
2 |
| others[2] |
92 |
1 |
|
T21 |
1 |
|
T52 |
6 |
|
T109 |
3 |
| others[3] |
181 |
1 |
|
T23 |
1 |
|
T24 |
1 |
|
T25 |
4 |
| false |
60 |
1 |
|
T23 |
1 |
|
T24 |
1 |
|
T52 |
4 |
| true |
6385 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
251 |
1 |
|
T25 |
1 |
|
T45 |
1 |
|
T52 |
13 |
| others[1] |
228 |
1 |
|
T24 |
2 |
|
T25 |
1 |
|
T52 |
12 |
| others[2] |
231 |
1 |
|
T29 |
1 |
|
T45 |
1 |
|
T52 |
13 |
| others[3] |
358 |
1 |
|
T3 |
1 |
|
T20 |
1 |
|
T21 |
1 |
| false |
111 |
1 |
|
T25 |
1 |
|
T52 |
5 |
|
T109 |
2 |
| true |
5747 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1061 |
1 |
|
T6 |
14 |
|
T19 |
1 |
|
T4 |
1 |
| others[1] |
1100 |
1 |
|
T6 |
12 |
|
T24 |
1 |
|
T43 |
1 |
| others[2] |
1063 |
1 |
|
T1 |
1 |
|
T6 |
14 |
|
T24 |
1 |
| others[3] |
1763 |
1 |
|
T6 |
16 |
|
T18 |
1 |
|
T21 |
2 |
| false |
523 |
1 |
|
T2 |
1 |
|
T6 |
6 |
|
T25 |
1 |
| true |
1416 |
1 |
|
T3 |
1 |
|
T20 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T52 |
17 |
|
T109 |
8 |
|
T182 |
1 |
| others[1] |
225 |
1 |
|
T38 |
2 |
|
T45 |
1 |
|
T52 |
9 |
| others[2] |
240 |
1 |
|
T20 |
1 |
|
T38 |
1 |
|
T4 |
1 |
| others[3] |
369 |
1 |
|
T3 |
1 |
|
T38 |
3 |
|
T24 |
2 |
| false |
122 |
1 |
|
T52 |
2 |
|
T109 |
3 |
|
T49 |
1 |
| true |
5741 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
241 |
1 |
|
T23 |
1 |
|
T4 |
1 |
|
T25 |
1 |
| others[1] |
230 |
1 |
|
T24 |
1 |
|
T25 |
2 |
|
T45 |
1 |
| others[2] |
254 |
1 |
|
T24 |
1 |
|
T25 |
1 |
|
T52 |
10 |
| others[3] |
381 |
1 |
|
T21 |
2 |
|
T29 |
1 |
|
T39 |
1 |
| false |
110 |
1 |
|
T52 |
4 |
|
T109 |
4 |
|
T114 |
7 |
| true |
5710 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1242 |
1 |
|
T6 |
9 |
|
T23 |
1 |
|
T25 |
2 |
| others[1] |
1249 |
1 |
|
T6 |
18 |
|
T21 |
1 |
|
T24 |
1 |
| others[2] |
1235 |
1 |
|
T2 |
1 |
|
T6 |
13 |
|
T18 |
1 |
| others[3] |
2120 |
1 |
|
T1 |
1 |
|
T6 |
19 |
|
T21 |
1 |
| false |
663 |
1 |
|
T6 |
3 |
|
T23 |
1 |
|
T25 |
1 |
| true |
417 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1260 |
1 |
|
T6 |
12 |
|
T21 |
1 |
|
T29 |
1 |
| others[1] |
1235 |
1 |
|
T1 |
1 |
|
T6 |
8 |
|
T25 |
3 |
| others[2] |
1231 |
1 |
|
T6 |
14 |
|
T21 |
1 |
|
T23 |
1 |
| others[3] |
2111 |
1 |
|
T2 |
1 |
|
T6 |
21 |
|
T19 |
1 |
| false |
677 |
1 |
|
T6 |
7 |
|
T18 |
1 |
|
T74 |
1 |
| true |
412 |
1 |
|
T3 |
1 |
|
T20 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
87 |
1 |
|
T21 |
1 |
|
T24 |
1 |
|
T25 |
1 |
| others[1] |
113 |
1 |
|
T23 |
1 |
|
T25 |
3 |
|
T52 |
6 |
| others[2] |
106 |
1 |
|
T21 |
1 |
|
T23 |
1 |
|
T25 |
1 |
| others[3] |
169 |
1 |
|
T1 |
1 |
|
T29 |
1 |
|
T24 |
1 |
| false |
57 |
1 |
|
T39 |
1 |
|
T25 |
1 |
|
T52 |
2 |
| true |
6394 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
207 |
1 |
|
T20 |
1 |
|
T24 |
1 |
|
T25 |
1 |
| others[1] |
201 |
1 |
|
T24 |
1 |
|
T45 |
1 |
|
T53 |
1 |
| others[2] |
248 |
1 |
|
T21 |
1 |
|
T25 |
2 |
|
T52 |
7 |
| others[3] |
384 |
1 |
|
T21 |
1 |
|
T29 |
1 |
|
T23 |
2 |
| false |
101 |
1 |
|
T52 |
4 |
|
T109 |
1 |
|
T56 |
1 |
| true |
5785 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1090 |
1 |
|
T6 |
9 |
|
T21 |
1 |
|
T23 |
1 |
| others[1] |
1037 |
1 |
|
T6 |
20 |
|
T18 |
1 |
|
T10 |
1 |
| others[2] |
1070 |
1 |
|
T6 |
17 |
|
T20 |
1 |
|
T42 |
1 |
| others[3] |
1781 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
12 |
| false |
550 |
1 |
|
T1 |
1 |
|
T6 |
4 |
|
T45 |
1 |
| true |
1398 |
1 |
|
T38 |
6 |
|
T11 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
237 |
1 |
|
T39 |
1 |
|
T45 |
2 |
|
T52 |
8 |
| others[1] |
222 |
1 |
|
T21 |
1 |
|
T29 |
1 |
|
T25 |
1 |
| others[2] |
223 |
1 |
|
T34 |
1 |
|
T52 |
14 |
|
T109 |
8 |
| others[3] |
378 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T23 |
1 |
| false |
122 |
1 |
|
T44 |
1 |
|
T25 |
2 |
|
T52 |
7 |
| true |
5744 |
1 |
|
T2 |
1 |
|
T6 |
62 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T21 |
1 |
|
T39 |
1 |
|
T52 |
13 |
| others[1] |
214 |
1 |
|
T41 |
1 |
|
T25 |
1 |
|
T45 |
1 |
| others[2] |
240 |
1 |
|
T25 |
1 |
|
T74 |
1 |
|
T52 |
17 |
| others[3] |
372 |
1 |
|
T29 |
1 |
|
T24 |
1 |
|
T45 |
1 |
| false |
111 |
1 |
|
T21 |
1 |
|
T23 |
1 |
|
T45 |
1 |
| true |
5773 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1274 |
1 |
|
T6 |
10 |
|
T21 |
1 |
|
T24 |
1 |
| others[1] |
1249 |
1 |
|
T6 |
13 |
|
T29 |
1 |
|
T23 |
1 |
| others[2] |
1210 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
7 |
| others[3] |
2108 |
1 |
|
T6 |
25 |
|
T18 |
1 |
|
T20 |
1 |
| false |
661 |
1 |
|
T6 |
7 |
|
T23 |
1 |
|
T25 |
2 |
| true |
424 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T10 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |