Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1305 |
1 |
|
T6 |
12 |
|
T18 |
1 |
|
T20 |
1 |
| others[1] |
1210 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
12 |
| others[2] |
1273 |
1 |
|
T6 |
10 |
|
T23 |
1 |
|
T24 |
1 |
| others[3] |
2068 |
1 |
|
T6 |
20 |
|
T21 |
2 |
|
T29 |
1 |
| false |
663 |
1 |
|
T6 |
8 |
|
T24 |
1 |
|
T76 |
7 |
| true |
407 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
93 |
1 |
|
T24 |
1 |
|
T25 |
4 |
|
T45 |
1 |
| others[1] |
105 |
1 |
|
T21 |
1 |
|
T29 |
1 |
|
T4 |
1 |
| others[2] |
100 |
1 |
|
T1 |
1 |
|
T25 |
1 |
|
T45 |
1 |
| others[3] |
149 |
1 |
|
T21 |
1 |
|
T23 |
1 |
|
T24 |
1 |
| false |
61 |
1 |
|
T23 |
1 |
|
T52 |
5 |
|
T109 |
2 |
| true |
6418 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
230 |
1 |
|
T24 |
1 |
|
T52 |
6 |
|
T109 |
9 |
| others[1] |
261 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T21 |
1 |
| others[2] |
231 |
1 |
|
T21 |
1 |
|
T38 |
2 |
|
T39 |
1 |
| others[3] |
392 |
1 |
|
T20 |
1 |
|
T23 |
2 |
|
T38 |
3 |
| false |
126 |
1 |
|
T52 |
3 |
|
T109 |
6 |
|
T342 |
1 |
| true |
5686 |
1 |
|
T2 |
1 |
|
T6 |
62 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1096 |
1 |
|
T6 |
13 |
|
T24 |
1 |
|
T43 |
1 |
| others[1] |
1081 |
1 |
|
T6 |
13 |
|
T19 |
1 |
|
T21 |
1 |
| others[2] |
1077 |
1 |
|
T2 |
1 |
|
T6 |
13 |
|
T18 |
1 |
| others[3] |
1803 |
1 |
|
T1 |
1 |
|
T6 |
18 |
|
T23 |
1 |
| false |
527 |
1 |
|
T3 |
1 |
|
T6 |
5 |
|
T76 |
9 |
| true |
1342 |
1 |
|
T20 |
1 |
|
T38 |
6 |
|
T11 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
238 |
1 |
|
T29 |
1 |
|
T42 |
1 |
|
T25 |
1 |
| others[1] |
231 |
1 |
|
T23 |
1 |
|
T38 |
2 |
|
T41 |
1 |
| others[2] |
235 |
1 |
|
T23 |
1 |
|
T38 |
2 |
|
T4 |
1 |
| others[3] |
414 |
1 |
|
T38 |
1 |
|
T24 |
1 |
|
T25 |
1 |
| false |
112 |
1 |
|
T1 |
1 |
|
T21 |
1 |
|
T38 |
1 |
| true |
5696 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
202 |
1 |
|
T25 |
2 |
|
T45 |
1 |
|
T52 |
8 |
| others[1] |
199 |
1 |
|
T25 |
1 |
|
T52 |
8 |
|
T109 |
7 |
| others[2] |
197 |
1 |
|
T24 |
1 |
|
T45 |
1 |
|
T52 |
12 |
| others[3] |
412 |
1 |
|
T21 |
1 |
|
T23 |
2 |
|
T25 |
1 |
| false |
106 |
1 |
|
T52 |
4 |
|
T109 |
6 |
|
T114 |
5 |
| true |
5810 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1262 |
1 |
|
T6 |
9 |
|
T23 |
1 |
|
T25 |
1 |
| others[1] |
1212 |
1 |
|
T6 |
8 |
|
T18 |
1 |
|
T24 |
1 |
| others[2] |
1283 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
19 |
| others[3] |
2116 |
1 |
|
T6 |
15 |
|
T21 |
1 |
|
T29 |
1 |
| false |
635 |
1 |
|
T6 |
11 |
|
T76 |
12 |
|
T52 |
12 |
| true |
418 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1260 |
1 |
|
T6 |
12 |
|
T21 |
1 |
|
T25 |
3 |
| others[1] |
1280 |
1 |
|
T1 |
1 |
|
T6 |
11 |
|
T20 |
1 |
| others[2] |
1281 |
1 |
|
T2 |
1 |
|
T6 |
12 |
|
T18 |
1 |
| others[3] |
2043 |
1 |
|
T6 |
20 |
|
T21 |
1 |
|
T29 |
1 |
| false |
659 |
1 |
|
T6 |
7 |
|
T76 |
11 |
|
T52 |
7 |
| true |
403 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
117 |
1 |
|
T1 |
1 |
|
T24 |
1 |
|
T25 |
1 |
| others[1] |
99 |
1 |
|
T21 |
1 |
|
T23 |
1 |
|
T25 |
2 |
| others[2] |
95 |
1 |
|
T23 |
1 |
|
T25 |
1 |
|
T52 |
4 |
| others[3] |
193 |
1 |
|
T29 |
1 |
|
T24 |
1 |
|
T25 |
2 |
| false |
48 |
1 |
|
T21 |
1 |
|
T25 |
2 |
|
T74 |
1 |
| true |
6374 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
241 |
1 |
|
T23 |
1 |
|
T38 |
2 |
|
T4 |
1 |
| others[1] |
208 |
1 |
|
T25 |
3 |
|
T53 |
1 |
|
T52 |
7 |
| others[2] |
238 |
1 |
|
T1 |
1 |
|
T44 |
1 |
|
T45 |
1 |
| others[3] |
367 |
1 |
|
T29 |
1 |
|
T38 |
4 |
|
T34 |
1 |
| false |
109 |
1 |
|
T21 |
1 |
|
T45 |
1 |
|
T52 |
8 |
| true |
5763 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1079 |
1 |
|
T6 |
14 |
|
T23 |
1 |
|
T38 |
2 |
| others[1] |
1125 |
1 |
|
T3 |
1 |
|
T6 |
18 |
|
T18 |
1 |
| others[2] |
1112 |
1 |
|
T2 |
1 |
|
T6 |
12 |
|
T21 |
1 |
| others[3] |
1753 |
1 |
|
T1 |
1 |
|
T6 |
11 |
|
T29 |
1 |
| false |
539 |
1 |
|
T6 |
7 |
|
T10 |
1 |
|
T76 |
3 |
| true |
1318 |
1 |
|
T20 |
1 |
|
T4 |
1 |
|
T42 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
256 |
1 |
|
T1 |
1 |
|
T38 |
3 |
|
T25 |
1 |
| others[1] |
211 |
1 |
|
T4 |
1 |
|
T25 |
1 |
|
T45 |
1 |
| others[2] |
240 |
1 |
|
T23 |
1 |
|
T38 |
1 |
|
T44 |
1 |
| others[3] |
363 |
1 |
|
T38 |
2 |
|
T41 |
1 |
|
T25 |
1 |
| false |
111 |
1 |
|
T23 |
1 |
|
T39 |
1 |
|
T45 |
2 |
| true |
5745 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
198 |
1 |
|
T1 |
1 |
|
T25 |
2 |
|
T45 |
1 |
| others[1] |
231 |
1 |
|
T21 |
1 |
|
T29 |
1 |
|
T25 |
2 |
| others[2] |
225 |
1 |
|
T39 |
1 |
|
T52 |
8 |
|
T109 |
7 |
| others[3] |
369 |
1 |
|
T21 |
1 |
|
T23 |
1 |
|
T45 |
2 |
| false |
120 |
1 |
|
T52 |
3 |
|
T109 |
5 |
|
T114 |
6 |
| true |
5783 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1228 |
1 |
|
T6 |
12 |
|
T25 |
1 |
|
T191 |
1 |
| others[1] |
1257 |
1 |
|
T6 |
7 |
|
T18 |
1 |
|
T29 |
1 |
| others[2] |
1230 |
1 |
|
T6 |
11 |
|
T19 |
1 |
|
T21 |
1 |
| others[3] |
2111 |
1 |
|
T2 |
1 |
|
T6 |
28 |
|
T21 |
1 |
| false |
667 |
1 |
|
T1 |
1 |
|
T6 |
4 |
|
T23 |
1 |
| true |
433 |
1 |
|
T3 |
1 |
|
T20 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1255 |
1 |
|
T1 |
1 |
|
T6 |
11 |
|
T21 |
1 |
| others[1] |
1273 |
1 |
|
T6 |
15 |
|
T24 |
1 |
|
T25 |
3 |
| others[2] |
1242 |
1 |
|
T2 |
1 |
|
T6 |
12 |
|
T18 |
1 |
| others[3] |
2094 |
1 |
|
T6 |
19 |
|
T21 |
1 |
|
T29 |
1 |
| false |
662 |
1 |
|
T6 |
5 |
|
T76 |
15 |
|
T52 |
5 |
| true |
400 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
103 |
1 |
|
T21 |
1 |
|
T39 |
1 |
|
T25 |
1 |
| others[1] |
100 |
1 |
|
T29 |
1 |
|
T24 |
1 |
|
T25 |
2 |
| others[2] |
93 |
1 |
|
T24 |
1 |
|
T25 |
1 |
|
T52 |
2 |
| others[3] |
156 |
1 |
|
T21 |
1 |
|
T23 |
2 |
|
T25 |
3 |
| false |
46 |
1 |
|
T25 |
1 |
|
T52 |
5 |
|
T109 |
1 |
| true |
6428 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
243 |
1 |
|
T21 |
1 |
|
T38 |
1 |
|
T39 |
1 |
| others[1] |
246 |
1 |
|
T38 |
1 |
|
T25 |
2 |
|
T74 |
1 |
| others[2] |
238 |
1 |
|
T3 |
1 |
|
T20 |
1 |
|
T38 |
2 |
| others[3] |
374 |
1 |
|
T21 |
1 |
|
T23 |
1 |
|
T38 |
1 |
| false |
114 |
1 |
|
T38 |
1 |
|
T45 |
1 |
|
T52 |
3 |
| true |
5711 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1049 |
1 |
|
T6 |
14 |
|
T29 |
1 |
|
T23 |
1 |
| others[1] |
1090 |
1 |
|
T6 |
14 |
|
T18 |
1 |
|
T21 |
1 |
| others[2] |
1114 |
1 |
|
T1 |
1 |
|
T6 |
4 |
|
T23 |
1 |
| others[3] |
1754 |
1 |
|
T2 |
1 |
|
T6 |
20 |
|
T38 |
3 |
| false |
547 |
1 |
|
T6 |
10 |
|
T20 |
1 |
|
T21 |
1 |
| true |
1372 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T38 |
1 |
|
T24 |
1 |
|
T45 |
1 |
| others[1] |
226 |
1 |
|
T21 |
1 |
|
T38 |
3 |
|
T24 |
1 |
| others[2] |
220 |
1 |
|
T38 |
2 |
|
T45 |
1 |
|
T52 |
6 |
| others[3] |
358 |
1 |
|
T29 |
1 |
|
T41 |
1 |
|
T25 |
3 |
| false |
118 |
1 |
|
T39 |
1 |
|
T25 |
1 |
|
T45 |
1 |
| true |
5762 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T25 |
1 |
|
T45 |
1 |
|
T52 |
15 |
| others[1] |
224 |
1 |
|
T24 |
1 |
|
T34 |
1 |
|
T52 |
8 |
| others[2] |
205 |
1 |
|
T41 |
1 |
|
T25 |
1 |
|
T74 |
1 |
| others[3] |
370 |
1 |
|
T23 |
1 |
|
T24 |
1 |
|
T39 |
1 |
| false |
111 |
1 |
|
T21 |
1 |
|
T52 |
5 |
|
T109 |
5 |
| true |
5787 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1226 |
1 |
|
T2 |
1 |
|
T6 |
15 |
|
T25 |
2 |
| others[1] |
1227 |
1 |
|
T1 |
1 |
|
T6 |
9 |
|
T21 |
1 |
| others[2] |
1272 |
1 |
|
T6 |
15 |
|
T18 |
1 |
|
T29 |
1 |
| others[3] |
2162 |
1 |
|
T6 |
17 |
|
T21 |
1 |
|
T23 |
1 |
| false |
614 |
1 |
|
T6 |
6 |
|
T43 |
1 |
|
T25 |
1 |
| true |
425 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1305 |
1 |
|
T6 |
14 |
|
T21 |
1 |
|
T23 |
1 |
| others[1] |
1252 |
1 |
|
T6 |
7 |
|
T29 |
1 |
|
T25 |
1 |
| others[2] |
1224 |
1 |
|
T2 |
1 |
|
T6 |
12 |
|
T43 |
1 |
| others[3] |
2068 |
1 |
|
T1 |
1 |
|
T6 |
24 |
|
T21 |
1 |
| false |
664 |
1 |
|
T6 |
5 |
|
T18 |
1 |
|
T35 |
1 |
| true |
413 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
105 |
1 |
|
T24 |
1 |
|
T25 |
1 |
|
T52 |
3 |
| others[1] |
77 |
1 |
|
T24 |
1 |
|
T25 |
1 |
|
T52 |
3 |
| others[2] |
105 |
1 |
|
T25 |
3 |
|
T45 |
1 |
|
T52 |
4 |
| others[3] |
186 |
1 |
|
T21 |
2 |
|
T29 |
1 |
|
T23 |
2 |
| false |
52 |
1 |
|
T25 |
1 |
|
T52 |
3 |
|
T343 |
2 |
| true |
6401 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T38 |
1 |
|
T4 |
1 |
|
T24 |
1 |
| others[1] |
232 |
1 |
|
T20 |
1 |
|
T38 |
3 |
|
T42 |
1 |
| others[2] |
257 |
1 |
|
T44 |
1 |
|
T25 |
1 |
|
T34 |
1 |
| others[3] |
410 |
1 |
|
T1 |
1 |
|
T29 |
1 |
|
T38 |
1 |
| false |
101 |
1 |
|
T21 |
1 |
|
T38 |
1 |
|
T25 |
1 |
| true |
5716 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1035 |
1 |
|
T1 |
1 |
|
T6 |
6 |
|
T18 |
1 |
| others[1] |
1114 |
1 |
|
T2 |
1 |
|
T6 |
12 |
|
T21 |
1 |
| others[2] |
1033 |
1 |
|
T6 |
20 |
|
T38 |
2 |
|
T25 |
3 |
| others[3] |
1750 |
1 |
|
T6 |
17 |
|
T11 |
1 |
|
T39 |
1 |
| false |
586 |
1 |
|
T6 |
7 |
|
T21 |
1 |
|
T29 |
1 |
| true |
1408 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
263 |
1 |
|
T25 |
1 |
|
T45 |
2 |
|
T74 |
1 |
| others[1] |
235 |
1 |
|
T42 |
1 |
|
T52 |
9 |
|
T109 |
7 |
| others[2] |
237 |
1 |
|
T3 |
1 |
|
T29 |
1 |
|
T34 |
1 |
| others[3] |
368 |
1 |
|
T21 |
1 |
|
T23 |
1 |
|
T4 |
1 |
| false |
110 |
1 |
|
T21 |
1 |
|
T52 |
4 |
|
T109 |
7 |
| true |
5713 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T23 |
1 |
|
T52 |
12 |
|
T109 |
10 |
| others[1] |
213 |
1 |
|
T34 |
1 |
|
T52 |
7 |
|
T109 |
8 |
| others[2] |
201 |
1 |
|
T45 |
1 |
|
T52 |
12 |
|
T109 |
8 |
| others[3] |
386 |
1 |
|
T4 |
1 |
|
T41 |
1 |
|
T24 |
2 |
| false |
119 |
1 |
|
T52 |
3 |
|
T109 |
4 |
|
T342 |
1 |
| true |
5790 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1285 |
1 |
|
T1 |
1 |
|
T6 |
18 |
|
T18 |
1 |
| others[1] |
1203 |
1 |
|
T6 |
11 |
|
T29 |
1 |
|
T25 |
1 |
| others[2] |
1294 |
1 |
|
T6 |
10 |
|
T23 |
1 |
|
T25 |
1 |
| others[3] |
2083 |
1 |
|
T2 |
1 |
|
T6 |
18 |
|
T21 |
1 |
| false |
639 |
1 |
|
T6 |
5 |
|
T23 |
1 |
|
T24 |
1 |
| true |
422 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1248 |
1 |
|
T6 |
8 |
|
T21 |
1 |
|
T25 |
2 |
| others[1] |
1239 |
1 |
|
T2 |
1 |
|
T6 |
14 |
|
T29 |
1 |
| others[2] |
1262 |
1 |
|
T6 |
14 |
|
T21 |
1 |
|
T23 |
1 |
| others[3] |
2107 |
1 |
|
T1 |
1 |
|
T6 |
21 |
|
T18 |
1 |
| false |
664 |
1 |
|
T6 |
5 |
|
T23 |
1 |
|
T25 |
2 |
| true |
406 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
117 |
1 |
|
T23 |
1 |
|
T4 |
1 |
|
T52 |
3 |
| others[1] |
98 |
1 |
|
T25 |
2 |
|
T52 |
5 |
|
T109 |
4 |
| others[2] |
107 |
1 |
|
T21 |
1 |
|
T25 |
5 |
|
T52 |
2 |
| others[3] |
158 |
1 |
|
T21 |
1 |
|
T29 |
1 |
|
T23 |
1 |
| false |
57 |
1 |
|
T24 |
1 |
|
T52 |
5 |
|
T56 |
1 |
| true |
6389 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
239 |
1 |
|
T25 |
1 |
|
T45 |
1 |
|
T52 |
9 |
| others[1] |
237 |
1 |
|
T39 |
1 |
|
T25 |
2 |
|
T45 |
2 |
| others[2] |
251 |
1 |
|
T3 |
1 |
|
T42 |
1 |
|
T25 |
1 |
| others[3] |
399 |
1 |
|
T1 |
1 |
|
T23 |
1 |
|
T24 |
1 |
| false |
117 |
1 |
|
T24 |
1 |
|
T25 |
1 |
|
T52 |
4 |
| true |
5683 |
1 |
|
T2 |
1 |
|
T6 |
62 |
|
T18 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |