Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_2.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_3.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_4.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_4.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_4.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_4.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_4.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.mp_region_cfg_4.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10392 |
1 |
|
T6 |
15 |
|
T5 |
1 |
|
T25 |
5 |
| others[1] |
811 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
17 |
| others[2] |
811 |
1 |
|
T6 |
8 |
|
T18 |
1 |
|
T29 |
1 |
| others[3] |
1345 |
1 |
|
T6 |
19 |
|
T20 |
1 |
|
T24 |
1 |
| false |
415 |
1 |
|
T6 |
3 |
|
T52 |
16 |
|
T109 |
7 |
| true |
487 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T21 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
2458 |
1 |
|
T2 |
1 |
|
T6 |
14 |
|
T21 |
1 |
| others[1] |
2469 |
1 |
|
T6 |
12 |
|
T43 |
1 |
|
T25 |
1 |
| others[2] |
2474 |
1 |
|
T6 |
10 |
|
T23 |
1 |
|
T25 |
2 |
| others[3] |
4065 |
1 |
|
T6 |
23 |
|
T18 |
1 |
|
T21 |
1 |
| false |
1288 |
1 |
|
T6 |
3 |
|
T23 |
1 |
|
T35 |
1 |
| true |
1507 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9856 |
1 |
|
T23 |
1 |
|
T38 |
1 |
|
T24 |
1 |
| others[1] |
284 |
1 |
|
T38 |
2 |
|
T33 |
1 |
|
T144 |
1 |
| others[2] |
291 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T24 |
1 |
| others[3] |
460 |
1 |
|
T18 |
1 |
|
T21 |
1 |
|
T29 |
1 |
| false |
123 |
1 |
|
T20 |
1 |
|
T23 |
1 |
|
T38 |
1 |
| true |
3247 |
1 |
|
T3 |
1 |
|
T6 |
62 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10070 |
1 |
|
T6 |
6 |
|
T21 |
1 |
|
T38 |
2 |
| others[1] |
481 |
1 |
|
T1 |
1 |
|
T6 |
4 |
|
T21 |
1 |
| others[2] |
446 |
1 |
|
T2 |
1 |
|
T6 |
8 |
|
T18 |
1 |
| others[3] |
796 |
1 |
|
T6 |
10 |
|
T19 |
1 |
|
T29 |
1 |
| false |
278 |
1 |
|
T6 |
1 |
|
T23 |
1 |
|
T4 |
1 |
| true |
2190 |
1 |
|
T3 |
1 |
|
T6 |
33 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9831 |
1 |
|
T2 |
1 |
|
T25 |
1 |
|
T45 |
1 |
| others[1] |
242 |
1 |
|
T18 |
1 |
|
T144 |
1 |
|
T52 |
10 |
| others[2] |
267 |
1 |
|
T20 |
1 |
|
T21 |
1 |
|
T45 |
1 |
| others[3] |
431 |
1 |
|
T1 |
1 |
|
T21 |
1 |
|
T29 |
1 |
| false |
122 |
1 |
|
T52 |
3 |
|
T109 |
3 |
|
T57 |
1 |
| true |
3368 |
1 |
|
T3 |
1 |
|
T6 |
62 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9846 |
1 |
|
T1 |
1 |
|
T73 |
128 |
|
T33 |
1 |
| others[1] |
255 |
1 |
|
T21 |
1 |
|
T41 |
1 |
|
T24 |
1 |
| others[2] |
252 |
1 |
|
T21 |
1 |
|
T25 |
1 |
|
T52 |
9 |
| others[3] |
419 |
1 |
|
T18 |
1 |
|
T39 |
1 |
|
T25 |
2 |
| false |
143 |
1 |
|
T23 |
1 |
|
T4 |
1 |
|
T25 |
1 |
| true |
3346 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10428 |
1 |
|
T6 |
17 |
|
T21 |
1 |
|
T29 |
1 |
| others[1] |
793 |
1 |
|
T6 |
7 |
|
T21 |
1 |
|
T35 |
1 |
| others[2] |
790 |
1 |
|
T2 |
1 |
|
T6 |
14 |
|
T144 |
1 |
| others[3] |
1342 |
1 |
|
T1 |
1 |
|
T6 |
19 |
|
T18 |
1 |
| false |
427 |
1 |
|
T6 |
5 |
|
T25 |
1 |
|
T74 |
1 |
| true |
481 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10382 |
1 |
|
T1 |
1 |
|
T6 |
9 |
|
T25 |
1 |
| others[1] |
826 |
1 |
|
T6 |
10 |
|
T29 |
1 |
|
T25 |
2 |
| others[2] |
775 |
1 |
|
T6 |
12 |
|
T25 |
1 |
|
T52 |
21 |
| others[3] |
1344 |
1 |
|
T2 |
1 |
|
T6 |
26 |
|
T18 |
1 |
| false |
401 |
1 |
|
T6 |
5 |
|
T23 |
1 |
|
T43 |
1 |
| true |
506 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
2410 |
1 |
|
T6 |
7 |
|
T18 |
1 |
|
T21 |
1 |
| others[1] |
2454 |
1 |
|
T6 |
17 |
|
T23 |
1 |
|
T25 |
1 |
| others[2] |
2417 |
1 |
|
T2 |
1 |
|
T6 |
13 |
|
T23 |
1 |
| others[3] |
4128 |
1 |
|
T6 |
23 |
|
T29 |
1 |
|
T25 |
2 |
| false |
1267 |
1 |
|
T6 |
2 |
|
T21 |
1 |
|
T25 |
2 |
| true |
1558 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9845 |
1 |
|
T25 |
2 |
|
T45 |
1 |
|
T73 |
128 |
| others[1] |
265 |
1 |
|
T1 |
1 |
|
T45 |
1 |
|
T33 |
1 |
| others[2] |
259 |
1 |
|
T44 |
1 |
|
T35 |
1 |
|
T52 |
6 |
| others[3] |
457 |
1 |
|
T2 |
1 |
|
T20 |
1 |
|
T29 |
1 |
| false |
140 |
1 |
|
T52 |
4 |
|
T109 |
2 |
|
T134 |
1 |
| true |
3268 |
1 |
|
T3 |
1 |
|
T6 |
62 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10029 |
1 |
|
T6 |
7 |
|
T23 |
1 |
|
T11 |
1 |
| others[1] |
459 |
1 |
|
T6 |
5 |
|
T24 |
2 |
|
T25 |
2 |
| others[2] |
467 |
1 |
|
T6 |
4 |
|
T18 |
1 |
|
T21 |
2 |
| others[3] |
810 |
1 |
|
T2 |
1 |
|
T6 |
11 |
|
T19 |
1 |
| false |
226 |
1 |
|
T1 |
1 |
|
T6 |
2 |
|
T43 |
1 |
| true |
2243 |
1 |
|
T3 |
1 |
|
T6 |
33 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9857 |
1 |
|
T29 |
1 |
|
T23 |
1 |
|
T73 |
128 |
| others[1] |
270 |
1 |
|
T1 |
1 |
|
T21 |
1 |
|
T23 |
1 |
| others[2] |
265 |
1 |
|
T38 |
1 |
|
T25 |
1 |
|
T45 |
1 |
| others[3] |
422 |
1 |
|
T38 |
2 |
|
T24 |
1 |
|
T43 |
1 |
| false |
141 |
1 |
|
T38 |
2 |
|
T24 |
1 |
|
T25 |
1 |
| true |
3279 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9838 |
1 |
|
T45 |
1 |
|
T73 |
128 |
|
T76 |
100 |
| others[1] |
238 |
1 |
|
T25 |
1 |
|
T45 |
1 |
|
T52 |
15 |
| others[2] |
251 |
1 |
|
T23 |
2 |
|
T43 |
1 |
|
T25 |
1 |
| others[3] |
431 |
1 |
|
T1 |
1 |
|
T21 |
1 |
|
T25 |
3 |
| false |
123 |
1 |
|
T18 |
1 |
|
T25 |
1 |
|
T52 |
5 |
| true |
3353 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
62 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10395 |
1 |
|
T6 |
14 |
|
T23 |
1 |
|
T25 |
2 |
| others[1] |
768 |
1 |
|
T6 |
10 |
|
T24 |
1 |
|
T45 |
1 |
| others[2] |
779 |
1 |
|
T6 |
13 |
|
T18 |
1 |
|
T21 |
1 |
| others[3] |
1386 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
19 |
| false |
426 |
1 |
|
T6 |
6 |
|
T24 |
1 |
|
T45 |
1 |
| true |
480 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10378 |
1 |
|
T6 |
9 |
|
T43 |
1 |
|
T25 |
2 |
| others[1] |
792 |
1 |
|
T6 |
12 |
|
T18 |
1 |
|
T21 |
1 |
| others[2] |
794 |
1 |
|
T1 |
1 |
|
T6 |
17 |
|
T52 |
22 |
| others[3] |
1349 |
1 |
|
T2 |
1 |
|
T6 |
19 |
|
T21 |
1 |
| false |
407 |
1 |
|
T6 |
5 |
|
T25 |
1 |
|
T35 |
1 |
| true |
514 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
2524 |
1 |
|
T6 |
8 |
|
T18 |
1 |
|
T24 |
2 |
| others[1] |
2364 |
1 |
|
T6 |
11 |
|
T29 |
1 |
|
T23 |
1 |
| others[2] |
2451 |
1 |
|
T6 |
14 |
|
T23 |
1 |
|
T25 |
2 |
| others[3] |
4170 |
1 |
|
T2 |
1 |
|
T6 |
24 |
|
T21 |
2 |
| false |
1230 |
1 |
|
T6 |
5 |
|
T25 |
1 |
|
T73 |
12 |
| true |
1495 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9815 |
1 |
|
T38 |
2 |
|
T4 |
1 |
|
T42 |
1 |
| others[1] |
289 |
1 |
|
T21 |
1 |
|
T38 |
3 |
|
T25 |
1 |
| others[2] |
265 |
1 |
|
T38 |
1 |
|
T25 |
1 |
|
T45 |
1 |
| others[3] |
469 |
1 |
|
T18 |
1 |
|
T29 |
1 |
|
T24 |
1 |
| false |
157 |
1 |
|
T25 |
2 |
|
T144 |
1 |
|
T52 |
7 |
| true |
3239 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10083 |
1 |
|
T2 |
1 |
|
T6 |
7 |
|
T10 |
1 |
| others[1] |
467 |
1 |
|
T6 |
8 |
|
T20 |
1 |
|
T21 |
1 |
| others[2] |
458 |
1 |
|
T6 |
10 |
|
T21 |
1 |
|
T23 |
1 |
| others[3] |
742 |
1 |
|
T3 |
1 |
|
T6 |
9 |
|
T38 |
3 |
| false |
242 |
1 |
|
T6 |
4 |
|
T23 |
1 |
|
T42 |
1 |
| true |
2242 |
1 |
|
T1 |
1 |
|
T6 |
24 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9833 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T44 |
1 |
| others[1] |
259 |
1 |
|
T41 |
1 |
|
T24 |
1 |
|
T45 |
1 |
| others[2] |
231 |
1 |
|
T2 |
1 |
|
T23 |
1 |
|
T25 |
3 |
| others[3] |
435 |
1 |
|
T4 |
1 |
|
T25 |
3 |
|
T52 |
16 |
| false |
118 |
1 |
|
T18 |
1 |
|
T29 |
1 |
|
T52 |
4 |
| true |
3358 |
1 |
|
T6 |
62 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9808 |
1 |
|
T4 |
1 |
|
T45 |
1 |
|
T73 |
128 |
| others[1] |
226 |
1 |
|
T1 |
1 |
|
T18 |
1 |
|
T21 |
1 |
| others[2] |
266 |
1 |
|
T2 |
1 |
|
T29 |
1 |
|
T39 |
1 |
| others[3] |
403 |
1 |
|
T21 |
1 |
|
T25 |
1 |
|
T33 |
1 |
| false |
127 |
1 |
|
T25 |
1 |
|
T45 |
1 |
|
T34 |
1 |
| true |
3404 |
1 |
|
T3 |
1 |
|
T6 |
62 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10357 |
1 |
|
T6 |
9 |
|
T18 |
1 |
|
T23 |
1 |
| others[1] |
796 |
1 |
|
T6 |
9 |
|
T21 |
1 |
|
T52 |
20 |
| others[2] |
814 |
1 |
|
T2 |
1 |
|
T6 |
11 |
|
T20 |
1 |
| others[3] |
1375 |
1 |
|
T1 |
1 |
|
T6 |
26 |
|
T43 |
1 |
| false |
415 |
1 |
|
T6 |
7 |
|
T24 |
1 |
|
T35 |
1 |
| true |
477 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T21 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10355 |
1 |
|
T1 |
1 |
|
T6 |
13 |
|
T18 |
1 |
| others[1] |
847 |
1 |
|
T6 |
16 |
|
T43 |
1 |
|
T35 |
1 |
| others[2] |
796 |
1 |
|
T6 |
14 |
|
T29 |
1 |
|
T191 |
1 |
| others[3] |
1330 |
1 |
|
T2 |
1 |
|
T6 |
11 |
|
T25 |
1 |
| false |
405 |
1 |
|
T6 |
8 |
|
T52 |
9 |
|
T109 |
8 |
| true |
501 |
1 |
|
T3 |
1 |
|
T20 |
1 |
|
T21 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
2494 |
1 |
|
T6 |
12 |
|
T24 |
1 |
|
T25 |
2 |
| others[1] |
2386 |
1 |
|
T6 |
11 |
|
T18 |
1 |
|
T21 |
1 |
| others[2] |
2464 |
1 |
|
T6 |
12 |
|
T29 |
1 |
|
T23 |
1 |
| others[3] |
4085 |
1 |
|
T2 |
1 |
|
T6 |
22 |
|
T21 |
1 |
| false |
1267 |
1 |
|
T6 |
5 |
|
T73 |
19 |
|
T144 |
1 |
| true |
1538 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9842 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T23 |
1 |
| others[1] |
293 |
1 |
|
T38 |
1 |
|
T24 |
1 |
|
T25 |
1 |
| others[2] |
262 |
1 |
|
T2 |
1 |
|
T38 |
2 |
|
T4 |
1 |
| others[3] |
435 |
1 |
|
T38 |
1 |
|
T39 |
1 |
|
T45 |
1 |
| false |
130 |
1 |
|
T52 |
7 |
|
T109 |
5 |
|
T200 |
1 |
| true |
3272 |
1 |
|
T6 |
62 |
|
T18 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10037 |
1 |
|
T6 |
6 |
|
T73 |
128 |
|
T76 |
100 |
| others[1] |
443 |
1 |
|
T6 |
8 |
|
T23 |
2 |
|
T38 |
1 |
| others[2] |
448 |
1 |
|
T6 |
9 |
|
T10 |
1 |
|
T38 |
2 |
| others[3] |
788 |
1 |
|
T6 |
7 |
|
T18 |
1 |
|
T19 |
1 |
| false |
247 |
1 |
|
T6 |
3 |
|
T38 |
1 |
|
T25 |
3 |
| true |
2271 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9817 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T23 |
1 |
| others[1] |
282 |
1 |
|
T38 |
1 |
|
T25 |
1 |
|
T45 |
1 |
| others[2] |
262 |
1 |
|
T38 |
4 |
|
T41 |
1 |
|
T43 |
1 |
| others[3] |
415 |
1 |
|
T18 |
1 |
|
T29 |
1 |
|
T4 |
1 |
| false |
144 |
1 |
|
T45 |
1 |
|
T52 |
4 |
|
T109 |
3 |
| true |
3314 |
1 |
|
T2 |
1 |
|
T6 |
62 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9820 |
1 |
|
T1 |
1 |
|
T73 |
128 |
|
T74 |
1 |
| others[1] |
252 |
1 |
|
T23 |
1 |
|
T24 |
1 |
|
T25 |
1 |
| others[2] |
228 |
1 |
|
T25 |
2 |
|
T45 |
1 |
|
T52 |
8 |
| others[3] |
422 |
1 |
|
T2 |
1 |
|
T18 |
1 |
|
T21 |
1 |
| false |
131 |
1 |
|
T29 |
1 |
|
T25 |
1 |
|
T52 |
6 |
| true |
3381 |
1 |
|
T3 |
1 |
|
T6 |
62 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10365 |
1 |
|
T6 |
17 |
|
T25 |
1 |
|
T35 |
1 |
| others[1] |
827 |
1 |
|
T6 |
15 |
|
T18 |
1 |
|
T45 |
1 |
| others[2] |
788 |
1 |
|
T6 |
6 |
|
T23 |
1 |
|
T4 |
1 |
| others[3] |
1346 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
20 |
| false |
425 |
1 |
|
T6 |
4 |
|
T25 |
1 |
|
T52 |
8 |
| true |
483 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T20 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
10408 |
1 |
|
T6 |
13 |
|
T21 |
1 |
|
T23 |
1 |
| others[1] |
794 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T6 |
15 |
| others[2] |
789 |
1 |
|
T6 |
11 |
|
T29 |
1 |
|
T74 |
1 |
| others[3] |
1339 |
1 |
|
T6 |
17 |
|
T19 |
1 |
|
T24 |
1 |
| false |
414 |
1 |
|
T6 |
6 |
|
T18 |
1 |
|
T43 |
1 |
| true |
490 |
1 |
|
T3 |
1 |
|
T20 |
1 |
|
T21 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
2446 |
1 |
|
T6 |
12 |
|
T29 |
1 |
|
T23 |
1 |
| others[1] |
2504 |
1 |
|
T6 |
11 |
|
T25 |
5 |
|
T45 |
1 |
| others[2] |
2526 |
1 |
|
T6 |
16 |
|
T43 |
1 |
|
T35 |
1 |
| others[3] |
4036 |
1 |
|
T2 |
1 |
|
T6 |
23 |
|
T18 |
1 |
| false |
1223 |
1 |
|
T73 |
12 |
|
T76 |
7 |
|
T52 |
6 |
| true |
1499 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
9828 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T38 |
1 |
| others[1] |
263 |
1 |
|
T23 |
1 |
|
T4 |
1 |
|
T41 |
1 |
| others[2] |
283 |
1 |
|
T38 |
1 |
|
T45 |
2 |
|
T52 |
7 |
| others[3] |
494 |
1 |
|
T1 |
1 |
|
T21 |
1 |
|
T38 |
2 |
| false |
139 |
1 |
|
T38 |
2 |
|
T25 |
1 |
|
T35 |
1 |
| true |
3227 |
1 |
|
T6 |
62 |
|
T18 |
1 |
|
T19 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |