Summary for Variable instr_type_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for instr_type_cp
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| others | 
4980 | 
1 | 
 | 
T29 | 
177 | 
 | 
T30 | 
77 | 
 | 
T31 | 
49 | 
| instr_types[0] | 
6336 | 
1 | 
 | 
T29 | 
221 | 
 | 
T30 | 
197 | 
 | 
T31 | 
246 | 
| instr_types[1] | 
4341679 | 
1 | 
 | 
T2 | 
18 | 
 | 
T3 | 
16922 | 
 | 
T4 | 
142 | 
Summary for Variable key_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for key_cp
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
4350926 | 
1 | 
 | 
T2 | 
18 | 
 | 
T3 | 
16922 | 
 | 
T4 | 
142 | 
| auto[1] | 
2069 | 
1 | 
 | 
T29 | 
252 | 
 | 
T30 | 
175 | 
 | 
T31 | 
215 | 
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
6 | 
0 | 
6 | 
100.00 | 
 | 
Automatically Generated Cross Bins for key_instr_cross
Bins
| key_cp | instr_type_cp | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
others | 
4533 | 
1 | 
 | 
T29 | 
80 | 
 | 
T30 | 
13 | 
 | 
T31 | 
15 | 
| auto[0] | 
instr_types[0] | 
5445 | 
1 | 
 | 
T29 | 
148 | 
 | 
T30 | 
148 | 
 | 
T31 | 
182 | 
| auto[0] | 
instr_types[1] | 
4340948 | 
1 | 
 | 
T2 | 
18 | 
 | 
T3 | 
16922 | 
 | 
T4 | 
142 | 
| auto[1] | 
others | 
447 | 
1 | 
 | 
T29 | 
97 | 
 | 
T30 | 
64 | 
 | 
T31 | 
34 | 
| auto[1] | 
instr_types[0] | 
891 | 
1 | 
 | 
T29 | 
73 | 
 | 
T30 | 
49 | 
 | 
T31 | 
64 | 
| auto[1] | 
instr_types[1] | 
731 | 
1 | 
 | 
T29 | 
82 | 
 | 
T30 | 
62 | 
 | 
T31 | 
117 |