Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
200 |
1 |
|
T1 |
12 |
|
T43 |
1 |
|
T69 |
1 |
| others[1] |
212 |
1 |
|
T1 |
14 |
|
T5 |
1 |
|
T126 |
1 |
| others[2] |
242 |
1 |
|
T1 |
10 |
|
T27 |
1 |
|
T210 |
1 |
| others[3] |
442 |
1 |
|
T1 |
21 |
|
T27 |
1 |
|
T59 |
1 |
| false |
104 |
1 |
|
T1 |
2 |
|
T27 |
2 |
|
T348 |
1 |
| true |
13169 |
1 |
|
T1 |
42 |
|
T2 |
44 |
|
T3 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8700 |
1 |
|
T1 |
19 |
|
T2 |
44 |
|
T3 |
2 |
| others[1] |
1272 |
1 |
|
T1 |
17 |
|
T17 |
15 |
|
T23 |
2 |
| others[2] |
1231 |
1 |
|
T1 |
20 |
|
T17 |
21 |
|
T19 |
1 |
| others[3] |
2031 |
1 |
|
T1 |
33 |
|
T17 |
35 |
|
T18 |
1 |
| false |
687 |
1 |
|
T1 |
12 |
|
T17 |
13 |
|
T132 |
1 |
| true |
448 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8698 |
1 |
|
T1 |
18 |
|
T2 |
44 |
|
T3 |
2 |
| others[1] |
1243 |
1 |
|
T1 |
9 |
|
T17 |
13 |
|
T23 |
1 |
| others[2] |
1294 |
1 |
|
T1 |
23 |
|
T17 |
28 |
|
T23 |
2 |
| others[3] |
2086 |
1 |
|
T1 |
34 |
|
T16 |
1 |
|
T17 |
33 |
| false |
628 |
1 |
|
T1 |
17 |
|
T17 |
7 |
|
T24 |
2 |
| true |
420 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
122 |
1 |
|
T1 |
9 |
|
T63 |
1 |
|
T126 |
1 |
| others[1] |
106 |
1 |
|
T1 |
5 |
|
T210 |
1 |
|
T126 |
1 |
| others[2] |
109 |
1 |
|
T1 |
1 |
|
T210 |
1 |
|
T347 |
1 |
| others[3] |
172 |
1 |
|
T1 |
6 |
|
T43 |
1 |
|
T59 |
1 |
| false |
60 |
1 |
|
T1 |
2 |
|
T27 |
1 |
|
T348 |
3 |
| true |
13800 |
1 |
|
T1 |
78 |
|
T2 |
44 |
|
T3 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
260 |
1 |
|
T1 |
12 |
|
T63 |
1 |
|
T350 |
1 |
| others[1] |
243 |
1 |
|
T1 |
10 |
|
T39 |
1 |
|
T79 |
1 |
| others[2] |
224 |
1 |
|
T1 |
9 |
|
T8 |
1 |
|
T69 |
1 |
| others[3] |
378 |
1 |
|
T1 |
13 |
|
T9 |
1 |
|
T20 |
1 |
| false |
106 |
1 |
|
T1 |
1 |
|
T27 |
1 |
|
T53 |
7 |
| true |
13158 |
1 |
|
T1 |
56 |
|
T2 |
44 |
|
T3 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8471 |
1 |
|
T1 |
21 |
|
T2 |
44 |
|
T3 |
2 |
| others[1] |
1026 |
1 |
|
T1 |
12 |
|
T17 |
9 |
|
T23 |
3 |
| others[2] |
1069 |
1 |
|
T1 |
21 |
|
T16 |
1 |
|
T17 |
11 |
| others[3] |
1845 |
1 |
|
T1 |
34 |
|
T17 |
14 |
|
T18 |
2 |
| false |
552 |
1 |
|
T1 |
13 |
|
T17 |
3 |
|
T23 |
2 |
| true |
1406 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T17 |
57 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T1 |
9 |
|
T77 |
1 |
|
T126 |
1 |
| others[1] |
251 |
1 |
|
T1 |
8 |
|
T78 |
1 |
|
T348 |
2 |
| others[2] |
207 |
1 |
|
T1 |
7 |
|
T8 |
1 |
|
T63 |
1 |
| others[3] |
398 |
1 |
|
T1 |
11 |
|
T9 |
1 |
|
T19 |
1 |
| false |
136 |
1 |
|
T1 |
4 |
|
T115 |
1 |
|
T348 |
2 |
| true |
13161 |
1 |
|
T1 |
62 |
|
T2 |
44 |
|
T3 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
218 |
1 |
|
T1 |
12 |
|
T5 |
1 |
|
T9 |
1 |
| others[1] |
214 |
1 |
|
T1 |
7 |
|
T210 |
1 |
|
T348 |
1 |
| others[2] |
221 |
1 |
|
T1 |
8 |
|
T349 |
1 |
|
T347 |
1 |
| others[3] |
352 |
1 |
|
T1 |
14 |
|
T27 |
1 |
|
T210 |
1 |
| false |
116 |
1 |
|
T1 |
9 |
|
T53 |
9 |
|
T54 |
6 |
| true |
13248 |
1 |
|
T1 |
51 |
|
T2 |
44 |
|
T3 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8762 |
1 |
|
T1 |
12 |
|
T2 |
44 |
|
T3 |
2 |
| others[1] |
1260 |
1 |
|
T1 |
23 |
|
T17 |
11 |
|
T7 |
1 |
| others[2] |
1184 |
1 |
|
T1 |
21 |
|
T17 |
22 |
|
T19 |
1 |
| others[3] |
2040 |
1 |
|
T1 |
35 |
|
T17 |
40 |
|
T23 |
1 |
| false |
671 |
1 |
|
T1 |
10 |
|
T17 |
4 |
|
T23 |
3 |
| true |
452 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1251 |
1 |
|
T1 |
23 |
|
T17 |
19 |
|
T23 |
3 |
| others[1] |
1289 |
1 |
|
T1 |
16 |
|
T17 |
14 |
|
T7 |
1 |
| others[2] |
1257 |
1 |
|
T1 |
24 |
|
T17 |
21 |
|
T43 |
1 |
| others[3] |
2078 |
1 |
|
T1 |
31 |
|
T16 |
1 |
|
T17 |
30 |
| false |
654 |
1 |
|
T1 |
7 |
|
T17 |
16 |
|
T23 |
1 |
| true |
426 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
94 |
1 |
|
T1 |
1 |
|
T126 |
1 |
|
T348 |
4 |
| others[1] |
103 |
1 |
|
T1 |
8 |
|
T43 |
1 |
|
T126 |
1 |
| others[2] |
108 |
1 |
|
T1 |
2 |
|
T210 |
1 |
|
T348 |
5 |
| others[3] |
162 |
1 |
|
T1 |
4 |
|
T27 |
1 |
|
T210 |
1 |
| false |
55 |
1 |
|
T27 |
1 |
|
T348 |
2 |
|
T53 |
5 |
| true |
6433 |
1 |
|
T1 |
86 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T1 |
7 |
|
T59 |
1 |
|
T210 |
1 |
| others[1] |
249 |
1 |
|
T1 |
13 |
|
T20 |
1 |
|
T210 |
1 |
| others[2] |
230 |
1 |
|
T1 |
8 |
|
T9 |
1 |
|
T347 |
1 |
| others[3] |
388 |
1 |
|
T1 |
16 |
|
T5 |
1 |
|
T27 |
2 |
| false |
113 |
1 |
|
T1 |
6 |
|
T84 |
1 |
|
T53 |
3 |
| true |
5746 |
1 |
|
T1 |
51 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1056 |
1 |
|
T1 |
15 |
|
T17 |
8 |
|
T23 |
1 |
| others[1] |
1055 |
1 |
|
T1 |
15 |
|
T16 |
1 |
|
T17 |
10 |
| others[2] |
1066 |
1 |
|
T1 |
26 |
|
T17 |
12 |
|
T7 |
1 |
| others[3] |
1846 |
1 |
|
T1 |
32 |
|
T4 |
1 |
|
T17 |
21 |
| false |
550 |
1 |
|
T1 |
13 |
|
T17 |
4 |
|
T8 |
1 |
| true |
1382 |
1 |
|
T5 |
1 |
|
T17 |
45 |
|
T18 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
245 |
1 |
|
T1 |
9 |
|
T69 |
1 |
|
T126 |
1 |
| others[1] |
219 |
1 |
|
T1 |
8 |
|
T126 |
1 |
|
T75 |
1 |
| others[2] |
221 |
1 |
|
T1 |
11 |
|
T20 |
1 |
|
T63 |
1 |
| others[3] |
432 |
1 |
|
T1 |
20 |
|
T8 |
1 |
|
T59 |
1 |
| false |
108 |
1 |
|
T1 |
2 |
|
T348 |
1 |
|
T53 |
4 |
| true |
5730 |
1 |
|
T1 |
51 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
241 |
1 |
|
T1 |
9 |
|
T27 |
1 |
|
T63 |
1 |
| others[1] |
223 |
1 |
|
T1 |
5 |
|
T69 |
1 |
|
T210 |
1 |
| others[2] |
220 |
1 |
|
T1 |
12 |
|
T350 |
1 |
|
T348 |
1 |
| others[3] |
367 |
1 |
|
T1 |
23 |
|
T9 |
1 |
|
T27 |
1 |
| false |
112 |
1 |
|
T1 |
5 |
|
T27 |
1 |
|
T210 |
1 |
| true |
5792 |
1 |
|
T1 |
47 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1244 |
1 |
|
T1 |
21 |
|
T17 |
12 |
|
T7 |
1 |
| others[1] |
1260 |
1 |
|
T1 |
22 |
|
T17 |
26 |
|
T19 |
1 |
| others[2] |
1291 |
1 |
|
T1 |
20 |
|
T17 |
24 |
|
T18 |
1 |
| others[3] |
2081 |
1 |
|
T1 |
30 |
|
T16 |
1 |
|
T17 |
33 |
| false |
645 |
1 |
|
T1 |
8 |
|
T17 |
5 |
|
T23 |
3 |
| true |
434 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1254 |
1 |
|
T1 |
22 |
|
T17 |
27 |
|
T7 |
1 |
| others[1] |
1229 |
1 |
|
T1 |
20 |
|
T17 |
13 |
|
T23 |
1 |
| others[2] |
1266 |
1 |
|
T1 |
19 |
|
T17 |
20 |
|
T23 |
4 |
| others[3] |
2130 |
1 |
|
T1 |
32 |
|
T16 |
1 |
|
T17 |
34 |
| false |
654 |
1 |
|
T1 |
8 |
|
T17 |
6 |
|
T23 |
1 |
| true |
422 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
111 |
1 |
|
T1 |
3 |
|
T347 |
1 |
|
T126 |
2 |
| others[1] |
102 |
1 |
|
T1 |
6 |
|
T210 |
1 |
|
T126 |
2 |
| others[2] |
111 |
1 |
|
T1 |
3 |
|
T27 |
1 |
|
T210 |
1 |
| others[3] |
190 |
1 |
|
T1 |
9 |
|
T348 |
6 |
|
T53 |
4 |
| false |
50 |
1 |
|
T1 |
6 |
|
T348 |
1 |
|
T53 |
2 |
| true |
6391 |
1 |
|
T1 |
74 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
239 |
1 |
|
T1 |
7 |
|
T34 |
1 |
|
T210 |
1 |
| others[1] |
258 |
1 |
|
T1 |
10 |
|
T59 |
1 |
|
T239 |
1 |
| others[2] |
226 |
1 |
|
T1 |
13 |
|
T27 |
1 |
|
T217 |
1 |
| others[3] |
404 |
1 |
|
T1 |
16 |
|
T27 |
1 |
|
T90 |
1 |
| false |
122 |
1 |
|
T1 |
8 |
|
T351 |
1 |
|
T350 |
1 |
| true |
5706 |
1 |
|
T1 |
47 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1048 |
1 |
|
T1 |
12 |
|
T17 |
10 |
|
T7 |
1 |
| others[1] |
1049 |
1 |
|
T1 |
24 |
|
T17 |
8 |
|
T19 |
1 |
| others[2] |
1074 |
1 |
|
T1 |
17 |
|
T4 |
1 |
|
T17 |
10 |
| others[3] |
1841 |
1 |
|
T1 |
36 |
|
T16 |
1 |
|
T5 |
1 |
| false |
558 |
1 |
|
T1 |
12 |
|
T17 |
4 |
|
T27 |
1 |
| true |
1385 |
1 |
|
T17 |
51 |
|
T6 |
1 |
|
T9 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
246 |
1 |
|
T1 |
7 |
|
T59 |
1 |
|
T126 |
1 |
| others[1] |
239 |
1 |
|
T1 |
14 |
|
T78 |
1 |
|
T348 |
1 |
| others[2] |
241 |
1 |
|
T1 |
6 |
|
T27 |
1 |
|
T34 |
1 |
| others[3] |
385 |
1 |
|
T1 |
15 |
|
T19 |
1 |
|
T20 |
1 |
| false |
117 |
1 |
|
T1 |
8 |
|
T43 |
1 |
|
T53 |
4 |
| true |
5727 |
1 |
|
T1 |
51 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
247 |
1 |
|
T1 |
10 |
|
T27 |
1 |
|
T59 |
1 |
| others[1] |
241 |
1 |
|
T1 |
5 |
|
T43 |
1 |
|
T348 |
2 |
| others[2] |
193 |
1 |
|
T1 |
12 |
|
T348 |
1 |
|
T53 |
11 |
| others[3] |
367 |
1 |
|
T1 |
13 |
|
T27 |
2 |
|
T126 |
1 |
| false |
133 |
1 |
|
T1 |
2 |
|
T210 |
1 |
|
T126 |
1 |
| true |
5774 |
1 |
|
T1 |
59 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1234 |
1 |
|
T1 |
26 |
|
T17 |
11 |
|
T23 |
2 |
| others[1] |
1257 |
1 |
|
T1 |
16 |
|
T17 |
19 |
|
T18 |
1 |
| others[2] |
1291 |
1 |
|
T1 |
23 |
|
T16 |
1 |
|
T17 |
23 |
| others[3] |
2100 |
1 |
|
T1 |
29 |
|
T17 |
37 |
|
T6 |
1 |
| false |
629 |
1 |
|
T1 |
7 |
|
T17 |
10 |
|
T7 |
1 |
| true |
444 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1254 |
1 |
|
T1 |
19 |
|
T17 |
21 |
|
T43 |
1 |
| others[1] |
1234 |
1 |
|
T1 |
19 |
|
T17 |
16 |
|
T23 |
2 |
| others[2] |
1305 |
1 |
|
T1 |
24 |
|
T17 |
15 |
|
T7 |
1 |
| others[3] |
2089 |
1 |
|
T1 |
34 |
|
T16 |
1 |
|
T17 |
38 |
| false |
656 |
1 |
|
T1 |
5 |
|
T17 |
10 |
|
T130 |
1 |
| true |
417 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
122 |
1 |
|
T1 |
3 |
|
T126 |
2 |
|
T351 |
1 |
| others[1] |
103 |
1 |
|
T1 |
1 |
|
T347 |
1 |
|
T126 |
1 |
| others[2] |
121 |
1 |
|
T1 |
4 |
|
T27 |
2 |
|
T210 |
1 |
| others[3] |
184 |
1 |
|
T1 |
4 |
|
T27 |
1 |
|
T63 |
1 |
| false |
69 |
1 |
|
T1 |
3 |
|
T352 |
1 |
|
T348 |
1 |
| true |
6356 |
1 |
|
T1 |
86 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
260 |
1 |
|
T1 |
10 |
|
T20 |
1 |
|
T27 |
1 |
| others[1] |
230 |
1 |
|
T1 |
11 |
|
T5 |
1 |
|
T210 |
1 |
| others[2] |
218 |
1 |
|
T1 |
9 |
|
T19 |
1 |
|
T27 |
1 |
| others[3] |
389 |
1 |
|
T1 |
15 |
|
T349 |
1 |
|
T126 |
1 |
| false |
111 |
1 |
|
T1 |
5 |
|
T34 |
1 |
|
T39 |
1 |
| true |
5747 |
1 |
|
T1 |
51 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1088 |
1 |
|
T1 |
18 |
|
T17 |
11 |
|
T7 |
1 |
| others[1] |
1118 |
1 |
|
T1 |
17 |
|
T4 |
1 |
|
T17 |
11 |
| others[2] |
1077 |
1 |
|
T1 |
24 |
|
T16 |
1 |
|
T17 |
5 |
| others[3] |
1727 |
1 |
|
T1 |
28 |
|
T17 |
16 |
|
T23 |
5 |
| false |
554 |
1 |
|
T1 |
14 |
|
T17 |
2 |
|
T18 |
2 |
| true |
1391 |
1 |
|
T5 |
1 |
|
T17 |
55 |
|
T9 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
245 |
1 |
|
T1 |
13 |
|
T19 |
1 |
|
T27 |
1 |
| others[1] |
229 |
1 |
|
T1 |
5 |
|
T27 |
2 |
|
T348 |
1 |
| others[2] |
225 |
1 |
|
T1 |
10 |
|
T27 |
1 |
|
T63 |
1 |
| others[3] |
375 |
1 |
|
T1 |
13 |
|
T210 |
1 |
|
T218 |
1 |
| false |
124 |
1 |
|
T1 |
10 |
|
T348 |
1 |
|
T53 |
3 |
| true |
5757 |
1 |
|
T1 |
50 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
195 |
1 |
|
T1 |
5 |
|
T84 |
1 |
|
T53 |
8 |
| others[1] |
223 |
1 |
|
T1 |
9 |
|
T5 |
1 |
|
T210 |
1 |
| others[2] |
220 |
1 |
|
T1 |
9 |
|
T27 |
1 |
|
T348 |
2 |
| others[3] |
376 |
1 |
|
T1 |
9 |
|
T59 |
1 |
|
T63 |
1 |
| false |
112 |
1 |
|
T1 |
7 |
|
T53 |
4 |
|
T54 |
4 |
| true |
5829 |
1 |
|
T1 |
62 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1255 |
1 |
|
T1 |
19 |
|
T17 |
19 |
|
T43 |
1 |
| others[1] |
1249 |
1 |
|
T1 |
25 |
|
T17 |
12 |
|
T23 |
3 |
| others[2] |
1265 |
1 |
|
T1 |
15 |
|
T16 |
1 |
|
T17 |
21 |
| others[3] |
2127 |
1 |
|
T1 |
31 |
|
T17 |
32 |
|
T23 |
3 |
| false |
617 |
1 |
|
T1 |
11 |
|
T17 |
16 |
|
T60 |
1 |
| true |
442 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1239 |
1 |
|
T1 |
18 |
|
T16 |
1 |
|
T17 |
19 |
| others[1] |
1274 |
1 |
|
T1 |
20 |
|
T17 |
23 |
|
T23 |
2 |
| others[2] |
1240 |
1 |
|
T1 |
18 |
|
T17 |
16 |
|
T23 |
4 |
| others[3] |
2163 |
1 |
|
T1 |
37 |
|
T17 |
33 |
|
T23 |
3 |
| false |
619 |
1 |
|
T1 |
8 |
|
T17 |
9 |
|
T43 |
1 |
| true |
420 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |