Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
98 |
1 |
|
T1 |
5 |
|
T27 |
1 |
|
T126 |
1 |
| others[1] |
107 |
1 |
|
T1 |
5 |
|
T351 |
1 |
|
T348 |
5 |
| others[2] |
126 |
1 |
|
T1 |
3 |
|
T210 |
2 |
|
T126 |
1 |
| others[3] |
162 |
1 |
|
T1 |
7 |
|
T126 |
3 |
|
T351 |
1 |
| false |
42 |
1 |
|
T1 |
3 |
|
T347 |
1 |
|
T348 |
1 |
| true |
6420 |
1 |
|
T1 |
78 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
238 |
1 |
|
T1 |
6 |
|
T210 |
1 |
|
T62 |
1 |
| others[1] |
230 |
1 |
|
T1 |
8 |
|
T69 |
1 |
|
T63 |
1 |
| others[2] |
263 |
1 |
|
T1 |
7 |
|
T20 |
1 |
|
T27 |
1 |
| others[3] |
388 |
1 |
|
T1 |
20 |
|
T43 |
1 |
|
T27 |
1 |
| false |
125 |
1 |
|
T1 |
1 |
|
T189 |
1 |
|
T53 |
5 |
| true |
5711 |
1 |
|
T1 |
59 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1114 |
1 |
|
T1 |
17 |
|
T17 |
18 |
|
T23 |
1 |
| others[1] |
1048 |
1 |
|
T1 |
18 |
|
T17 |
9 |
|
T7 |
1 |
| others[2] |
1060 |
1 |
|
T1 |
24 |
|
T17 |
9 |
|
T23 |
1 |
| others[3] |
1799 |
1 |
|
T1 |
32 |
|
T16 |
1 |
|
T17 |
6 |
| false |
580 |
1 |
|
T1 |
10 |
|
T4 |
1 |
|
T17 |
2 |
| true |
1354 |
1 |
|
T5 |
1 |
|
T17 |
56 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
246 |
1 |
|
T1 |
6 |
|
T43 |
1 |
|
T347 |
1 |
| others[1] |
242 |
1 |
|
T1 |
8 |
|
T27 |
2 |
|
T348 |
2 |
| others[2] |
258 |
1 |
|
T1 |
9 |
|
T351 |
1 |
|
T348 |
5 |
| others[3] |
356 |
1 |
|
T1 |
22 |
|
T19 |
1 |
|
T20 |
1 |
| false |
130 |
1 |
|
T1 |
4 |
|
T8 |
1 |
|
T126 |
1 |
| true |
5723 |
1 |
|
T1 |
52 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T1 |
12 |
|
T349 |
1 |
|
T348 |
1 |
| others[1] |
216 |
1 |
|
T1 |
8 |
|
T84 |
1 |
|
T53 |
5 |
| others[2] |
212 |
1 |
|
T1 |
11 |
|
T9 |
1 |
|
T27 |
2 |
| others[3] |
339 |
1 |
|
T1 |
17 |
|
T27 |
1 |
|
T79 |
1 |
| false |
130 |
1 |
|
T1 |
7 |
|
T348 |
1 |
|
T53 |
2 |
| true |
5824 |
1 |
|
T1 |
46 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1278 |
1 |
|
T1 |
23 |
|
T17 |
22 |
|
T18 |
1 |
| others[1] |
1215 |
1 |
|
T1 |
19 |
|
T17 |
16 |
|
T7 |
1 |
| others[2] |
1255 |
1 |
|
T1 |
16 |
|
T16 |
1 |
|
T17 |
18 |
| others[3] |
2123 |
1 |
|
T1 |
32 |
|
T17 |
33 |
|
T6 |
1 |
| false |
639 |
1 |
|
T1 |
11 |
|
T17 |
11 |
|
T23 |
3 |
| true |
445 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T18 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1256 |
1 |
|
T1 |
13 |
|
T17 |
13 |
|
T23 |
2 |
| others[1] |
1306 |
1 |
|
T1 |
28 |
|
T16 |
1 |
|
T17 |
23 |
| others[2] |
1245 |
1 |
|
T1 |
25 |
|
T17 |
19 |
|
T23 |
2 |
| others[3] |
2063 |
1 |
|
T1 |
25 |
|
T17 |
37 |
|
T7 |
1 |
| false |
657 |
1 |
|
T1 |
10 |
|
T17 |
8 |
|
T23 |
2 |
| true |
428 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
109 |
1 |
|
T1 |
4 |
|
T210 |
1 |
|
T126 |
1 |
| others[1] |
104 |
1 |
|
T1 |
4 |
|
T347 |
1 |
|
T126 |
1 |
| others[2] |
92 |
1 |
|
T1 |
7 |
|
T126 |
1 |
|
T62 |
1 |
| others[3] |
186 |
1 |
|
T1 |
5 |
|
T27 |
1 |
|
T59 |
1 |
| false |
62 |
1 |
|
T348 |
2 |
|
T53 |
3 |
|
T54 |
2 |
| true |
6402 |
1 |
|
T1 |
81 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
255 |
1 |
|
T1 |
11 |
|
T9 |
1 |
|
T19 |
1 |
| others[1] |
257 |
1 |
|
T1 |
14 |
|
T5 |
1 |
|
T217 |
1 |
| others[2] |
249 |
1 |
|
T1 |
8 |
|
T349 |
1 |
|
T78 |
1 |
| others[3] |
399 |
1 |
|
T1 |
18 |
|
T347 |
1 |
|
T77 |
1 |
| false |
114 |
1 |
|
T1 |
2 |
|
T43 |
1 |
|
T27 |
1 |
| true |
5681 |
1 |
|
T1 |
48 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1018 |
1 |
|
T1 |
20 |
|
T17 |
8 |
|
T23 |
3 |
| others[1] |
1055 |
1 |
|
T1 |
19 |
|
T17 |
15 |
|
T23 |
2 |
| others[2] |
1054 |
1 |
|
T1 |
13 |
|
T5 |
1 |
|
T17 |
8 |
| others[3] |
1874 |
1 |
|
T1 |
38 |
|
T4 |
1 |
|
T16 |
1 |
| false |
568 |
1 |
|
T1 |
11 |
|
T17 |
5 |
|
T19 |
1 |
| true |
1386 |
1 |
|
T17 |
46 |
|
T6 |
1 |
|
T18 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
224 |
1 |
|
T1 |
12 |
|
T27 |
1 |
|
T218 |
1 |
| others[1] |
229 |
1 |
|
T1 |
10 |
|
T20 |
1 |
|
T27 |
1 |
| others[2] |
227 |
1 |
|
T1 |
15 |
|
T126 |
2 |
|
T348 |
1 |
| others[3] |
402 |
1 |
|
T1 |
14 |
|
T59 |
1 |
|
T349 |
1 |
| false |
125 |
1 |
|
T1 |
5 |
|
T9 |
1 |
|
T19 |
1 |
| true |
5748 |
1 |
|
T1 |
45 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T1 |
9 |
|
T43 |
1 |
|
T27 |
1 |
| others[1] |
210 |
1 |
|
T1 |
5 |
|
T126 |
1 |
|
T351 |
1 |
| others[2] |
212 |
1 |
|
T1 |
7 |
|
T27 |
1 |
|
T126 |
1 |
| others[3] |
377 |
1 |
|
T1 |
15 |
|
T27 |
1 |
|
T347 |
1 |
| false |
137 |
1 |
|
T1 |
5 |
|
T5 |
1 |
|
T210 |
1 |
| true |
5803 |
1 |
|
T1 |
60 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1270 |
1 |
|
T1 |
23 |
|
T17 |
24 |
|
T18 |
1 |
| others[1] |
1266 |
1 |
|
T1 |
12 |
|
T17 |
16 |
|
T9 |
1 |
| others[2] |
1258 |
1 |
|
T1 |
24 |
|
T17 |
19 |
|
T23 |
3 |
| others[3] |
2049 |
1 |
|
T1 |
31 |
|
T16 |
1 |
|
T17 |
30 |
| false |
668 |
1 |
|
T1 |
11 |
|
T17 |
11 |
|
T7 |
1 |
| true |
444 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1290 |
1 |
|
T1 |
21 |
|
T17 |
23 |
|
T23 |
1 |
| others[1] |
1246 |
1 |
|
T1 |
16 |
|
T17 |
14 |
|
T23 |
1 |
| others[2] |
1210 |
1 |
|
T1 |
16 |
|
T17 |
26 |
|
T7 |
1 |
| others[3] |
2110 |
1 |
|
T1 |
40 |
|
T16 |
1 |
|
T17 |
30 |
| false |
676 |
1 |
|
T1 |
8 |
|
T17 |
7 |
|
T23 |
1 |
| true |
423 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
116 |
1 |
|
T1 |
2 |
|
T210 |
1 |
|
T126 |
2 |
| others[1] |
111 |
1 |
|
T1 |
4 |
|
T351 |
1 |
|
T350 |
1 |
| others[2] |
105 |
1 |
|
T1 |
2 |
|
T347 |
1 |
|
T351 |
1 |
| others[3] |
177 |
1 |
|
T1 |
10 |
|
T210 |
1 |
|
T126 |
2 |
| false |
48 |
1 |
|
T1 |
1 |
|
T126 |
1 |
|
T348 |
1 |
| true |
6398 |
1 |
|
T1 |
82 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
228 |
1 |
|
T1 |
6 |
|
T5 |
1 |
|
T62 |
1 |
| others[1] |
230 |
1 |
|
T1 |
7 |
|
T27 |
1 |
|
T351 |
1 |
| others[2] |
254 |
1 |
|
T1 |
8 |
|
T19 |
1 |
|
T27 |
1 |
| others[3] |
394 |
1 |
|
T1 |
21 |
|
T59 |
1 |
|
T217 |
1 |
| false |
119 |
1 |
|
T1 |
3 |
|
T34 |
1 |
|
T348 |
2 |
| true |
5730 |
1 |
|
T1 |
56 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1088 |
1 |
|
T1 |
27 |
|
T17 |
7 |
|
T23 |
1 |
| others[1] |
1053 |
1 |
|
T1 |
17 |
|
T17 |
9 |
|
T43 |
1 |
| others[2] |
1071 |
1 |
|
T1 |
20 |
|
T4 |
1 |
|
T16 |
1 |
| others[3] |
1786 |
1 |
|
T1 |
27 |
|
T17 |
16 |
|
T7 |
1 |
| false |
571 |
1 |
|
T1 |
10 |
|
T17 |
3 |
|
T23 |
1 |
| true |
1386 |
1 |
|
T17 |
56 |
|
T18 |
2 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
221 |
1 |
|
T1 |
13 |
|
T27 |
1 |
|
T210 |
1 |
| others[1] |
246 |
1 |
|
T1 |
10 |
|
T347 |
1 |
|
T115 |
1 |
| others[2] |
219 |
1 |
|
T1 |
11 |
|
T8 |
1 |
|
T20 |
1 |
| others[3] |
429 |
1 |
|
T1 |
16 |
|
T349 |
1 |
|
T63 |
1 |
| false |
121 |
1 |
|
T1 |
2 |
|
T126 |
1 |
|
T348 |
1 |
| true |
5719 |
1 |
|
T1 |
49 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T1 |
7 |
|
T351 |
1 |
|
T350 |
1 |
| others[1] |
216 |
1 |
|
T1 |
12 |
|
T348 |
2 |
|
T53 |
11 |
| others[2] |
239 |
1 |
|
T1 |
14 |
|
T43 |
1 |
|
T27 |
2 |
| others[3] |
378 |
1 |
|
T1 |
14 |
|
T5 |
1 |
|
T59 |
1 |
| false |
118 |
1 |
|
T1 |
8 |
|
T183 |
1 |
|
T53 |
4 |
| true |
5787 |
1 |
|
T1 |
46 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1284 |
1 |
|
T1 |
19 |
|
T16 |
1 |
|
T17 |
25 |
| others[1] |
1243 |
1 |
|
T1 |
25 |
|
T17 |
22 |
|
T7 |
1 |
| others[2] |
1297 |
1 |
|
T1 |
19 |
|
T17 |
15 |
|
T18 |
1 |
| others[3] |
2113 |
1 |
|
T1 |
29 |
|
T17 |
31 |
|
T23 |
2 |
| false |
598 |
1 |
|
T1 |
9 |
|
T17 |
7 |
|
T29 |
3 |
| true |
420 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1269 |
1 |
|
T1 |
17 |
|
T16 |
1 |
|
T17 |
19 |
| others[1] |
1310 |
1 |
|
T1 |
20 |
|
T17 |
20 |
|
T23 |
2 |
| others[2] |
1257 |
1 |
|
T1 |
20 |
|
T17 |
19 |
|
T7 |
1 |
| others[3] |
2075 |
1 |
|
T1 |
37 |
|
T17 |
36 |
|
T23 |
3 |
| false |
632 |
1 |
|
T1 |
7 |
|
T17 |
6 |
|
T34 |
1 |
| true |
412 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
100 |
1 |
|
T1 |
3 |
|
T210 |
1 |
|
T347 |
1 |
| others[1] |
95 |
1 |
|
T1 |
4 |
|
T126 |
2 |
|
T185 |
1 |
| others[2] |
99 |
1 |
|
T1 |
3 |
|
T126 |
1 |
|
T351 |
1 |
| others[3] |
199 |
1 |
|
T1 |
9 |
|
T27 |
1 |
|
T210 |
1 |
| false |
43 |
1 |
|
T1 |
2 |
|
T351 |
1 |
|
T348 |
3 |
| true |
6419 |
1 |
|
T1 |
80 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
239 |
1 |
|
T1 |
11 |
|
T69 |
1 |
|
T63 |
1 |
| others[1] |
246 |
1 |
|
T1 |
13 |
|
T8 |
1 |
|
T39 |
1 |
| others[2] |
214 |
1 |
|
T1 |
6 |
|
T20 |
1 |
|
T349 |
1 |
| others[3] |
444 |
1 |
|
T1 |
15 |
|
T5 |
1 |
|
T210 |
2 |
| false |
124 |
1 |
|
T1 |
5 |
|
T43 |
1 |
|
T34 |
1 |
| true |
5688 |
1 |
|
T1 |
51 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1044 |
1 |
|
T1 |
31 |
|
T17 |
9 |
|
T23 |
4 |
| others[1] |
1069 |
1 |
|
T1 |
15 |
|
T5 |
1 |
|
T17 |
10 |
| others[2] |
1101 |
1 |
|
T1 |
15 |
|
T17 |
9 |
|
T18 |
1 |
| others[3] |
1783 |
1 |
|
T1 |
33 |
|
T4 |
1 |
|
T16 |
1 |
| false |
572 |
1 |
|
T1 |
7 |
|
T17 |
6 |
|
T23 |
1 |
| true |
1386 |
1 |
|
T17 |
47 |
|
T6 |
1 |
|
T9 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
261 |
1 |
|
T1 |
13 |
|
T5 |
1 |
|
T27 |
1 |
| others[1] |
244 |
1 |
|
T1 |
10 |
|
T9 |
1 |
|
T348 |
1 |
| others[2] |
232 |
1 |
|
T1 |
14 |
|
T75 |
1 |
|
T351 |
1 |
| others[3] |
370 |
1 |
|
T1 |
19 |
|
T20 |
1 |
|
T27 |
3 |
| false |
116 |
1 |
|
T1 |
4 |
|
T27 |
1 |
|
T348 |
1 |
| true |
5732 |
1 |
|
T1 |
41 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
211 |
1 |
|
T1 |
6 |
|
T126 |
1 |
|
T348 |
2 |
| others[1] |
229 |
1 |
|
T1 |
9 |
|
T348 |
2 |
|
T183 |
1 |
| others[2] |
210 |
1 |
|
T1 |
10 |
|
T210 |
1 |
|
T126 |
1 |
| others[3] |
373 |
1 |
|
T1 |
17 |
|
T5 |
1 |
|
T43 |
1 |
| false |
129 |
1 |
|
T1 |
4 |
|
T348 |
1 |
|
T53 |
3 |
| true |
5803 |
1 |
|
T1 |
55 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1218 |
1 |
|
T1 |
15 |
|
T16 |
1 |
|
T17 |
20 |
| others[1] |
1308 |
1 |
|
T1 |
20 |
|
T17 |
24 |
|
T24 |
1 |
| others[2] |
1262 |
1 |
|
T1 |
14 |
|
T17 |
15 |
|
T7 |
1 |
| others[3] |
2047 |
1 |
|
T1 |
41 |
|
T17 |
36 |
|
T23 |
4 |
| false |
679 |
1 |
|
T1 |
11 |
|
T17 |
5 |
|
T23 |
1 |
| true |
441 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1254 |
1 |
|
T1 |
22 |
|
T17 |
26 |
|
T23 |
2 |
| others[1] |
1282 |
1 |
|
T1 |
14 |
|
T17 |
14 |
|
T7 |
1 |
| others[2] |
1245 |
1 |
|
T1 |
19 |
|
T16 |
1 |
|
T17 |
21 |
| others[3] |
2112 |
1 |
|
T1 |
35 |
|
T17 |
25 |
|
T23 |
4 |
| false |
633 |
1 |
|
T1 |
11 |
|
T17 |
14 |
|
T23 |
1 |
| true |
429 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
119 |
1 |
|
T1 |
2 |
|
T348 |
3 |
|
T53 |
2 |
| others[1] |
108 |
1 |
|
T1 |
6 |
|
T126 |
1 |
|
T348 |
4 |
| others[2] |
115 |
1 |
|
T1 |
4 |
|
T9 |
1 |
|
T126 |
2 |
| others[3] |
158 |
1 |
|
T1 |
8 |
|
T59 |
1 |
|
T63 |
1 |
| false |
61 |
1 |
|
T1 |
2 |
|
T53 |
2 |
|
T54 |
2 |
| true |
6394 |
1 |
|
T1 |
79 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
251 |
1 |
|
T1 |
15 |
|
T43 |
1 |
|
T126 |
1 |
| others[1] |
254 |
1 |
|
T1 |
10 |
|
T8 |
1 |
|
T27 |
2 |
| others[2] |
247 |
1 |
|
T1 |
6 |
|
T9 |
1 |
|
T349 |
1 |
| others[3] |
387 |
1 |
|
T1 |
22 |
|
T69 |
1 |
|
T210 |
1 |
| false |
113 |
1 |
|
T1 |
2 |
|
T20 |
1 |
|
T63 |
1 |
| true |
5703 |
1 |
|
T1 |
46 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1059 |
1 |
|
T1 |
18 |
|
T17 |
11 |
|
T23 |
4 |
| others[1] |
1093 |
1 |
|
T1 |
19 |
|
T4 |
1 |
|
T17 |
17 |
| others[2] |
1062 |
1 |
|
T1 |
21 |
|
T17 |
7 |
|
T18 |
1 |
| others[3] |
1751 |
1 |
|
T1 |
38 |
|
T16 |
1 |
|
T17 |
13 |
| false |
575 |
1 |
|
T1 |
5 |
|
T17 |
3 |
|
T23 |
3 |
| true |
1415 |
1 |
|
T5 |
1 |
|
T17 |
49 |
|
T6 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |