Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
244 |
1 |
|
T1 |
12 |
|
T27 |
1 |
|
T69 |
1 |
| others[1] |
226 |
1 |
|
T1 |
8 |
|
T210 |
1 |
|
T126 |
2 |
| others[2] |
227 |
1 |
|
T1 |
9 |
|
T27 |
1 |
|
T126 |
1 |
| others[3] |
391 |
1 |
|
T1 |
16 |
|
T8 |
1 |
|
T20 |
1 |
| false |
136 |
1 |
|
T1 |
5 |
|
T5 |
1 |
|
T78 |
1 |
| true |
5731 |
1 |
|
T1 |
51 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
225 |
1 |
|
T1 |
9 |
|
T126 |
1 |
|
T62 |
1 |
| others[1] |
234 |
1 |
|
T1 |
8 |
|
T27 |
1 |
|
T210 |
1 |
| others[2] |
208 |
1 |
|
T1 |
6 |
|
T351 |
1 |
|
T348 |
1 |
| others[3] |
373 |
1 |
|
T1 |
16 |
|
T27 |
1 |
|
T59 |
1 |
| false |
120 |
1 |
|
T1 |
5 |
|
T126 |
1 |
|
T348 |
1 |
| true |
5795 |
1 |
|
T1 |
57 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1293 |
1 |
|
T1 |
19 |
|
T17 |
11 |
|
T23 |
2 |
| others[1] |
1229 |
1 |
|
T1 |
22 |
|
T17 |
25 |
|
T23 |
2 |
| others[2] |
1255 |
1 |
|
T1 |
18 |
|
T16 |
1 |
|
T17 |
16 |
| others[3] |
2092 |
1 |
|
T1 |
30 |
|
T17 |
38 |
|
T18 |
1 |
| false |
656 |
1 |
|
T1 |
12 |
|
T17 |
10 |
|
T24 |
2 |
| true |
430 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1306 |
1 |
|
T1 |
18 |
|
T17 |
19 |
|
T24 |
3 |
| others[1] |
1227 |
1 |
|
T1 |
19 |
|
T17 |
8 |
|
T23 |
2 |
| others[2] |
1228 |
1 |
|
T1 |
19 |
|
T17 |
27 |
|
T23 |
2 |
| others[3] |
2119 |
1 |
|
T1 |
37 |
|
T16 |
1 |
|
T17 |
32 |
| false |
655 |
1 |
|
T1 |
8 |
|
T17 |
14 |
|
T23 |
2 |
| true |
420 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
100 |
1 |
|
T1 |
6 |
|
T126 |
2 |
|
T351 |
2 |
| others[1] |
82 |
1 |
|
T1 |
1 |
|
T59 |
1 |
|
T210 |
1 |
| others[2] |
104 |
1 |
|
T1 |
5 |
|
T126 |
1 |
|
T348 |
3 |
| others[3] |
203 |
1 |
|
T1 |
10 |
|
T27 |
1 |
|
T210 |
1 |
| false |
41 |
1 |
|
T1 |
1 |
|
T348 |
4 |
|
T53 |
2 |
| true |
6425 |
1 |
|
T1 |
78 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
248 |
1 |
|
T1 |
12 |
|
T27 |
1 |
|
T115 |
1 |
| others[1] |
231 |
1 |
|
T1 |
8 |
|
T20 |
1 |
|
T27 |
1 |
| others[2] |
255 |
1 |
|
T1 |
11 |
|
T5 |
1 |
|
T8 |
1 |
| others[3] |
385 |
1 |
|
T1 |
12 |
|
T19 |
1 |
|
T90 |
1 |
| false |
143 |
1 |
|
T1 |
6 |
|
T9 |
1 |
|
T210 |
1 |
| true |
5693 |
1 |
|
T1 |
52 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1104 |
1 |
|
T1 |
21 |
|
T17 |
7 |
|
T23 |
2 |
| others[1] |
1094 |
1 |
|
T1 |
18 |
|
T17 |
9 |
|
T7 |
1 |
| others[2] |
1082 |
1 |
|
T1 |
24 |
|
T17 |
10 |
|
T23 |
3 |
| others[3] |
1779 |
1 |
|
T1 |
31 |
|
T4 |
1 |
|
T16 |
1 |
| false |
556 |
1 |
|
T1 |
7 |
|
T17 |
4 |
|
T27 |
1 |
| true |
1340 |
1 |
|
T5 |
1 |
|
T17 |
46 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
228 |
1 |
|
T1 |
9 |
|
T34 |
1 |
|
T274 |
1 |
| others[1] |
219 |
1 |
|
T1 |
10 |
|
T350 |
1 |
|
T348 |
1 |
| others[2] |
255 |
1 |
|
T1 |
11 |
|
T5 |
1 |
|
T115 |
1 |
| others[3] |
365 |
1 |
|
T1 |
11 |
|
T27 |
2 |
|
T126 |
1 |
| false |
115 |
1 |
|
T1 |
5 |
|
T69 |
1 |
|
T348 |
1 |
| true |
5773 |
1 |
|
T1 |
55 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T1 |
10 |
|
T126 |
1 |
|
T62 |
1 |
| others[1] |
240 |
1 |
|
T1 |
16 |
|
T63 |
1 |
|
T126 |
1 |
| others[2] |
225 |
1 |
|
T1 |
13 |
|
T347 |
1 |
|
T348 |
2 |
| others[3] |
378 |
1 |
|
T1 |
14 |
|
T5 |
1 |
|
T27 |
1 |
| false |
113 |
1 |
|
T1 |
3 |
|
T210 |
1 |
|
T126 |
1 |
| true |
5783 |
1 |
|
T1 |
45 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1249 |
1 |
|
T1 |
21 |
|
T16 |
1 |
|
T17 |
25 |
| others[1] |
1273 |
1 |
|
T1 |
19 |
|
T17 |
29 |
|
T23 |
2 |
| others[2] |
1226 |
1 |
|
T1 |
26 |
|
T17 |
15 |
|
T34 |
1 |
| others[3] |
2137 |
1 |
|
T1 |
23 |
|
T17 |
27 |
|
T7 |
1 |
| false |
631 |
1 |
|
T1 |
12 |
|
T17 |
4 |
|
T23 |
4 |
| true |
439 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1267 |
1 |
|
T1 |
18 |
|
T17 |
23 |
|
T23 |
6 |
| others[1] |
1213 |
1 |
|
T1 |
29 |
|
T16 |
1 |
|
T17 |
20 |
| others[2] |
1328 |
1 |
|
T1 |
18 |
|
T17 |
24 |
|
T23 |
1 |
| others[3] |
2071 |
1 |
|
T1 |
26 |
|
T17 |
25 |
|
T7 |
1 |
| false |
654 |
1 |
|
T1 |
10 |
|
T17 |
8 |
|
T23 |
1 |
| true |
422 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
113 |
1 |
|
T1 |
7 |
|
T210 |
1 |
|
T347 |
1 |
| others[1] |
94 |
1 |
|
T1 |
1 |
|
T126 |
1 |
|
T351 |
1 |
| others[2] |
114 |
1 |
|
T1 |
3 |
|
T27 |
1 |
|
T210 |
1 |
| others[3] |
194 |
1 |
|
T1 |
14 |
|
T126 |
4 |
|
T348 |
4 |
| false |
53 |
1 |
|
T348 |
2 |
|
T53 |
2 |
|
T54 |
1 |
| true |
6387 |
1 |
|
T1 |
76 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
224 |
1 |
|
T1 |
9 |
|
T5 |
1 |
|
T126 |
1 |
| others[1] |
257 |
1 |
|
T1 |
12 |
|
T77 |
1 |
|
T217 |
1 |
| others[2] |
256 |
1 |
|
T1 |
12 |
|
T27 |
1 |
|
T79 |
1 |
| others[3] |
413 |
1 |
|
T1 |
17 |
|
T43 |
1 |
|
T27 |
3 |
| false |
119 |
1 |
|
T1 |
4 |
|
T8 |
1 |
|
T9 |
1 |
| true |
5686 |
1 |
|
T1 |
47 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1085 |
1 |
|
T1 |
17 |
|
T17 |
12 |
|
T43 |
1 |
| others[1] |
1036 |
1 |
|
T1 |
19 |
|
T17 |
11 |
|
T23 |
3 |
| others[2] |
1124 |
1 |
|
T1 |
23 |
|
T17 |
9 |
|
T18 |
2 |
| others[3] |
1802 |
1 |
|
T1 |
30 |
|
T16 |
1 |
|
T17 |
11 |
| false |
517 |
1 |
|
T1 |
12 |
|
T17 |
1 |
|
T7 |
1 |
| true |
1391 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T17 |
56 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
237 |
1 |
|
T1 |
10 |
|
T27 |
2 |
|
T63 |
1 |
| others[1] |
204 |
1 |
|
T1 |
10 |
|
T43 |
1 |
|
T350 |
1 |
| others[2] |
265 |
1 |
|
T1 |
13 |
|
T27 |
1 |
|
T34 |
1 |
| others[3] |
415 |
1 |
|
T1 |
21 |
|
T27 |
1 |
|
T59 |
1 |
| false |
111 |
1 |
|
T1 |
5 |
|
T19 |
1 |
|
T69 |
1 |
| true |
5723 |
1 |
|
T1 |
42 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
204 |
1 |
|
T1 |
5 |
|
T43 |
1 |
|
T27 |
1 |
| others[1] |
209 |
1 |
|
T1 |
8 |
|
T59 |
1 |
|
T349 |
1 |
| others[2] |
226 |
1 |
|
T1 |
11 |
|
T27 |
1 |
|
T348 |
1 |
| others[3] |
367 |
1 |
|
T1 |
12 |
|
T27 |
1 |
|
T69 |
1 |
| false |
122 |
1 |
|
T1 |
5 |
|
T347 |
1 |
|
T62 |
1 |
| true |
5827 |
1 |
|
T1 |
60 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1189 |
1 |
|
T1 |
20 |
|
T17 |
16 |
|
T23 |
4 |
| others[1] |
1285 |
1 |
|
T1 |
22 |
|
T17 |
22 |
|
T7 |
1 |
| others[2] |
1206 |
1 |
|
T1 |
20 |
|
T16 |
1 |
|
T17 |
17 |
| others[3] |
2194 |
1 |
|
T1 |
29 |
|
T17 |
36 |
|
T19 |
1 |
| false |
628 |
1 |
|
T1 |
10 |
|
T17 |
9 |
|
T23 |
1 |
| true |
453 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1259 |
1 |
|
T1 |
18 |
|
T17 |
20 |
|
T23 |
3 |
| others[1] |
1216 |
1 |
|
T1 |
25 |
|
T17 |
18 |
|
T23 |
2 |
| others[2] |
1272 |
1 |
|
T1 |
20 |
|
T16 |
1 |
|
T17 |
17 |
| others[3] |
2126 |
1 |
|
T1 |
31 |
|
T17 |
34 |
|
T7 |
1 |
| false |
657 |
1 |
|
T1 |
7 |
|
T17 |
11 |
|
T29 |
11 |
| true |
425 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
112 |
1 |
|
T1 |
5 |
|
T126 |
1 |
|
T351 |
1 |
| others[1] |
121 |
1 |
|
T1 |
5 |
|
T5 |
1 |
|
T210 |
2 |
| others[2] |
100 |
1 |
|
T1 |
6 |
|
T59 |
1 |
|
T348 |
2 |
| others[3] |
196 |
1 |
|
T1 |
10 |
|
T69 |
1 |
|
T347 |
1 |
| false |
50 |
1 |
|
T1 |
2 |
|
T63 |
1 |
|
T348 |
1 |
| true |
6376 |
1 |
|
T1 |
73 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
270 |
1 |
|
T1 |
10 |
|
T210 |
1 |
|
T239 |
1 |
| others[1] |
223 |
1 |
|
T1 |
8 |
|
T27 |
1 |
|
T69 |
1 |
| others[2] |
226 |
1 |
|
T1 |
9 |
|
T5 |
1 |
|
T62 |
1 |
| others[3] |
400 |
1 |
|
T1 |
14 |
|
T27 |
1 |
|
T126 |
1 |
| false |
132 |
1 |
|
T1 |
1 |
|
T63 |
1 |
|
T77 |
1 |
| true |
5704 |
1 |
|
T1 |
59 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1052 |
1 |
|
T1 |
20 |
|
T17 |
12 |
|
T23 |
1 |
| others[1] |
1031 |
1 |
|
T1 |
17 |
|
T16 |
1 |
|
T17 |
8 |
| others[2] |
1064 |
1 |
|
T1 |
20 |
|
T17 |
12 |
|
T7 |
1 |
| others[3] |
1835 |
1 |
|
T1 |
34 |
|
T17 |
16 |
|
T23 |
1 |
| false |
585 |
1 |
|
T1 |
10 |
|
T17 |
5 |
|
T23 |
2 |
| true |
1388 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T17 |
47 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T1 |
9 |
|
T115 |
1 |
|
T126 |
1 |
| others[1] |
228 |
1 |
|
T1 |
5 |
|
T27 |
1 |
|
T218 |
1 |
| others[2] |
213 |
1 |
|
T1 |
12 |
|
T27 |
2 |
|
T63 |
1 |
| others[3] |
419 |
1 |
|
T1 |
15 |
|
T43 |
1 |
|
T27 |
2 |
| false |
142 |
1 |
|
T1 |
8 |
|
T5 |
1 |
|
T348 |
1 |
| true |
5736 |
1 |
|
T1 |
52 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
248 |
1 |
|
T1 |
11 |
|
T210 |
1 |
|
T352 |
1 |
| others[1] |
192 |
1 |
|
T1 |
10 |
|
T69 |
1 |
|
T210 |
1 |
| others[2] |
214 |
1 |
|
T1 |
6 |
|
T79 |
1 |
|
T348 |
1 |
| others[3] |
349 |
1 |
|
T1 |
8 |
|
T5 |
1 |
|
T27 |
2 |
| false |
113 |
1 |
|
T1 |
6 |
|
T351 |
1 |
|
T348 |
1 |
| true |
5839 |
1 |
|
T1 |
60 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1243 |
1 |
|
T1 |
18 |
|
T17 |
16 |
|
T7 |
1 |
| others[1] |
1293 |
1 |
|
T1 |
25 |
|
T17 |
18 |
|
T23 |
4 |
| others[2] |
1253 |
1 |
|
T1 |
11 |
|
T16 |
1 |
|
T17 |
23 |
| others[3] |
2086 |
1 |
|
T1 |
32 |
|
T17 |
30 |
|
T9 |
1 |
| false |
636 |
1 |
|
T1 |
15 |
|
T17 |
13 |
|
T23 |
1 |
| true |
444 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1256 |
1 |
|
T1 |
17 |
|
T17 |
21 |
|
T7 |
1 |
| others[1] |
1236 |
1 |
|
T1 |
20 |
|
T16 |
1 |
|
T17 |
18 |
| others[2] |
1264 |
1 |
|
T1 |
21 |
|
T17 |
18 |
|
T19 |
1 |
| others[3] |
2086 |
1 |
|
T1 |
35 |
|
T17 |
39 |
|
T23 |
6 |
| false |
703 |
1 |
|
T1 |
8 |
|
T17 |
4 |
|
T23 |
1 |
| true |
410 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
113 |
1 |
|
T1 |
2 |
|
T210 |
1 |
|
T347 |
1 |
| others[1] |
115 |
1 |
|
T1 |
7 |
|
T126 |
2 |
|
T348 |
2 |
| others[2] |
102 |
1 |
|
T1 |
4 |
|
T210 |
1 |
|
T79 |
1 |
| others[3] |
186 |
1 |
|
T1 |
6 |
|
T27 |
1 |
|
T69 |
1 |
| false |
51 |
1 |
|
T126 |
1 |
|
T348 |
2 |
|
T53 |
1 |
| true |
6388 |
1 |
|
T1 |
82 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
238 |
1 |
|
T1 |
5 |
|
T77 |
1 |
|
T351 |
1 |
| others[1] |
240 |
1 |
|
T1 |
11 |
|
T115 |
1 |
|
T126 |
1 |
| others[2] |
227 |
1 |
|
T1 |
7 |
|
T20 |
1 |
|
T27 |
1 |
| others[3] |
406 |
1 |
|
T1 |
17 |
|
T5 |
1 |
|
T19 |
1 |
| false |
120 |
1 |
|
T1 |
5 |
|
T27 |
2 |
|
T90 |
1 |
| true |
5724 |
1 |
|
T1 |
56 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1098 |
1 |
|
T1 |
17 |
|
T17 |
14 |
|
T18 |
1 |
| others[1] |
1092 |
1 |
|
T1 |
15 |
|
T16 |
1 |
|
T17 |
12 |
| others[2] |
1045 |
1 |
|
T1 |
21 |
|
T17 |
18 |
|
T18 |
1 |
| others[3] |
1802 |
1 |
|
T1 |
33 |
|
T17 |
10 |
|
T6 |
1 |
| false |
559 |
1 |
|
T1 |
15 |
|
T17 |
4 |
|
T7 |
1 |
| true |
1359 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T17 |
42 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T1 |
11 |
|
T27 |
1 |
|
T349 |
1 |
| others[1] |
237 |
1 |
|
T1 |
8 |
|
T20 |
1 |
|
T210 |
1 |
| others[2] |
224 |
1 |
|
T1 |
12 |
|
T19 |
1 |
|
T126 |
1 |
| others[3] |
366 |
1 |
|
T1 |
12 |
|
T59 |
1 |
|
T69 |
1 |
| false |
135 |
1 |
|
T1 |
5 |
|
T217 |
1 |
|
T53 |
5 |
| true |
5751 |
1 |
|
T1 |
53 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
219 |
1 |
|
T1 |
5 |
|
T9 |
1 |
|
T210 |
1 |
| others[1] |
228 |
1 |
|
T1 |
10 |
|
T126 |
1 |
|
T348 |
1 |
| others[2] |
258 |
1 |
|
T1 |
6 |
|
T43 |
1 |
|
T69 |
1 |
| others[3] |
355 |
1 |
|
T1 |
17 |
|
T27 |
1 |
|
T63 |
1 |
| false |
120 |
1 |
|
T1 |
3 |
|
T210 |
1 |
|
T348 |
3 |
| true |
5775 |
1 |
|
T1 |
60 |
|
T4 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1258 |
1 |
|
T1 |
25 |
|
T17 |
8 |
|
T23 |
3 |
| others[1] |
1248 |
1 |
|
T1 |
20 |
|
T17 |
20 |
|
T23 |
4 |
| others[2] |
1214 |
1 |
|
T1 |
15 |
|
T16 |
1 |
|
T17 |
14 |
| others[3] |
2098 |
1 |
|
T1 |
31 |
|
T17 |
42 |
|
T7 |
1 |
| false |
704 |
1 |
|
T1 |
10 |
|
T17 |
16 |
|
T23 |
2 |
| true |
433 |
1 |
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |