Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
220 |
1 |
|
T55 |
4 |
|
T48 |
1 |
|
T226 |
1 |
| others[1] |
189 |
1 |
|
T27 |
1 |
|
T47 |
1 |
|
T55 |
8 |
| others[2] |
238 |
1 |
|
T104 |
1 |
|
T55 |
19 |
|
T48 |
1 |
| others[3] |
368 |
1 |
|
T55 |
16 |
|
T123 |
1 |
|
T87 |
1 |
| false |
129 |
1 |
|
T50 |
1 |
|
T55 |
4 |
|
T85 |
1 |
| true |
12602 |
1 |
|
T1 |
78 |
|
T3 |
1 |
|
T4 |
13 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8158 |
1 |
|
T1 |
12 |
|
T4 |
1 |
|
T11 |
3 |
| others[1] |
1253 |
1 |
|
T1 |
17 |
|
T4 |
4 |
|
T6 |
1 |
| others[2] |
1196 |
1 |
|
T1 |
16 |
|
T4 |
1 |
|
T5 |
1 |
| others[3] |
2078 |
1 |
|
T1 |
24 |
|
T4 |
7 |
|
T7 |
1 |
| false |
615 |
1 |
|
T1 |
9 |
|
T3 |
1 |
|
T39 |
6 |
| true |
446 |
1 |
|
T16 |
1 |
|
T17 |
1 |
|
T27 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8063 |
1 |
|
T1 |
14 |
|
T4 |
1 |
|
T11 |
3 |
| others[1] |
1280 |
1 |
|
T1 |
15 |
|
T4 |
3 |
|
T66 |
1 |
| others[2] |
1234 |
1 |
|
T1 |
14 |
|
T4 |
1 |
|
T5 |
1 |
| others[3] |
2083 |
1 |
|
T1 |
28 |
|
T4 |
5 |
|
T7 |
1 |
| false |
648 |
1 |
|
T1 |
7 |
|
T4 |
3 |
|
T39 |
10 |
| true |
438 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
100 |
1 |
|
T55 |
6 |
|
T48 |
2 |
|
T234 |
1 |
| others[1] |
118 |
1 |
|
T55 |
4 |
|
T123 |
1 |
|
T85 |
1 |
| others[2] |
85 |
1 |
|
T55 |
3 |
|
T48 |
1 |
|
T123 |
2 |
| others[3] |
174 |
1 |
|
T27 |
1 |
|
T55 |
8 |
|
T123 |
3 |
| false |
44 |
1 |
|
T29 |
1 |
|
T55 |
2 |
|
T48 |
1 |
| true |
13225 |
1 |
|
T1 |
78 |
|
T3 |
1 |
|
T4 |
13 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
246 |
1 |
|
T118 |
1 |
|
T55 |
10 |
|
T87 |
1 |
| others[1] |
244 |
1 |
|
T50 |
1 |
|
T204 |
1 |
|
T55 |
12 |
| others[2] |
242 |
1 |
|
T28 |
1 |
|
T55 |
10 |
|
T123 |
4 |
| others[3] |
395 |
1 |
|
T181 |
1 |
|
T30 |
1 |
|
T55 |
16 |
| false |
105 |
1 |
|
T3 |
1 |
|
T55 |
5 |
|
T123 |
1 |
| true |
12514 |
1 |
|
T1 |
78 |
|
T4 |
13 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
7907 |
1 |
|
T1 |
11 |
|
T4 |
1 |
|
T7 |
1 |
| others[1] |
1091 |
1 |
|
T1 |
20 |
|
T4 |
2 |
|
T5 |
1 |
| others[2] |
1063 |
1 |
|
T1 |
16 |
|
T4 |
6 |
|
T6 |
1 |
| others[3] |
1694 |
1 |
|
T1 |
28 |
|
T4 |
3 |
|
T17 |
1 |
| false |
576 |
1 |
|
T1 |
3 |
|
T4 |
1 |
|
T27 |
1 |
| true |
1415 |
1 |
|
T3 |
1 |
|
T16 |
1 |
|
T50 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T55 |
10 |
|
T48 |
2 |
|
T123 |
1 |
| others[1] |
231 |
1 |
|
T18 |
1 |
|
T29 |
1 |
|
T55 |
9 |
| others[2] |
253 |
1 |
|
T55 |
9 |
|
T48 |
1 |
|
T234 |
1 |
| others[3] |
370 |
1 |
|
T17 |
1 |
|
T27 |
1 |
|
T28 |
1 |
| false |
111 |
1 |
|
T47 |
1 |
|
T55 |
2 |
|
T226 |
1 |
| true |
12539 |
1 |
|
T1 |
78 |
|
T3 |
1 |
|
T4 |
13 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
206 |
1 |
|
T55 |
7 |
|
T123 |
1 |
|
T59 |
1 |
| others[1] |
216 |
1 |
|
T27 |
1 |
|
T55 |
10 |
|
T75 |
1 |
| others[2] |
235 |
1 |
|
T55 |
12 |
|
T48 |
1 |
|
T123 |
2 |
| others[3] |
365 |
1 |
|
T50 |
1 |
|
T55 |
16 |
|
T123 |
1 |
| false |
119 |
1 |
|
T104 |
1 |
|
T55 |
6 |
|
T76 |
5 |
| true |
12605 |
1 |
|
T1 |
78 |
|
T3 |
1 |
|
T4 |
13 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8126 |
1 |
|
T1 |
15 |
|
T4 |
1 |
|
T11 |
3 |
| others[1] |
1226 |
1 |
|
T1 |
13 |
|
T4 |
4 |
|
T17 |
1 |
| others[2] |
1248 |
1 |
|
T1 |
20 |
|
T4 |
2 |
|
T66 |
1 |
| others[3] |
2085 |
1 |
|
T1 |
26 |
|
T4 |
6 |
|
T5 |
1 |
| false |
620 |
1 |
|
T1 |
4 |
|
T39 |
7 |
|
T95 |
9 |
| true |
441 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1232 |
1 |
|
T1 |
18 |
|
T4 |
4 |
|
T39 |
13 |
| others[1] |
1215 |
1 |
|
T1 |
16 |
|
T4 |
4 |
|
T7 |
1 |
| others[2] |
1232 |
1 |
|
T1 |
9 |
|
T4 |
2 |
|
T39 |
17 |
| others[3] |
2056 |
1 |
|
T1 |
21 |
|
T4 |
3 |
|
T5 |
1 |
| false |
675 |
1 |
|
T1 |
14 |
|
T39 |
11 |
|
T95 |
12 |
| true |
430 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
113 |
1 |
|
T50 |
1 |
|
T55 |
4 |
|
T123 |
1 |
| others[1] |
101 |
1 |
|
T55 |
4 |
|
T48 |
1 |
|
T123 |
2 |
| others[2] |
115 |
1 |
|
T55 |
2 |
|
T123 |
1 |
|
T359 |
1 |
| others[3] |
174 |
1 |
|
T55 |
5 |
|
T234 |
1 |
|
T123 |
3 |
| false |
43 |
1 |
|
T55 |
1 |
|
T123 |
2 |
|
T76 |
1 |
| true |
6294 |
1 |
|
T1 |
78 |
|
T3 |
1 |
|
T4 |
13 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
233 |
1 |
|
T6 |
1 |
|
T30 |
1 |
|
T55 |
7 |
| others[1] |
235 |
1 |
|
T29 |
1 |
|
T55 |
12 |
|
T115 |
1 |
| others[2] |
237 |
1 |
|
T20 |
1 |
|
T101 |
1 |
|
T55 |
10 |
| others[3] |
394 |
1 |
|
T3 |
1 |
|
T28 |
1 |
|
T55 |
19 |
| false |
120 |
1 |
|
T55 |
6 |
|
T76 |
3 |
|
T100 |
4 |
| true |
5621 |
1 |
|
T1 |
78 |
|
T4 |
13 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1018 |
1 |
|
T1 |
12 |
|
T4 |
3 |
|
T19 |
1 |
| others[1] |
1064 |
1 |
|
T1 |
12 |
|
T4 |
6 |
|
T5 |
1 |
| others[2] |
1052 |
1 |
|
T1 |
17 |
|
T4 |
1 |
|
T16 |
1 |
| others[3] |
1809 |
1 |
|
T1 |
30 |
|
T4 |
3 |
|
T28 |
1 |
| false |
526 |
1 |
|
T1 |
7 |
|
T39 |
6 |
|
T69 |
1 |
| true |
1371 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T27 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T50 |
1 |
|
T207 |
1 |
|
T55 |
8 |
| others[1] |
232 |
1 |
|
T20 |
1 |
|
T118 |
1 |
|
T55 |
9 |
| others[2] |
230 |
1 |
|
T55 |
10 |
|
T48 |
1 |
|
T356 |
1 |
| others[3] |
386 |
1 |
|
T47 |
1 |
|
T101 |
1 |
|
T55 |
16 |
| false |
113 |
1 |
|
T27 |
1 |
|
T28 |
1 |
|
T55 |
4 |
| true |
5645 |
1 |
|
T1 |
78 |
|
T3 |
1 |
|
T4 |
13 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
249 |
1 |
|
T3 |
1 |
|
T27 |
1 |
|
T29 |
1 |
| others[1] |
190 |
1 |
|
T47 |
1 |
|
T55 |
12 |
|
T123 |
2 |
| others[2] |
225 |
1 |
|
T55 |
9 |
|
T123 |
2 |
|
T87 |
1 |
| others[3] |
387 |
1 |
|
T104 |
1 |
|
T55 |
15 |
|
T48 |
2 |
| false |
117 |
1 |
|
T28 |
1 |
|
T50 |
1 |
|
T55 |
6 |
| true |
5672 |
1 |
|
T1 |
78 |
|
T4 |
13 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1238 |
1 |
|
T1 |
17 |
|
T4 |
3 |
|
T7 |
1 |
| others[1] |
1262 |
1 |
|
T1 |
15 |
|
T4 |
3 |
|
T18 |
1 |
| others[2] |
1212 |
1 |
|
T1 |
16 |
|
T4 |
3 |
|
T66 |
1 |
| others[3] |
2029 |
1 |
|
T1 |
23 |
|
T4 |
4 |
|
T39 |
40 |
| false |
654 |
1 |
|
T1 |
7 |
|
T5 |
1 |
|
T19 |
1 |
| true |
445 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1253 |
1 |
|
T1 |
20 |
|
T7 |
1 |
|
T39 |
15 |
| others[1] |
1215 |
1 |
|
T1 |
11 |
|
T4 |
2 |
|
T66 |
1 |
| others[2] |
1230 |
1 |
|
T1 |
15 |
|
T4 |
4 |
|
T5 |
1 |
| others[3] |
2079 |
1 |
|
T1 |
25 |
|
T4 |
6 |
|
T19 |
1 |
| false |
639 |
1 |
|
T1 |
7 |
|
T4 |
1 |
|
T39 |
15 |
| true |
424 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
116 |
1 |
|
T47 |
1 |
|
T55 |
4 |
|
T234 |
1 |
| others[1] |
84 |
1 |
|
T55 |
2 |
|
T123 |
2 |
|
T23 |
1 |
| others[2] |
95 |
1 |
|
T55 |
1 |
|
T48 |
1 |
|
T123 |
1 |
| others[3] |
172 |
1 |
|
T55 |
11 |
|
T123 |
5 |
|
T75 |
1 |
| false |
47 |
1 |
|
T55 |
4 |
|
T76 |
3 |
|
T107 |
3 |
| true |
6326 |
1 |
|
T1 |
78 |
|
T3 |
1 |
|
T4 |
13 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
218 |
1 |
|
T18 |
1 |
|
T118 |
1 |
|
T55 |
14 |
| others[1] |
240 |
1 |
|
T3 |
1 |
|
T55 |
7 |
|
T48 |
1 |
| others[2] |
216 |
1 |
|
T30 |
1 |
|
T104 |
1 |
|
T55 |
12 |
| others[3] |
395 |
1 |
|
T17 |
1 |
|
T28 |
1 |
|
T181 |
1 |
| false |
110 |
1 |
|
T55 |
4 |
|
T287 |
1 |
|
T8 |
1 |
| true |
5661 |
1 |
|
T1 |
78 |
|
T4 |
13 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1016 |
1 |
|
T1 |
15 |
|
T4 |
2 |
|
T39 |
9 |
| others[1] |
1081 |
1 |
|
T1 |
8 |
|
T4 |
2 |
|
T7 |
1 |
| others[2] |
1096 |
1 |
|
T1 |
25 |
|
T4 |
2 |
|
T28 |
1 |
| others[3] |
1725 |
1 |
|
T1 |
25 |
|
T4 |
5 |
|
T5 |
1 |
| false |
548 |
1 |
|
T1 |
5 |
|
T4 |
2 |
|
T6 |
1 |
| true |
1374 |
1 |
|
T3 |
1 |
|
T16 |
1 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
220 |
1 |
|
T118 |
1 |
|
T55 |
11 |
|
T115 |
1 |
| others[1] |
225 |
1 |
|
T55 |
13 |
|
T123 |
2 |
|
T87 |
1 |
| others[2] |
229 |
1 |
|
T28 |
1 |
|
T50 |
1 |
|
T20 |
1 |
| others[3] |
363 |
1 |
|
T3 |
1 |
|
T207 |
1 |
|
T55 |
13 |
| false |
110 |
1 |
|
T29 |
1 |
|
T55 |
6 |
|
T289 |
1 |
| true |
5693 |
1 |
|
T1 |
78 |
|
T4 |
13 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
226 |
1 |
|
T55 |
11 |
|
T48 |
2 |
|
T123 |
1 |
| others[1] |
227 |
1 |
|
T28 |
1 |
|
T47 |
1 |
|
T55 |
10 |
| others[2] |
205 |
1 |
|
T104 |
1 |
|
T55 |
13 |
|
T48 |
1 |
| others[3] |
381 |
1 |
|
T3 |
1 |
|
T55 |
13 |
|
T123 |
1 |
| false |
111 |
1 |
|
T55 |
5 |
|
T86 |
1 |
|
T87 |
1 |
| true |
5690 |
1 |
|
T1 |
78 |
|
T4 |
13 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1217 |
1 |
|
T1 |
17 |
|
T4 |
4 |
|
T50 |
1 |
| others[1] |
1192 |
1 |
|
T1 |
13 |
|
T4 |
2 |
|
T39 |
24 |
| others[2] |
1264 |
1 |
|
T1 |
23 |
|
T4 |
4 |
|
T19 |
1 |
| others[3] |
2089 |
1 |
|
T1 |
21 |
|
T4 |
3 |
|
T5 |
1 |
| false |
633 |
1 |
|
T1 |
4 |
|
T39 |
8 |
|
T95 |
5 |
| true |
445 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1188 |
1 |
|
T1 |
13 |
|
T4 |
3 |
|
T19 |
1 |
| others[1] |
1201 |
1 |
|
T1 |
12 |
|
T4 |
2 |
|
T39 |
24 |
| others[2] |
1288 |
1 |
|
T1 |
16 |
|
T4 |
2 |
|
T7 |
1 |
| others[3] |
2082 |
1 |
|
T1 |
26 |
|
T4 |
6 |
|
T39 |
35 |
| false |
657 |
1 |
|
T1 |
11 |
|
T5 |
1 |
|
T39 |
13 |
| true |
424 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
101 |
1 |
|
T55 |
4 |
|
T234 |
1 |
|
T123 |
3 |
| others[1] |
100 |
1 |
|
T50 |
1 |
|
T55 |
3 |
|
T123 |
3 |
| others[2] |
95 |
1 |
|
T55 |
3 |
|
T226 |
1 |
|
T357 |
1 |
| others[3] |
161 |
1 |
|
T55 |
3 |
|
T123 |
2 |
|
T87 |
1 |
| false |
48 |
1 |
|
T55 |
3 |
|
T123 |
1 |
|
T87 |
1 |
| true |
6335 |
1 |
|
T1 |
78 |
|
T3 |
1 |
|
T4 |
13 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
252 |
1 |
|
T17 |
1 |
|
T55 |
9 |
|
T48 |
3 |
| others[1] |
230 |
1 |
|
T16 |
1 |
|
T47 |
1 |
|
T101 |
1 |
| others[2] |
245 |
1 |
|
T3 |
1 |
|
T118 |
1 |
|
T204 |
1 |
| others[3] |
373 |
1 |
|
T29 |
1 |
|
T207 |
1 |
|
T55 |
17 |
| false |
119 |
1 |
|
T55 |
8 |
|
T99 |
1 |
|
T76 |
8 |
| true |
5621 |
1 |
|
T1 |
78 |
|
T4 |
13 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1047 |
1 |
|
T1 |
16 |
|
T39 |
10 |
|
T102 |
1 |
| others[1] |
1061 |
1 |
|
T1 |
13 |
|
T4 |
1 |
|
T17 |
1 |
| others[2] |
1100 |
1 |
|
T1 |
24 |
|
T4 |
4 |
|
T5 |
1 |
| others[3] |
1741 |
1 |
|
T1 |
22 |
|
T4 |
6 |
|
T16 |
1 |
| false |
510 |
1 |
|
T1 |
3 |
|
T4 |
2 |
|
T39 |
6 |
| true |
1381 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T27 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
226 |
1 |
|
T27 |
1 |
|
T18 |
1 |
|
T29 |
1 |
| others[1] |
245 |
1 |
|
T28 |
1 |
|
T55 |
12 |
|
T287 |
1 |
| others[2] |
214 |
1 |
|
T55 |
10 |
|
T48 |
2 |
|
T93 |
1 |
| others[3] |
380 |
1 |
|
T17 |
1 |
|
T101 |
1 |
|
T55 |
22 |
| false |
118 |
1 |
|
T55 |
6 |
|
T123 |
3 |
|
T76 |
3 |
| true |
5657 |
1 |
|
T1 |
78 |
|
T3 |
1 |
|
T4 |
13 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T55 |
11 |
|
T123 |
1 |
|
T8 |
1 |
| others[1] |
222 |
1 |
|
T55 |
7 |
|
T48 |
2 |
|
T226 |
1 |
| others[2] |
228 |
1 |
|
T3 |
1 |
|
T55 |
8 |
|
T123 |
1 |
| others[3] |
378 |
1 |
|
T50 |
1 |
|
T55 |
15 |
|
T48 |
1 |
| false |
129 |
1 |
|
T29 |
1 |
|
T55 |
4 |
|
T87 |
1 |
| true |
5654 |
1 |
|
T1 |
78 |
|
T4 |
13 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1196 |
1 |
|
T1 |
13 |
|
T4 |
3 |
|
T66 |
1 |
| others[1] |
1241 |
1 |
|
T1 |
17 |
|
T4 |
3 |
|
T5 |
1 |
| others[2] |
1248 |
1 |
|
T1 |
17 |
|
T4 |
3 |
|
T19 |
1 |
| others[3] |
2110 |
1 |
|
T1 |
25 |
|
T4 |
3 |
|
T7 |
1 |
| false |
597 |
1 |
|
T1 |
6 |
|
T4 |
1 |
|
T28 |
1 |
| true |
448 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T16 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1197 |
1 |
|
T1 |
16 |
|
T4 |
3 |
|
T66 |
1 |
| others[1] |
1223 |
1 |
|
T1 |
12 |
|
T4 |
3 |
|
T19 |
1 |
| others[2] |
1261 |
1 |
|
T1 |
16 |
|
T4 |
3 |
|
T5 |
1 |
| others[3] |
2072 |
1 |
|
T1 |
26 |
|
T4 |
4 |
|
T7 |
1 |
| false |
653 |
1 |
|
T1 |
8 |
|
T39 |
10 |
|
T95 |
6 |
| true |
434 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T16 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |