Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T3 |
1 |
|
T42 |
1 |
|
T21 |
9 |
| others[1] |
196 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
9 |
| others[2] |
223 |
1 |
|
T3 |
2 |
|
T21 |
14 |
|
T22 |
11 |
| others[3] |
365 |
1 |
|
T3 |
6 |
|
T21 |
9 |
|
T22 |
19 |
| false |
116 |
1 |
|
T3 |
1 |
|
T21 |
5 |
|
T22 |
6 |
| true |
12801 |
1 |
|
T2 |
2 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8376 |
1 |
|
T2 |
2 |
|
T3 |
3 |
|
T5 |
174 |
| others[1] |
1191 |
1 |
|
T3 |
1 |
|
T19 |
12 |
|
T21 |
32 |
| others[2] |
1234 |
1 |
|
T3 |
4 |
|
T19 |
12 |
|
T21 |
16 |
| others[3] |
2017 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T7 |
1 |
| false |
649 |
1 |
|
T42 |
1 |
|
T19 |
3 |
|
T21 |
9 |
| true |
451 |
1 |
|
T6 |
1 |
|
T7 |
4 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8346 |
1 |
|
T2 |
2 |
|
T3 |
3 |
|
T5 |
174 |
| others[1] |
1200 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T42 |
1 |
| others[2] |
1206 |
1 |
|
T3 |
1 |
|
T18 |
1 |
|
T19 |
11 |
| others[3] |
2082 |
1 |
|
T3 |
3 |
|
T19 |
24 |
|
T21 |
36 |
| false |
649 |
1 |
|
T3 |
1 |
|
T19 |
7 |
|
T43 |
1 |
| true |
435 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
105 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T42 |
1 |
| others[1] |
96 |
1 |
|
T3 |
2 |
|
T21 |
4 |
|
T22 |
4 |
| others[2] |
97 |
1 |
|
T3 |
3 |
|
T78 |
1 |
|
T22 |
7 |
| others[3] |
161 |
1 |
|
T3 |
3 |
|
T17 |
1 |
|
T21 |
5 |
| false |
48 |
1 |
|
T3 |
2 |
|
T21 |
3 |
|
T103 |
1 |
| true |
13411 |
1 |
|
T2 |
2 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
222 |
1 |
|
T7 |
1 |
|
T21 |
11 |
|
T22 |
9 |
| others[1] |
246 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T21 |
11 |
| others[2] |
226 |
1 |
|
T3 |
3 |
|
T27 |
1 |
|
T21 |
6 |
| others[3] |
369 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T21 |
22 |
| false |
134 |
1 |
|
T21 |
6 |
|
T22 |
6 |
|
T35 |
1 |
| true |
12721 |
1 |
|
T2 |
2 |
|
T3 |
3 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8199 |
1 |
|
T2 |
2 |
|
T3 |
1 |
|
T5 |
174 |
| others[1] |
1073 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T42 |
1 |
| others[2] |
991 |
1 |
|
T3 |
4 |
|
T7 |
2 |
|
T19 |
11 |
| others[3] |
1724 |
1 |
|
T3 |
3 |
|
T4 |
1 |
|
T168 |
1 |
| false |
534 |
1 |
|
T3 |
3 |
|
T19 |
5 |
|
T21 |
9 |
| true |
1397 |
1 |
|
T6 |
1 |
|
T7 |
2 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
224 |
1 |
|
T3 |
1 |
|
T21 |
9 |
|
T22 |
6 |
| others[1] |
214 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T21 |
7 |
| others[2] |
216 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
6 |
| others[3] |
365 |
1 |
|
T7 |
1 |
|
T21 |
19 |
|
T22 |
15 |
| false |
109 |
1 |
|
T21 |
5 |
|
T78 |
1 |
|
T22 |
5 |
| true |
12790 |
1 |
|
T2 |
2 |
|
T3 |
9 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
194 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
9 |
| others[1] |
195 |
1 |
|
T21 |
9 |
|
T22 |
4 |
|
T23 |
11 |
| others[2] |
241 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T21 |
12 |
| others[3] |
361 |
1 |
|
T3 |
3 |
|
T7 |
2 |
|
T42 |
1 |
| false |
104 |
1 |
|
T21 |
3 |
|
T22 |
4 |
|
T23 |
11 |
| true |
12823 |
1 |
|
T2 |
2 |
|
T3 |
6 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8398 |
1 |
|
T2 |
2 |
|
T3 |
2 |
|
T5 |
174 |
| others[1] |
1234 |
1 |
|
T3 |
4 |
|
T27 |
1 |
|
T19 |
9 |
| others[2] |
1194 |
1 |
|
T3 |
1 |
|
T42 |
1 |
|
T168 |
1 |
| others[3] |
2024 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T19 |
15 |
| false |
611 |
1 |
|
T3 |
1 |
|
T19 |
5 |
|
T21 |
7 |
| true |
457 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1213 |
1 |
|
T3 |
5 |
|
T19 |
13 |
|
T21 |
20 |
| others[1] |
1196 |
1 |
|
T3 |
2 |
|
T4 |
1 |
|
T19 |
6 |
| others[2] |
1161 |
1 |
|
T3 |
1 |
|
T18 |
1 |
|
T19 |
12 |
| others[3] |
2116 |
1 |
|
T3 |
4 |
|
T168 |
1 |
|
T19 |
18 |
| false |
651 |
1 |
|
T42 |
1 |
|
T19 |
6 |
|
T21 |
11 |
| true |
430 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
123 |
1 |
|
T3 |
3 |
|
T21 |
4 |
|
T78 |
1 |
| others[1] |
101 |
1 |
|
T3 |
2 |
|
T21 |
3 |
|
T22 |
4 |
| others[2] |
105 |
1 |
|
T3 |
1 |
|
T21 |
5 |
|
T22 |
3 |
| others[3] |
173 |
1 |
|
T3 |
3 |
|
T42 |
1 |
|
T21 |
6 |
| false |
58 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T21 |
3 |
| true |
6207 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
4 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T27 |
1 |
| others[1] |
201 |
1 |
|
T3 |
1 |
|
T21 |
18 |
|
T78 |
1 |
| others[2] |
213 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T17 |
1 |
| others[3] |
389 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T21 |
18 |
| false |
130 |
1 |
|
T21 |
3 |
|
T22 |
4 |
|
T29 |
1 |
| true |
5592 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T7 |
3 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1048 |
1 |
|
T3 |
2 |
|
T4 |
1 |
|
T18 |
1 |
| others[1] |
1044 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T42 |
1 |
| others[2] |
1073 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T7 |
1 |
| others[3] |
1686 |
1 |
|
T3 |
5 |
|
T168 |
1 |
|
T19 |
21 |
| false |
535 |
1 |
|
T3 |
1 |
|
T19 |
3 |
|
T21 |
8 |
| true |
1381 |
1 |
|
T7 |
3 |
|
T17 |
1 |
|
T27 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
198 |
1 |
|
T3 |
1 |
|
T27 |
1 |
|
T21 |
9 |
| others[1] |
229 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
9 |
| others[2] |
246 |
1 |
|
T3 |
1 |
|
T21 |
8 |
|
T78 |
1 |
| others[3] |
366 |
1 |
|
T3 |
2 |
|
T21 |
12 |
|
T22 |
19 |
| false |
107 |
1 |
|
T21 |
8 |
|
T22 |
6 |
|
T103 |
1 |
| true |
5621 |
1 |
|
T3 |
7 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T17 |
1 |
| others[1] |
199 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T21 |
12 |
| others[2] |
210 |
1 |
|
T21 |
10 |
|
T22 |
6 |
|
T23 |
7 |
| others[3] |
374 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T42 |
1 |
| false |
114 |
1 |
|
T3 |
2 |
|
T21 |
3 |
|
T22 |
3 |
| true |
5653 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1224 |
1 |
|
T3 |
2 |
|
T4 |
1 |
|
T7 |
1 |
| others[1] |
1165 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T19 |
6 |
| others[2] |
1205 |
1 |
|
T3 |
1 |
|
T19 |
5 |
|
T21 |
19 |
| others[3] |
2077 |
1 |
|
T3 |
5 |
|
T19 |
21 |
|
T21 |
27 |
| false |
656 |
1 |
|
T42 |
1 |
|
T18 |
1 |
|
T19 |
12 |
| true |
440 |
1 |
|
T6 |
1 |
|
T7 |
3 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1220 |
1 |
|
T4 |
1 |
|
T19 |
15 |
|
T21 |
20 |
| others[1] |
1199 |
1 |
|
T3 |
1 |
|
T27 |
1 |
|
T19 |
7 |
| others[2] |
1180 |
1 |
|
T3 |
2 |
|
T18 |
1 |
|
T19 |
8 |
| others[3] |
2070 |
1 |
|
T3 |
6 |
|
T42 |
1 |
|
T168 |
1 |
| false |
677 |
1 |
|
T3 |
3 |
|
T19 |
5 |
|
T21 |
12 |
| true |
421 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
112 |
1 |
|
T7 |
1 |
|
T42 |
1 |
|
T21 |
4 |
| others[1] |
106 |
1 |
|
T3 |
3 |
|
T21 |
3 |
|
T22 |
5 |
| others[2] |
95 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T21 |
3 |
| others[3] |
162 |
1 |
|
T3 |
6 |
|
T21 |
10 |
|
T22 |
7 |
| false |
44 |
1 |
|
T78 |
1 |
|
T22 |
2 |
|
T23 |
2 |
| true |
6248 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
3 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
246 |
1 |
|
T3 |
2 |
|
T27 |
1 |
|
T21 |
5 |
| others[1] |
220 |
1 |
|
T3 |
1 |
|
T21 |
12 |
|
T22 |
11 |
| others[2] |
237 |
1 |
|
T21 |
16 |
|
T22 |
10 |
|
T103 |
1 |
| others[3] |
368 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T42 |
1 |
| false |
123 |
1 |
|
T3 |
1 |
|
T21 |
1 |
|
T22 |
9 |
| true |
5573 |
1 |
|
T3 |
7 |
|
T4 |
1 |
|
T7 |
5 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1075 |
1 |
|
T3 |
1 |
|
T168 |
1 |
|
T19 |
16 |
| others[1] |
1021 |
1 |
|
T3 |
1 |
|
T42 |
1 |
|
T18 |
1 |
| others[2] |
1028 |
1 |
|
T3 |
3 |
|
T4 |
1 |
|
T27 |
1 |
| others[3] |
1738 |
1 |
|
T3 |
6 |
|
T6 |
1 |
|
T7 |
2 |
| false |
521 |
1 |
|
T3 |
1 |
|
T19 |
3 |
|
T21 |
14 |
| true |
1384 |
1 |
|
T7 |
3 |
|
T17 |
1 |
|
T12 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T7 |
1 |
|
T17 |
1 |
|
T21 |
15 |
| others[1] |
251 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T21 |
11 |
| others[2] |
237 |
1 |
|
T3 |
3 |
|
T7 |
3 |
|
T21 |
7 |
| others[3] |
320 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T21 |
10 |
| false |
114 |
1 |
|
T21 |
5 |
|
T22 |
3 |
|
T23 |
5 |
| true |
5616 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T42 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
207 |
1 |
|
T3 |
1 |
|
T21 |
11 |
|
T78 |
1 |
| others[1] |
216 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
13 |
| others[2] |
227 |
1 |
|
T3 |
1 |
|
T21 |
16 |
|
T22 |
14 |
| others[3] |
385 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T17 |
1 |
| false |
101 |
1 |
|
T7 |
2 |
|
T21 |
5 |
|
T22 |
3 |
| true |
5631 |
1 |
|
T3 |
7 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1201 |
1 |
|
T3 |
2 |
|
T18 |
1 |
|
T19 |
8 |
| others[1] |
1218 |
1 |
|
T3 |
2 |
|
T19 |
16 |
|
T21 |
21 |
| others[2] |
1241 |
1 |
|
T3 |
1 |
|
T168 |
1 |
|
T19 |
8 |
| others[3] |
2068 |
1 |
|
T3 |
7 |
|
T4 |
1 |
|
T42 |
1 |
| false |
601 |
1 |
|
T19 |
6 |
|
T21 |
9 |
|
T22 |
19 |
| true |
438 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1278 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T19 |
9 |
| others[1] |
1170 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T42 |
1 |
| others[2] |
1237 |
1 |
|
T18 |
1 |
|
T19 |
13 |
|
T21 |
20 |
| others[3] |
2031 |
1 |
|
T3 |
4 |
|
T19 |
19 |
|
T43 |
1 |
| false |
624 |
1 |
|
T19 |
4 |
|
T21 |
13 |
|
T22 |
8 |
| true |
427 |
1 |
|
T7 |
5 |
|
T17 |
1 |
|
T27 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
111 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T42 |
1 |
| others[1] |
103 |
1 |
|
T21 |
4 |
|
T22 |
13 |
|
T23 |
3 |
| others[2] |
95 |
1 |
|
T3 |
3 |
|
T17 |
1 |
|
T21 |
4 |
| others[3] |
174 |
1 |
|
T3 |
4 |
|
T21 |
7 |
|
T78 |
2 |
| false |
51 |
1 |
|
T3 |
1 |
|
T21 |
1 |
|
T22 |
2 |
| true |
6233 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
4 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T6 |
1 |
|
T7 |
1 |
|
T21 |
7 |
| others[1] |
246 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
11 |
| others[2] |
215 |
1 |
|
T3 |
2 |
|
T21 |
9 |
|
T78 |
1 |
| others[3] |
364 |
1 |
|
T3 |
3 |
|
T21 |
12 |
|
T22 |
13 |
| false |
122 |
1 |
|
T17 |
1 |
|
T21 |
2 |
|
T22 |
4 |
| true |
5610 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T7 |
3 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1003 |
1 |
|
T3 |
2 |
|
T19 |
8 |
|
T43 |
1 |
| others[1] |
1108 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T19 |
14 |
| others[2] |
1026 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T18 |
1 |
| others[3] |
1733 |
1 |
|
T3 |
4 |
|
T168 |
1 |
|
T19 |
18 |
| false |
542 |
1 |
|
T4 |
1 |
|
T42 |
1 |
|
T19 |
4 |
| true |
1355 |
1 |
|
T6 |
1 |
|
T7 |
3 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
225 |
1 |
|
T7 |
1 |
|
T21 |
9 |
|
T22 |
6 |
| others[1] |
196 |
1 |
|
T3 |
2 |
|
T21 |
10 |
|
T22 |
6 |
| others[2] |
218 |
1 |
|
T3 |
4 |
|
T7 |
2 |
|
T42 |
1 |
| others[3] |
390 |
1 |
|
T7 |
1 |
|
T21 |
18 |
|
T78 |
1 |
| false |
110 |
1 |
|
T3 |
2 |
|
T21 |
3 |
|
T22 |
8 |
| true |
5628 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
203 |
1 |
|
T7 |
1 |
|
T21 |
14 |
|
T22 |
11 |
| others[1] |
215 |
1 |
|
T3 |
3 |
|
T21 |
11 |
|
T22 |
6 |
| others[2] |
231 |
1 |
|
T3 |
1 |
|
T21 |
14 |
|
T22 |
14 |
| others[3] |
322 |
1 |
|
T7 |
1 |
|
T21 |
12 |
|
T22 |
16 |
| false |
107 |
1 |
|
T21 |
3 |
|
T22 |
2 |
|
T103 |
1 |
| true |
5689 |
1 |
|
T3 |
8 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1235 |
1 |
|
T3 |
3 |
|
T42 |
1 |
|
T19 |
7 |
| others[1] |
1208 |
1 |
|
T3 |
1 |
|
T19 |
11 |
|
T21 |
21 |
| others[2] |
1210 |
1 |
|
T3 |
3 |
|
T168 |
1 |
|
T19 |
15 |
| others[3] |
2044 |
1 |
|
T3 |
3 |
|
T4 |
1 |
|
T6 |
1 |
| false |
624 |
1 |
|
T3 |
2 |
|
T19 |
2 |
|
T21 |
14 |
| true |
446 |
1 |
|
T7 |
4 |
|
T17 |
1 |
|
T27 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1225 |
1 |
|
T3 |
2 |
|
T18 |
1 |
|
T19 |
8 |
| others[1] |
1203 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T19 |
12 |
| others[2] |
1234 |
1 |
|
T3 |
4 |
|
T19 |
19 |
|
T21 |
15 |
| others[3] |
2026 |
1 |
|
T3 |
2 |
|
T17 |
1 |
|
T42 |
1 |
| false |
652 |
1 |
|
T3 |
2 |
|
T4 |
1 |
|
T168 |
1 |
| true |
427 |
1 |
|
T7 |
5 |
|
T27 |
1 |
|
T12 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |