Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
117 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T21 |
5 |
| others[1] |
108 |
1 |
|
T3 |
5 |
|
T21 |
8 |
|
T78 |
2 |
| others[2] |
114 |
1 |
|
T3 |
1 |
|
T21 |
5 |
|
T22 |
5 |
| others[3] |
175 |
1 |
|
T3 |
4 |
|
T42 |
1 |
|
T21 |
6 |
| false |
56 |
1 |
|
T21 |
4 |
|
T22 |
2 |
|
T23 |
2 |
| true |
6197 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
4 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
279 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T21 |
11 |
| others[1] |
250 |
1 |
|
T3 |
2 |
|
T21 |
11 |
|
T22 |
5 |
| others[2] |
247 |
1 |
|
T6 |
1 |
|
T7 |
1 |
|
T21 |
10 |
| others[3] |
348 |
1 |
|
T3 |
2 |
|
T21 |
17 |
|
T22 |
17 |
| false |
118 |
1 |
|
T21 |
4 |
|
T22 |
7 |
|
T28 |
1 |
| true |
5525 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T7 |
3 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1054 |
1 |
|
T7 |
1 |
|
T42 |
1 |
|
T19 |
10 |
| others[1] |
1055 |
1 |
|
T3 |
3 |
|
T19 |
5 |
|
T21 |
22 |
| others[2] |
999 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T168 |
1 |
| others[3] |
1709 |
1 |
|
T3 |
6 |
|
T7 |
1 |
|
T19 |
25 |
| false |
541 |
1 |
|
T3 |
1 |
|
T4 |
1 |
|
T27 |
1 |
| true |
1409 |
1 |
|
T6 |
1 |
|
T7 |
2 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
230 |
1 |
|
T3 |
2 |
|
T27 |
1 |
|
T21 |
14 |
| others[1] |
205 |
1 |
|
T42 |
1 |
|
T21 |
6 |
|
T22 |
9 |
| others[2] |
218 |
1 |
|
T21 |
12 |
|
T22 |
11 |
|
T23 |
8 |
| others[3] |
355 |
1 |
|
T3 |
3 |
|
T21 |
17 |
|
T22 |
22 |
| false |
118 |
1 |
|
T3 |
2 |
|
T21 |
6 |
|
T22 |
5 |
| true |
5641 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
181 |
1 |
|
T21 |
10 |
|
T22 |
11 |
|
T23 |
5 |
| others[1] |
199 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
5 |
| others[2] |
226 |
1 |
|
T3 |
3 |
|
T21 |
8 |
|
T22 |
9 |
| others[3] |
343 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T42 |
1 |
| false |
108 |
1 |
|
T21 |
6 |
|
T22 |
4 |
|
T23 |
5 |
| true |
5710 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1217 |
1 |
|
T3 |
3 |
|
T19 |
12 |
|
T21 |
24 |
| others[1] |
1227 |
1 |
|
T3 |
1 |
|
T19 |
6 |
|
T21 |
18 |
| others[2] |
1186 |
1 |
|
T3 |
2 |
|
T42 |
1 |
|
T18 |
1 |
| others[3] |
2047 |
1 |
|
T3 |
3 |
|
T4 |
1 |
|
T168 |
1 |
| false |
639 |
1 |
|
T3 |
3 |
|
T19 |
2 |
|
T21 |
5 |
| true |
451 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1212 |
1 |
|
T3 |
2 |
|
T42 |
1 |
|
T168 |
1 |
| others[1] |
1253 |
1 |
|
T3 |
2 |
|
T19 |
11 |
|
T21 |
20 |
| others[2] |
1175 |
1 |
|
T3 |
2 |
|
T4 |
1 |
|
T19 |
13 |
| others[3] |
2075 |
1 |
|
T3 |
5 |
|
T17 |
1 |
|
T19 |
18 |
| false |
631 |
1 |
|
T3 |
1 |
|
T19 |
4 |
|
T21 |
5 |
| true |
421 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T27 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
104 |
1 |
|
T3 |
4 |
|
T21 |
5 |
|
T78 |
1 |
| others[1] |
105 |
1 |
|
T3 |
3 |
|
T42 |
1 |
|
T21 |
2 |
| others[2] |
114 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
1 |
| others[3] |
178 |
1 |
|
T3 |
2 |
|
T21 |
11 |
|
T22 |
12 |
| false |
54 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T21 |
1 |
| true |
6212 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
3 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
240 |
1 |
|
T3 |
3 |
|
T7 |
3 |
|
T27 |
1 |
| others[1] |
261 |
1 |
|
T21 |
14 |
|
T22 |
14 |
|
T29 |
1 |
| others[2] |
220 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
12 |
| others[3] |
390 |
1 |
|
T3 |
3 |
|
T42 |
1 |
|
T21 |
15 |
| false |
128 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T21 |
3 |
| true |
5528 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1056 |
1 |
|
T3 |
2 |
|
T7 |
2 |
|
T19 |
15 |
| others[1] |
986 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T42 |
1 |
| others[2] |
1058 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T168 |
1 |
| others[3] |
1705 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T18 |
1 |
| false |
545 |
1 |
|
T3 |
1 |
|
T19 |
3 |
|
T21 |
12 |
| true |
1417 |
1 |
|
T7 |
2 |
|
T17 |
1 |
|
T27 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T3 |
1 |
|
T21 |
4 |
|
T22 |
11 |
| others[1] |
216 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T17 |
1 |
| others[2] |
215 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
13 |
| others[3] |
415 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T21 |
20 |
| false |
120 |
1 |
|
T21 |
8 |
|
T22 |
10 |
|
T23 |
7 |
| true |
5585 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T7 |
3 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
206 |
1 |
|
T3 |
1 |
|
T21 |
9 |
|
T22 |
11 |
| others[1] |
207 |
1 |
|
T21 |
11 |
|
T22 |
7 |
|
T23 |
10 |
| others[2] |
207 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T17 |
1 |
| others[3] |
333 |
1 |
|
T3 |
2 |
|
T21 |
18 |
|
T22 |
16 |
| false |
127 |
1 |
|
T3 |
2 |
|
T21 |
7 |
|
T78 |
1 |
| true |
5687 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1261 |
1 |
|
T3 |
2 |
|
T4 |
1 |
|
T42 |
1 |
| others[1] |
1201 |
1 |
|
T7 |
2 |
|
T19 |
9 |
|
T21 |
24 |
| others[2] |
1220 |
1 |
|
T3 |
5 |
|
T19 |
14 |
|
T43 |
1 |
| others[3] |
2022 |
1 |
|
T3 |
3 |
|
T27 |
1 |
|
T18 |
1 |
| false |
616 |
1 |
|
T3 |
2 |
|
T19 |
9 |
|
T21 |
5 |
| true |
447 |
1 |
|
T6 |
1 |
|
T7 |
3 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1223 |
1 |
|
T3 |
1 |
|
T168 |
1 |
|
T19 |
8 |
| others[1] |
1190 |
1 |
|
T3 |
3 |
|
T19 |
6 |
|
T21 |
15 |
| others[2] |
1226 |
1 |
|
T3 |
3 |
|
T18 |
1 |
|
T19 |
12 |
| others[3] |
2068 |
1 |
|
T3 |
5 |
|
T42 |
1 |
|
T19 |
18 |
| false |
634 |
1 |
|
T4 |
1 |
|
T19 |
11 |
|
T21 |
13 |
| true |
426 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
101 |
1 |
|
T3 |
3 |
|
T21 |
5 |
|
T78 |
1 |
| others[1] |
94 |
1 |
|
T3 |
3 |
|
T21 |
2 |
|
T22 |
5 |
| others[2] |
107 |
1 |
|
T3 |
3 |
|
T21 |
3 |
|
T22 |
3 |
| others[3] |
179 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T42 |
1 |
| false |
51 |
1 |
|
T21 |
3 |
|
T22 |
2 |
|
T23 |
3 |
| true |
6235 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
4 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
9 |
| others[1] |
214 |
1 |
|
T3 |
1 |
|
T21 |
8 |
|
T22 |
11 |
| others[2] |
251 |
1 |
|
T3 |
1 |
|
T42 |
1 |
|
T21 |
8 |
| others[3] |
364 |
1 |
|
T3 |
2 |
|
T21 |
11 |
|
T78 |
1 |
| false |
100 |
1 |
|
T3 |
1 |
|
T21 |
7 |
|
T22 |
5 |
| true |
5621 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1024 |
1 |
|
T3 |
1 |
|
T4 |
1 |
|
T7 |
2 |
| others[1] |
1026 |
1 |
|
T3 |
2 |
|
T19 |
9 |
|
T21 |
22 |
| others[2] |
1091 |
1 |
|
T3 |
2 |
|
T19 |
11 |
|
T21 |
23 |
| others[3] |
1675 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T27 |
1 |
| false |
557 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T17 |
1 |
| true |
1394 |
1 |
|
T6 |
1 |
|
T7 |
1 |
|
T12 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
219 |
1 |
|
T21 |
9 |
|
T22 |
11 |
|
T103 |
1 |
| others[1] |
219 |
1 |
|
T3 |
2 |
|
T21 |
6 |
|
T22 |
9 |
| others[2] |
225 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T7 |
1 |
| others[3] |
362 |
1 |
|
T3 |
3 |
|
T7 |
3 |
|
T27 |
1 |
| false |
111 |
1 |
|
T17 |
1 |
|
T21 |
5 |
|
T22 |
6 |
| true |
5631 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
201 |
1 |
|
T3 |
3 |
|
T21 |
12 |
|
T22 |
12 |
| others[1] |
217 |
1 |
|
T21 |
11 |
|
T22 |
10 |
|
T23 |
9 |
| others[2] |
210 |
1 |
|
T3 |
2 |
|
T21 |
10 |
|
T22 |
9 |
| others[3] |
355 |
1 |
|
T7 |
1 |
|
T21 |
11 |
|
T22 |
12 |
| false |
112 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T17 |
1 |
| true |
5672 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1200 |
1 |
|
T3 |
2 |
|
T19 |
8 |
|
T21 |
16 |
| others[1] |
1279 |
1 |
|
T3 |
5 |
|
T42 |
1 |
|
T19 |
10 |
| others[2] |
1210 |
1 |
|
T3 |
2 |
|
T4 |
1 |
|
T168 |
1 |
| others[3] |
2017 |
1 |
|
T3 |
3 |
|
T19 |
22 |
|
T43 |
1 |
| false |
625 |
1 |
|
T19 |
7 |
|
T21 |
11 |
|
T87 |
1 |
| true |
436 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1195 |
1 |
|
T3 |
2 |
|
T4 |
1 |
|
T6 |
1 |
| others[1] |
1241 |
1 |
|
T3 |
2 |
|
T27 |
1 |
|
T19 |
11 |
| others[2] |
1191 |
1 |
|
T3 |
3 |
|
T19 |
13 |
|
T21 |
23 |
| others[3] |
2081 |
1 |
|
T3 |
5 |
|
T19 |
13 |
|
T43 |
1 |
| false |
639 |
1 |
|
T19 |
5 |
|
T21 |
5 |
|
T87 |
1 |
| true |
420 |
1 |
|
T7 |
5 |
|
T17 |
1 |
|
T12 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
99 |
1 |
|
T3 |
2 |
|
T21 |
4 |
|
T78 |
2 |
| others[1] |
98 |
1 |
|
T3 |
3 |
|
T21 |
2 |
|
T22 |
3 |
| others[2] |
91 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T21 |
5 |
| others[3] |
172 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T42 |
1 |
| false |
57 |
1 |
|
T3 |
1 |
|
T21 |
1 |
|
T22 |
3 |
| true |
6250 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
3 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
218 |
1 |
|
T3 |
1 |
|
T21 |
8 |
|
T22 |
6 |
| others[1] |
200 |
1 |
|
T3 |
1 |
|
T21 |
9 |
|
T22 |
9 |
| others[2] |
263 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T27 |
1 |
| others[3] |
385 |
1 |
|
T3 |
2 |
|
T42 |
1 |
|
T21 |
12 |
| false |
137 |
1 |
|
T3 |
2 |
|
T21 |
5 |
|
T22 |
8 |
| true |
5564 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1015 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T19 |
6 |
| others[1] |
1076 |
1 |
|
T3 |
2 |
|
T7 |
2 |
|
T27 |
1 |
| others[2] |
1064 |
1 |
|
T3 |
3 |
|
T42 |
1 |
|
T168 |
1 |
| others[3] |
1705 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T19 |
26 |
| false |
532 |
1 |
|
T19 |
4 |
|
T21 |
13 |
|
T22 |
4 |
| true |
1375 |
1 |
|
T6 |
1 |
|
T7 |
2 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
239 |
1 |
|
T3 |
3 |
|
T21 |
11 |
|
T22 |
12 |
| others[1] |
211 |
1 |
|
T3 |
2 |
|
T21 |
7 |
|
T22 |
4 |
| others[2] |
216 |
1 |
|
T21 |
11 |
|
T22 |
9 |
|
T23 |
7 |
| others[3] |
363 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T7 |
1 |
| false |
134 |
1 |
|
T21 |
6 |
|
T78 |
2 |
|
T22 |
6 |
| true |
5604 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T7 |
4 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
211 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
8 |
| others[1] |
214 |
1 |
|
T7 |
1 |
|
T21 |
17 |
|
T22 |
7 |
| others[2] |
211 |
1 |
|
T21 |
8 |
|
T78 |
1 |
|
T22 |
17 |
| others[3] |
354 |
1 |
|
T3 |
2 |
|
T21 |
8 |
|
T22 |
15 |
| false |
95 |
1 |
|
T21 |
4 |
|
T22 |
3 |
|
T23 |
8 |
| true |
5682 |
1 |
|
T3 |
9 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1229 |
1 |
|
T3 |
1 |
|
T19 |
15 |
|
T21 |
15 |
| others[1] |
1242 |
1 |
|
T3 |
2 |
|
T27 |
1 |
|
T18 |
1 |
| others[2] |
1202 |
1 |
|
T3 |
2 |
|
T42 |
1 |
|
T19 |
9 |
| others[3] |
2011 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T168 |
1 |
| false |
630 |
1 |
|
T3 |
1 |
|
T19 |
7 |
|
T21 |
10 |
| true |
453 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1217 |
1 |
|
T3 |
2 |
|
T42 |
1 |
|
T19 |
14 |
| others[1] |
1143 |
1 |
|
T3 |
2 |
|
T18 |
1 |
|
T19 |
13 |
| others[2] |
1272 |
1 |
|
T3 |
1 |
|
T19 |
4 |
|
T21 |
24 |
| others[3] |
2073 |
1 |
|
T3 |
6 |
|
T17 |
1 |
|
T168 |
1 |
| false |
637 |
1 |
|
T3 |
1 |
|
T4 |
1 |
|
T19 |
5 |
| true |
425 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T27 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
106 |
1 |
|
T21 |
3 |
|
T22 |
3 |
|
T23 |
8 |
| others[1] |
97 |
1 |
|
T3 |
1 |
|
T21 |
1 |
|
T22 |
4 |
| others[2] |
121 |
1 |
|
T3 |
3 |
|
T21 |
1 |
|
T22 |
8 |
| others[3] |
192 |
1 |
|
T3 |
5 |
|
T42 |
1 |
|
T21 |
9 |
| false |
52 |
1 |
|
T3 |
3 |
|
T21 |
2 |
|
T22 |
2 |
| true |
6199 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
5 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
218 |
1 |
|
T21 |
11 |
|
T22 |
11 |
|
T37 |
1 |
| others[1] |
227 |
1 |
|
T3 |
1 |
|
T21 |
12 |
|
T22 |
9 |
| others[2] |
218 |
1 |
|
T21 |
8 |
|
T22 |
6 |
|
T184 |
1 |
| others[3] |
362 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T21 |
16 |
| false |
131 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T17 |
1 |
| true |
5611 |
1 |
|
T3 |
8 |
|
T4 |
1 |
|
T7 |
4 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1109 |
1 |
|
T3 |
3 |
|
T18 |
1 |
|
T19 |
8 |
| others[1] |
1000 |
1 |
|
T3 |
4 |
|
T19 |
10 |
|
T21 |
20 |
| others[2] |
1038 |
1 |
|
T3 |
2 |
|
T19 |
11 |
|
T43 |
1 |
| others[3] |
1727 |
1 |
|
T3 |
2 |
|
T7 |
1 |
|
T42 |
1 |
| false |
547 |
1 |
|
T3 |
1 |
|
T4 |
1 |
|
T19 |
6 |
| true |
1346 |
1 |
|
T6 |
1 |
|
T7 |
4 |
|
T17 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |