Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T3 |
2 |
|
T21 |
12 |
|
T22 |
7 |
| others[1] |
233 |
1 |
|
T3 |
1 |
|
T21 |
10 |
|
T22 |
11 |
| others[2] |
229 |
1 |
|
T3 |
2 |
|
T21 |
13 |
|
T78 |
1 |
| others[3] |
359 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T7 |
1 |
| false |
111 |
1 |
|
T3 |
1 |
|
T7 |
2 |
|
T21 |
6 |
| true |
5606 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T7 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
199 |
1 |
|
T3 |
1 |
|
T21 |
13 |
|
T22 |
17 |
| others[1] |
213 |
1 |
|
T3 |
2 |
|
T21 |
5 |
|
T22 |
7 |
| others[2] |
241 |
1 |
|
T3 |
2 |
|
T21 |
7 |
|
T22 |
11 |
| others[3] |
364 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T42 |
1 |
| false |
111 |
1 |
|
T7 |
1 |
|
T21 |
3 |
|
T22 |
4 |
| true |
5639 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1247 |
1 |
|
T3 |
1 |
|
T42 |
1 |
|
T19 |
12 |
| others[1] |
1172 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T19 |
12 |
| others[2] |
1259 |
1 |
|
T3 |
3 |
|
T4 |
1 |
|
T27 |
1 |
| others[3] |
2044 |
1 |
|
T3 |
4 |
|
T18 |
1 |
|
T19 |
15 |
| false |
614 |
1 |
|
T3 |
1 |
|
T168 |
1 |
|
T19 |
5 |
| true |
431 |
1 |
|
T6 |
1 |
|
T7 |
4 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1209 |
1 |
|
T3 |
1 |
|
T19 |
12 |
|
T21 |
20 |
| others[1] |
1234 |
1 |
|
T3 |
3 |
|
T19 |
12 |
|
T21 |
20 |
| others[2] |
1235 |
1 |
|
T3 |
3 |
|
T168 |
1 |
|
T18 |
1 |
| others[3] |
2046 |
1 |
|
T3 |
3 |
|
T19 |
18 |
|
T43 |
1 |
| false |
617 |
1 |
|
T3 |
2 |
|
T4 |
1 |
|
T42 |
1 |
| true |
426 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
94 |
1 |
|
T3 |
2 |
|
T21 |
3 |
|
T78 |
1 |
| others[1] |
103 |
1 |
|
T42 |
1 |
|
T21 |
8 |
|
T22 |
3 |
| others[2] |
103 |
1 |
|
T3 |
2 |
|
T21 |
4 |
|
T22 |
5 |
| others[3] |
183 |
1 |
|
T3 |
8 |
|
T21 |
7 |
|
T22 |
3 |
| false |
54 |
1 |
|
T21 |
1 |
|
T78 |
1 |
|
T23 |
4 |
| true |
6230 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
5 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
224 |
1 |
|
T21 |
10 |
|
T22 |
11 |
|
T23 |
8 |
| others[1] |
207 |
1 |
|
T3 |
2 |
|
T27 |
1 |
|
T21 |
3 |
| others[2] |
238 |
1 |
|
T3 |
2 |
|
T21 |
17 |
|
T22 |
8 |
| others[3] |
390 |
1 |
|
T3 |
3 |
|
T6 |
1 |
|
T7 |
2 |
| false |
119 |
1 |
|
T21 |
1 |
|
T22 |
5 |
|
T28 |
1 |
| true |
5589 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T7 |
3 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1040 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T168 |
1 |
| others[1] |
991 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T19 |
10 |
| others[2] |
1005 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T27 |
1 |
| others[3] |
1770 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T42 |
1 |
| false |
583 |
1 |
|
T3 |
3 |
|
T19 |
13 |
|
T21 |
8 |
| true |
1378 |
1 |
|
T7 |
3 |
|
T17 |
1 |
|
T12 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T21 |
10 |
|
T22 |
10 |
|
T37 |
1 |
| others[1] |
243 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T7 |
1 |
| others[2] |
198 |
1 |
|
T7 |
2 |
|
T17 |
1 |
|
T21 |
9 |
| others[3] |
384 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T42 |
1 |
| false |
130 |
1 |
|
T21 |
7 |
|
T78 |
1 |
|
T22 |
6 |
| true |
5602 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
202 |
1 |
|
T3 |
3 |
|
T21 |
7 |
|
T22 |
5 |
| others[1] |
205 |
1 |
|
T3 |
1 |
|
T21 |
12 |
|
T22 |
9 |
| others[2] |
219 |
1 |
|
T21 |
10 |
|
T22 |
11 |
|
T23 |
14 |
| others[3] |
371 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T17 |
1 |
| false |
98 |
1 |
|
T21 |
1 |
|
T22 |
6 |
|
T23 |
3 |
| true |
5672 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1246 |
1 |
|
T3 |
2 |
|
T42 |
1 |
|
T18 |
1 |
| others[1] |
1192 |
1 |
|
T3 |
1 |
|
T168 |
1 |
|
T19 |
13 |
| others[2] |
1192 |
1 |
|
T3 |
4 |
|
T19 |
13 |
|
T21 |
22 |
| others[3] |
2080 |
1 |
|
T3 |
4 |
|
T19 |
18 |
|
T43 |
1 |
| false |
605 |
1 |
|
T3 |
1 |
|
T4 |
1 |
|
T7 |
1 |
| true |
452 |
1 |
|
T6 |
1 |
|
T7 |
4 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1189 |
1 |
|
T3 |
1 |
|
T19 |
16 |
|
T21 |
26 |
| others[1] |
1271 |
1 |
|
T3 |
6 |
|
T42 |
1 |
|
T168 |
1 |
| others[2] |
1220 |
1 |
|
T3 |
1 |
|
T4 |
1 |
|
T18 |
1 |
| others[3] |
2012 |
1 |
|
T3 |
2 |
|
T19 |
15 |
|
T21 |
32 |
| false |
647 |
1 |
|
T3 |
2 |
|
T19 |
6 |
|
T21 |
6 |
| true |
428 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
111 |
1 |
|
T3 |
1 |
|
T21 |
5 |
|
T22 |
4 |
| others[1] |
102 |
1 |
|
T3 |
4 |
|
T21 |
7 |
|
T78 |
1 |
| others[2] |
106 |
1 |
|
T3 |
2 |
|
T21 |
5 |
|
T78 |
1 |
| others[3] |
167 |
1 |
|
T3 |
3 |
|
T21 |
6 |
|
T22 |
7 |
| false |
52 |
1 |
|
T3 |
2 |
|
T42 |
1 |
|
T21 |
3 |
| true |
6229 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
5 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
206 |
1 |
|
T3 |
2 |
|
T21 |
11 |
|
T22 |
13 |
| others[1] |
219 |
1 |
|
T21 |
9 |
|
T22 |
3 |
|
T23 |
14 |
| others[2] |
217 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T7 |
2 |
| others[3] |
405 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T21 |
17 |
| false |
132 |
1 |
|
T3 |
1 |
|
T27 |
1 |
|
T21 |
7 |
| true |
5588 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T7 |
2 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1102 |
1 |
|
T3 |
1 |
|
T4 |
1 |
|
T7 |
2 |
| others[1] |
984 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T42 |
1 |
| others[2] |
1024 |
1 |
|
T3 |
2 |
|
T12 |
1 |
|
T19 |
7 |
| others[3] |
1710 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T17 |
1 |
| false |
544 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T19 |
3 |
| true |
1403 |
1 |
|
T6 |
1 |
|
T27 |
1 |
|
T35 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
198 |
1 |
|
T21 |
7 |
|
T22 |
6 |
|
T23 |
7 |
| others[1] |
214 |
1 |
|
T3 |
5 |
|
T21 |
12 |
|
T22 |
10 |
| others[2] |
240 |
1 |
|
T3 |
2 |
|
T21 |
9 |
|
T22 |
10 |
| others[3] |
379 |
1 |
|
T3 |
2 |
|
T6 |
1 |
|
T21 |
17 |
| false |
101 |
1 |
|
T21 |
5 |
|
T22 |
6 |
|
T103 |
1 |
| true |
5635 |
1 |
|
T3 |
3 |
|
T4 |
1 |
|
T7 |
5 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
212 |
1 |
|
T3 |
1 |
|
T17 |
1 |
|
T21 |
9 |
| others[1] |
225 |
1 |
|
T3 |
5 |
|
T21 |
8 |
|
T22 |
10 |
| others[2] |
210 |
1 |
|
T42 |
1 |
|
T21 |
11 |
|
T22 |
7 |
| others[3] |
333 |
1 |
|
T7 |
1 |
|
T21 |
24 |
|
T78 |
1 |
| false |
114 |
1 |
|
T3 |
1 |
|
T21 |
4 |
|
T22 |
9 |
| true |
5673 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1230 |
1 |
|
T3 |
1 |
|
T19 |
7 |
|
T21 |
13 |
| others[1] |
1168 |
1 |
|
T19 |
10 |
|
T21 |
14 |
|
T78 |
1 |
| others[2] |
1244 |
1 |
|
T3 |
5 |
|
T19 |
11 |
|
T43 |
1 |
| others[3] |
2072 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T42 |
1 |
| false |
602 |
1 |
|
T3 |
1 |
|
T7 |
2 |
|
T168 |
1 |
| true |
451 |
1 |
|
T6 |
1 |
|
T7 |
3 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1191 |
1 |
|
T4 |
1 |
|
T18 |
1 |
|
T19 |
8 |
| others[1] |
1196 |
1 |
|
T3 |
6 |
|
T27 |
1 |
|
T19 |
6 |
| others[2] |
1260 |
1 |
|
T3 |
1 |
|
T19 |
11 |
|
T43 |
1 |
| others[3] |
2075 |
1 |
|
T3 |
4 |
|
T42 |
1 |
|
T168 |
1 |
| false |
619 |
1 |
|
T3 |
1 |
|
T19 |
5 |
|
T21 |
9 |
| true |
426 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
118 |
1 |
|
T3 |
1 |
|
T42 |
1 |
|
T21 |
3 |
| others[1] |
88 |
1 |
|
T3 |
3 |
|
T21 |
1 |
|
T22 |
1 |
| others[2] |
109 |
1 |
|
T3 |
2 |
|
T21 |
3 |
|
T22 |
6 |
| others[3] |
176 |
1 |
|
T3 |
3 |
|
T21 |
12 |
|
T78 |
1 |
| false |
57 |
1 |
|
T3 |
3 |
|
T21 |
2 |
|
T78 |
1 |
| true |
6219 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
5 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T3 |
2 |
|
T42 |
1 |
|
T21 |
10 |
| others[1] |
262 |
1 |
|
T3 |
2 |
|
T21 |
15 |
|
T22 |
15 |
| others[2] |
240 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
10 |
| others[3] |
361 |
1 |
|
T3 |
1 |
|
T7 |
2 |
|
T21 |
15 |
| false |
122 |
1 |
|
T6 |
1 |
|
T7 |
1 |
|
T21 |
1 |
| true |
5548 |
1 |
|
T3 |
6 |
|
T4 |
1 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
988 |
1 |
|
T3 |
4 |
|
T7 |
1 |
|
T19 |
9 |
| others[1] |
1048 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T19 |
11 |
| others[2] |
1079 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T168 |
1 |
| others[3] |
1731 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T42 |
1 |
| false |
528 |
1 |
|
T19 |
10 |
|
T21 |
10 |
|
T22 |
8 |
| true |
1393 |
1 |
|
T6 |
1 |
|
T7 |
2 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
248 |
1 |
|
T3 |
1 |
|
T7 |
2 |
|
T17 |
1 |
| others[1] |
231 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
8 |
| others[2] |
216 |
1 |
|
T3 |
1 |
|
T42 |
1 |
|
T21 |
8 |
| others[3] |
346 |
1 |
|
T3 |
4 |
|
T6 |
1 |
|
T7 |
1 |
| false |
111 |
1 |
|
T21 |
6 |
|
T22 |
7 |
|
T23 |
5 |
| true |
5615 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T42 |
1 |
|
T21 |
9 |
|
T22 |
10 |
| others[1] |
204 |
1 |
|
T3 |
2 |
|
T21 |
8 |
|
T78 |
1 |
| others[2] |
214 |
1 |
|
T7 |
1 |
|
T21 |
13 |
|
T78 |
1 |
| others[3] |
344 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
12 |
| false |
114 |
1 |
|
T3 |
1 |
|
T21 |
11 |
|
T22 |
5 |
| true |
5675 |
1 |
|
T3 |
8 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1215 |
1 |
|
T3 |
2 |
|
T42 |
1 |
|
T19 |
10 |
| others[1] |
1207 |
1 |
|
T3 |
3 |
|
T18 |
1 |
|
T19 |
13 |
| others[2] |
1228 |
1 |
|
T3 |
1 |
|
T19 |
9 |
|
T21 |
25 |
| others[3] |
2049 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T168 |
1 |
| false |
624 |
1 |
|
T3 |
2 |
|
T19 |
5 |
|
T21 |
7 |
| true |
444 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1203 |
1 |
|
T3 |
2 |
|
T18 |
1 |
|
T19 |
12 |
| others[1] |
1240 |
1 |
|
T3 |
3 |
|
T4 |
1 |
|
T19 |
15 |
| others[2] |
1216 |
1 |
|
T3 |
4 |
|
T42 |
1 |
|
T19 |
12 |
| others[3] |
2082 |
1 |
|
T3 |
1 |
|
T19 |
13 |
|
T21 |
35 |
| false |
600 |
1 |
|
T3 |
2 |
|
T168 |
1 |
|
T19 |
3 |
| true |
426 |
1 |
|
T6 |
1 |
|
T7 |
5 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
116 |
1 |
|
T3 |
1 |
|
T21 |
4 |
|
T22 |
3 |
| others[1] |
92 |
1 |
|
T3 |
1 |
|
T21 |
1 |
|
T22 |
2 |
| others[2] |
110 |
1 |
|
T3 |
3 |
|
T21 |
8 |
|
T78 |
1 |
| others[3] |
178 |
1 |
|
T3 |
5 |
|
T21 |
10 |
|
T78 |
1 |
| false |
52 |
1 |
|
T3 |
2 |
|
T42 |
1 |
|
T21 |
1 |
| true |
6219 |
1 |
|
T4 |
1 |
|
T6 |
1 |
|
T7 |
5 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
245 |
1 |
|
T3 |
2 |
|
T21 |
7 |
|
T78 |
1 |
| others[1] |
222 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
10 |
| others[2] |
226 |
1 |
|
T3 |
2 |
|
T21 |
11 |
|
T22 |
11 |
| others[3] |
380 |
1 |
|
T3 |
2 |
|
T7 |
2 |
|
T21 |
9 |
| false |
120 |
1 |
|
T3 |
1 |
|
T42 |
1 |
|
T27 |
1 |
| true |
5574 |
1 |
|
T3 |
4 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1043 |
1 |
|
T4 |
1 |
|
T19 |
11 |
|
T21 |
26 |
| others[1] |
1068 |
1 |
|
T3 |
3 |
|
T7 |
1 |
|
T168 |
1 |
| others[2] |
984 |
1 |
|
T3 |
1 |
|
T7 |
2 |
|
T19 |
9 |
| others[3] |
1693 |
1 |
|
T3 |
6 |
|
T42 |
1 |
|
T12 |
1 |
| false |
558 |
1 |
|
T3 |
2 |
|
T19 |
5 |
|
T21 |
7 |
| true |
1421 |
1 |
|
T6 |
1 |
|
T7 |
2 |
|
T17 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T3 |
2 |
|
T7 |
2 |
|
T21 |
9 |
| others[1] |
237 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
15 |
| others[2] |
240 |
1 |
|
T3 |
2 |
|
T21 |
10 |
|
T22 |
9 |
| others[3] |
367 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T42 |
1 |
| false |
103 |
1 |
|
T3 |
1 |
|
T21 |
2 |
|
T22 |
2 |
| true |
5586 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
206 |
1 |
|
T3 |
1 |
|
T7 |
1 |
|
T21 |
8 |
| others[1] |
211 |
1 |
|
T3 |
1 |
|
T21 |
11 |
|
T22 |
11 |
| others[2] |
210 |
1 |
|
T42 |
1 |
|
T21 |
8 |
|
T22 |
10 |
| others[3] |
390 |
1 |
|
T3 |
2 |
|
T21 |
18 |
|
T22 |
16 |
| false |
113 |
1 |
|
T21 |
6 |
|
T22 |
3 |
|
T103 |
1 |
| true |
5637 |
1 |
|
T3 |
8 |
|
T4 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1251 |
1 |
|
T3 |
2 |
|
T19 |
11 |
|
T21 |
19 |
| others[1] |
1212 |
1 |
|
T3 |
1 |
|
T19 |
9 |
|
T21 |
18 |
| others[2] |
1155 |
1 |
|
T3 |
4 |
|
T6 |
1 |
|
T42 |
1 |
| others[3] |
2072 |
1 |
|
T3 |
5 |
|
T4 |
1 |
|
T168 |
1 |
| false |
644 |
1 |
|
T19 |
4 |
|
T21 |
9 |
|
T87 |
1 |
| true |
433 |
1 |
|
T7 |
5 |
|
T17 |
1 |
|
T27 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |