Summary for Variable instr_type_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for instr_type_cp
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| others | 
6011 | 
1 | 
 | 
T19 | 
122 | 
 | 
T49 | 
271 | 
 | 
T50 | 
210 | 
| instr_types[0] | 
6942 | 
1 | 
 | 
T19 | 
300 | 
 | 
T49 | 
200 | 
 | 
T50 | 
284 | 
| instr_types[1] | 
4607983 | 
1 | 
 | 
T1 | 
96 | 
 | 
T3 | 
70 | 
 | 
T6 | 
16494 | 
Summary for Variable key_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for key_cp
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
4618922 | 
1 | 
 | 
T1 | 
96 | 
 | 
T3 | 
70 | 
 | 
T6 | 
16494 | 
| auto[1] | 
2014 | 
1 | 
 | 
T19 | 
129 | 
 | 
T49 | 
236 | 
 | 
T50 | 
304 | 
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
6 | 
0 | 
6 | 
100.00 | 
 | 
Automatically Generated Cross Bins for key_instr_cross
Bins
| key_cp | instr_type_cp | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
others | 
5606 | 
1 | 
 | 
T19 | 
86 | 
 | 
T49 | 
198 | 
 | 
T50 | 
139 | 
| auto[0] | 
instr_types[0] | 
6215 | 
1 | 
 | 
T19 | 
264 | 
 | 
T49 | 
139 | 
 | 
T50 | 
183 | 
| auto[0] | 
instr_types[1] | 
4607101 | 
1 | 
 | 
T1 | 
96 | 
 | 
T3 | 
70 | 
 | 
T6 | 
16494 | 
| auto[1] | 
others | 
405 | 
1 | 
 | 
T19 | 
36 | 
 | 
T49 | 
73 | 
 | 
T50 | 
71 | 
| auto[1] | 
instr_types[0] | 
727 | 
1 | 
 | 
T19 | 
36 | 
 | 
T49 | 
61 | 
 | 
T50 | 
101 | 
| auto[1] | 
instr_types[1] | 
882 | 
1 | 
 | 
T19 | 
57 | 
 | 
T49 | 
102 | 
 | 
T50 | 
132 |