Unified Coverage Report :: Group :: tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[1].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

Group : tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[1].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_cov_0/flash_ctrl_phy_cov_if.sv

---

Summary for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[1].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	99	0	99	100.00

Variables for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[1].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
read_interval	99	0	99	100.00	100	1	1	0

Summary for Variable read_interval

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	99	0	99	100.00

User Defined Bins for read_interval

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4836469	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
duration[1]	599070	1		T1	3960		T8	5		T47	5
duration[2]	917211	1		T1	7899		T5	1320		T7	20
duration[3]	81661	1		T1	239		T8	6		T47	10
duration[4]	824787	1		T1	3211		T6	107		T5	1153
duration[5]	59776	1		T1	175		T8	14		T47	11
duration[6]	146884	1		T1	72		T6	89		T8	16
duration[7]	46445	1		T1	75		T8	7		T47	7
duration[8]	26844	1		T1	42		T6	6		T8	14
duration[9]	36766	1		T1	50		T8	18		T47	14
duration[10]	20553	1		T1	28		T6	1		T8	19
duration[11]	20634	1		T1	17		T8	6		T47	8
duration[12]	17605	1		T1	15		T6	1		T8	11
duration[13]	13323	1		T1	7		T8	6		T47	1
duration[14]	14269	1		T1	17		T6	2		T8	9
duration[15]	9893	1		T1	2		T6	1		T8	8
duration[16]	10215	1		T1	6		T8	2		T47	3
duration[17]	10453	1		T1	6		T8	6		T47	4
duration[18]	7901	1		T1	1		T6	1		T8	6
duration[19]	8945	1		T1	2		T6	2		T8	3
duration[20]	8444	1		T1	4		T6	3		T40	3
duration[21]	8335	1		T1	8		T8	2		T40	15
duration[22]	7788	1		T1	1		T6	1		T8	1
duration[23]	6199	1		T6	3		T40	2		T32	6
duration[24]	6830	1		T6	2		T40	5		T32	10
duration[25]	5244	1		T1	2		T40	11		T32	10
duration[26]	4756	1		T6	1		T47	1		T40	6
duration[27]	3720	1		T6	1		T40	1		T32	2
duration[28]	3781	1		T6	1		T40	6		T32	2
duration[29]	3534	1		T6	1		T47	1		T40	1
duration[30]	3486	1		T6	1		T32	5		T41	17
duration[31]	2213	1		T6	1		T47	4		T32	3
duration[32]	2452	1		T32	1		T65	96		T138	8
duration[33]	3040	1		T1	149		T6	2		T40	1
duration[34]	2236	1		T47	4		T40	1		T32	2
duration[35]	1927	1		T1	147		T6	1		T40	1
duration[36]	932	1		T1	182		T40	1		T32	1
duration[37]	1188	1		T32	1		T41	1		T138	3
duration[38]	272	1		T65	1		T138	3		T217	1
duration[39]	1450	1		T6	3		T26	1		T138	2
duration[40]	1020	1		T6	1		T243	1		T70	1
duration[41]	1447	1		T6	1		T32	132		T50	1
duration[42]	18824	1		T5	155		T64	31		T297	3
duration[43]	782	1		T6	1		T32	130		T64	1
duration[44]	61	1		T64	1		T220	1		T50	4
duration[45]	83	1		T64	1		T243	1		T50	3
duration[46]	1357	1		T32	177		T138	1		T64	2
duration[47]	67	1		T138	1		T64	1		T243	1
duration[48]	1184	1		T64	2		T50	3		T69	3
duration[49]	131	1		T64	4		T70	1		T72	2
duration[50]	159216	1		T4	4222		T33	3748		T40	1
duration[51]	285482	1		T4	5768		T33	7094		T40	5
duration[52]	9054	1		T4	127		T33	96		T40	2
duration[53]	108286	1		T4	1779		T33	2535		T40	3
duration[54]	14268	1		T4	36		T33	21		T40	68
duration[55]	11653	1		T4	8		T33	14		T40	1
duration[56]	1926	1		T4	8		T33	4		T40	2
duration[57]	9058	1		T4	25		T33	9		T40	81
duration[58]	4606	1		T4	6		T33	7		T40	2
duration[59]	3438	1		T4	5		T33	5		T40	2
duration[60]	3778	1		T4	9		T33	1		T40	18
duration[61]	3180	1		T4	4		T33	4		T40	8
duration[62]	1740	1		T4	3		T33	1		T40	3
duration[63]	2522	1		T4	9		T33	2		T40	15
duration[64]	3589	1		T4	70		T33	116		T40	10
duration[65]	1520	1		T40	21		T144	2		T234	2
duration[66]	4845	1		T4	80		T33	135		T40	18
duration[67]	1333	1		T4	1		T33	1		T40	5
duration[68]	4175	1		T4	2		T33	1		T40	14
duration[69]	1044	1		T4	6		T33	1		T40	9
duration[70]	2227	1		T4	3		T33	5		T40	4
duration[71]	821	1		T4	1		T33	2		T40	10
duration[72]	2745	1		T4	3		T33	135		T40	5
duration[73]	594	1		T4	4		T33	1		T40	4
duration[74]	1376	1		T4	3		T33	1		T40	9
duration[75]	350	1		T33	1		T40	2		T144	1
duration[76]	2290	1		T4	4		T40	3		T144	172
duration[77]	267	1		T4	2		T33	1		T40	1
duration[78]	1925	1		T33	1		T40	4		T144	379
duration[79]	237	1		T4	3		T33	1		T40	4
duration[80]	1134	1		T4	2		T33	1		T40	1
duration[81]	174	1		T4	1		T40	1		T144	1
duration[82]	176	1		T4	4		T144	1		T234	1
duration[83]	162	1		T144	5		T342	5		T203	2
duration[84]	181	1		T4	1		T33	1		T40	4
duration[85]	141	1		T4	1		T33	1		T40	1
duration[86]	124	1		T4	2		T40	1		T144	4
duration[87]	121	1		T33	1		T144	1		T81	2
duration[88]	88	1		T4	2		T144	3		T234	3
duration[89]	112	1		T4	2		T144	4		T234	1
duration[90]	87	1		T4	2		T40	1		T234	2
duration[91]	79	1		T4	3		T144	3		T234	3
duration[92]	61	1		T4	1		T144	5		T342	1
duration[93]	72	1		T4	1		T144	1		T234	1
duration[94]	76	1		T4	2		T144	5		T234	5
duration[95]	63	1		T4	1		T33	1		T144	6
duration[96]	59	1		T40	1		T59	1		T81	1
duration[97]	59	1		T4	4		T144	2		T234	2
duration[98]	71	1		T4	1		T33	1		T47	1
duration[99]	60	1		T4	3		T234	3		T203	3