Summary for Variable instr_type_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for instr_type_cp
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| others | 
4749 | 
1 | 
 | 
T57 | 
129 | 
 | 
T58 | 
131 | 
 | 
T59 | 
124 | 
| instr_types[0] | 
5736 | 
1 | 
 | 
T57 | 
161 | 
 | 
T58 | 
277 | 
 | 
T59 | 
280 | 
| instr_types[1] | 
2914461 | 
1 | 
 | 
T4 | 
52 | 
 | 
T5 | 
4 | 
 | 
T20 | 
6 | 
Summary for Variable key_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for key_cp
Bins
| NAME | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
2923160 | 
1 | 
 | 
T4 | 
52 | 
 | 
T5 | 
4 | 
 | 
T20 | 
6 | 
| auto[1] | 
1786 | 
1 | 
 | 
T57 | 
184 | 
 | 
T58 | 
231 | 
 | 
T59 | 
171 | 
Summary for Cross key_instr_cross
Samples crossed: key_cp instr_type_cp
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
6 | 
0 | 
6 | 
100.00 | 
 | 
Automatically Generated Cross Bins for key_instr_cross
Bins
| key_cp | instr_type_cp | COUNT | AT LEAST |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
others | 
4287 | 
1 | 
 | 
T57 | 
38 | 
 | 
T58 | 
80 | 
 | 
T59 | 
78 | 
| auto[0] | 
instr_types[0] | 
5081 | 
1 | 
 | 
T57 | 
133 | 
 | 
T58 | 
159 | 
 | 
T59 | 
243 | 
| auto[0] | 
instr_types[1] | 
2913792 | 
1 | 
 | 
T4 | 
52 | 
 | 
T5 | 
4 | 
 | 
T20 | 
6 | 
| auto[1] | 
others | 
462 | 
1 | 
 | 
T57 | 
91 | 
 | 
T58 | 
51 | 
 | 
T59 | 
46 | 
| auto[1] | 
instr_types[0] | 
655 | 
1 | 
 | 
T57 | 
28 | 
 | 
T58 | 
118 | 
 | 
T59 | 
37 | 
| auto[1] | 
instr_types[1] | 
669 | 
1 | 
 | 
T57 | 
65 | 
 | 
T58 | 
62 | 
 | 
T59 | 
88 |