Unified Coverage Report :: Group :: tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

Group : tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_cov_0/flash_ctrl_phy_cov_if.sv

---

Summary for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	99	0	99	100.00

Variables for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
read_interval	99	0	99	100.00	100	1	1	0

Summary for Variable read_interval

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	99	0	99	100.00

User Defined Bins for read_interval

Excluded/Illegal bins

NAME	COUNT	STATUS
others	5623832	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
duration[1]	365758	1		T8	8		T9	9503		T57	3
duration[2]	739294	1		T4	23		T5	10		T20	3
duration[3]	43097	1		T4	1		T9	784		T57	13
duration[4]	547042	1		T4	5		T5	40		T6	256
duration[5]	41563	1		T4	1		T8	2		T9	1076
duration[6]	97440	1		T4	3		T5	19		T6	54
duration[7]	26945	1		T6	201		T9	191		T57	10
duration[8]	20693	1		T5	1		T32	26		T23	22
duration[9]	21650	1		T8	1		T9	63		T57	8
duration[10]	23104	1		T9	67		T57	5		T69	3
duration[11]	24435	1		T4	2		T9	36		T57	2
duration[12]	27359	1		T9	47		T57	2		T69	6
duration[13]	25862	1		T32	1		T34	1		T9	22
duration[14]	25875	1		T23	1		T9	12		T57	3
duration[15]	25132	1		T34	1		T9	11		T57	4
duration[16]	25235	1		T9	17		T57	8		T69	2
duration[17]	24993	1		T5	1		T32	4		T23	7
duration[18]	22269	1		T5	1		T20	2		T23	1
duration[19]	21433	1		T5	2		T20	4		T9	5
duration[20]	20306	1		T5	1		T32	3		T23	5
duration[21]	18044	1		T20	1		T32	22		T23	28
duration[22]	15806	1		T4	1		T5	3		T20	1
duration[23]	12171	1		T5	1		T20	1		T23	5
duration[24]	11142	1		T32	18		T23	19		T34	1
duration[25]	9701	1		T32	1		T34	1		T9	17
duration[26]	9791	1		T32	4		T23	1		T9	16
duration[27]	6306	1		T32	18		T23	5		T9	18
duration[28]	4981	1		T9	16		T97	2		T168	3
duration[29]	3852	1		T23	1		T34	1		T57	3
duration[30]	2950	1		T32	10		T23	9		T97	1
duration[31]	2096	1		T32	3		T23	1		T9	1
duration[32]	1611	1		T20	1		T32	2		T23	1
duration[33]	1887	1		T32	2		T23	9		T9	2
duration[34]	1062	1		T32	1		T23	1		T9	1
duration[35]	689	1		T32	6		T57	1		T97	16
duration[36]	774	1		T32	8		T23	3		T97	15
duration[37]	601	1		T32	1		T23	3		T34	1
duration[38]	821	1		T5	1		T23	2		T52	1
duration[39]	972	1		T32	2		T23	2		T9	1
duration[40]	599	1		T32	1		T34	2		T201	32
duration[41]	425	1		T9	1		T201	43		T100	3
duration[42]	10166	1		T5	1		T32	4		T23	2
duration[43]	200	1		T32	3		T23	2		T34	1
duration[44]	192	1		T32	1		T23	1		T34	1
duration[45]	226	1		T32	1		T52	2		T201	42
duration[46]	1478	1		T32	6		T23	2		T34	1
duration[47]	166	1		T32	1		T34	1		T52	1
duration[48]	635	1		T34	1		T9	1		T201	16
duration[49]	192	1		T34	1		T9	2		T52	2
duration[50]	158501	1		T32	1		T23	2		T9	11
duration[51]	284408	1		T34	1		T9	46		T52	1
duration[52]	8691	1		T32	2		T9	29		T52	1
duration[53]	106981	1		T9	10		T52	2		T42	3092
duration[54]	10473	1		T23	1		T9	395		T52	4
duration[55]	9739	1		T8	1		T23	1		T9	345
duration[56]	1393	1		T9	19		T52	1		T42	15
duration[57]	2210	1		T32	2		T9	53		T52	3
duration[58]	3875	1		T32	1		T23	1		T34	1
duration[59]	1959	1		T23	1		T9	59		T52	3
duration[60]	1716	1		T9	40		T42	7		T201	1
duration[61]	1427	1		T23	1		T9	44		T42	5
duration[62]	987	1		T32	1		T23	1		T9	16
duration[63]	859	1		T9	10		T52	5		T42	4
duration[64]	1999	1		T9	12		T52	3		T42	1
duration[65]	508	1		T32	2		T9	8		T52	2
duration[66]	2517	1		T32	1		T9	4		T52	2
duration[67]	370	1		T23	3		T34	1		T9	13
duration[68]	2448	1		T9	6		T42	1		T43	2
duration[69]	304	1		T34	1		T9	4		T52	1
duration[70]	2648	1		T32	1		T23	1		T34	1
duration[71]	242	1		T23	1		T34	1		T9	7
duration[72]	2944	1		T23	1		T34	1		T9	4
duration[73]	227	1		T32	1		T23	1		T34	1
duration[74]	2298	1		T34	2		T9	1		T52	2
duration[75]	190	1		T32	1		T9	3		T52	1
duration[76]	2331	1		T32	2		T9	1		T52	1
duration[77]	110	1		T23	1		T42	4		T202	1
duration[78]	1141	1		T9	1		T52	1		T168	1
duration[79]	136	1		T52	3		T42	3		T202	2
duration[80]	1392	1		T23	2		T52	1		T42	4
duration[81]	125	1		T52	2		T42	4		T44	2
duration[82]	109	1		T52	1		T42	2		T43	1
duration[83]	120	1		T32	1		T34	1		T76	1
duration[84]	111	1		T8	1		T52	2		T44	5
duration[85]	101	1		T34	1		T52	2		T45	1
duration[86]	95	1		T23	1		T52	3		T42	2
duration[87]	101	1		T32	1		T34	2		T52	4
duration[88]	115	1		T7	1		T34	2		T52	2
duration[89]	103	1		T34	2		T9	1		T52	2
duration[90]	92	1		T34	2		T9	1		T52	4
duration[91]	75	1		T23	2		T34	2		T42	3
duration[92]	62	1		T34	1		T52	2		T42	3
duration[93]	116	1		T5	1		T8	1		T34	2
duration[94]	115	1		T5	2		T20	1		T34	1
duration[95]	84	1		T23	1		T34	1		T96	1
duration[96]	80	1		T32	1		T34	1		T9	3
duration[97]	73	1		T32	1		T9	1		T52	4
duration[98]	96	1		T23	1		T34	1		T9	1
duration[99]	72	1		T57	1		T52	2		T244	1