Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
200 |
1 |
|
T20 |
1 |
|
T42 |
1 |
|
T212 |
1 |
| others[1] |
236 |
1 |
|
T35 |
1 |
|
T20 |
2 |
|
T24 |
1 |
| others[2] |
223 |
1 |
|
T20 |
1 |
|
T222 |
1 |
|
T387 |
1 |
| others[3] |
359 |
1 |
|
T20 |
2 |
|
T39 |
1 |
|
T40 |
1 |
| false |
125 |
1 |
|
T20 |
1 |
|
T90 |
2 |
|
T114 |
5 |
| true |
13408 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
219 |
1 |
|
T290 |
1 |
|
T319 |
1 |
|
T89 |
1 |
| others[1] |
208 |
1 |
|
T20 |
1 |
|
T78 |
1 |
|
T90 |
10 |
| others[2] |
205 |
1 |
|
T35 |
1 |
|
T20 |
1 |
|
T55 |
1 |
| others[3] |
363 |
1 |
|
T20 |
4 |
|
T40 |
1 |
|
T388 |
1 |
| false |
122 |
1 |
|
T19 |
1 |
|
T36 |
1 |
|
T39 |
1 |
| true |
13434 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8982 |
1 |
|
T5 |
93 |
|
T7 |
56 |
|
T20 |
3 |
| others[1] |
1271 |
1 |
|
T2 |
1 |
|
T43 |
5 |
|
T20 |
3 |
| others[2] |
1193 |
1 |
|
T35 |
1 |
|
T43 |
3 |
|
T20 |
2 |
| others[3] |
2057 |
1 |
|
T19 |
1 |
|
T20 |
5 |
|
T8 |
22 |
| false |
690 |
1 |
|
T3 |
1 |
|
T20 |
2 |
|
T8 |
3 |
| true |
358 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T58 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8976 |
1 |
|
T3 |
1 |
|
T5 |
93 |
|
T7 |
56 |
| others[1] |
1215 |
1 |
|
T43 |
2 |
|
T20 |
2 |
|
T8 |
16 |
| others[2] |
1304 |
1 |
|
T2 |
1 |
|
T43 |
3 |
|
T20 |
3 |
| others[3] |
2067 |
1 |
|
T35 |
1 |
|
T43 |
2 |
|
T20 |
1 |
| false |
645 |
1 |
|
T20 |
5 |
|
T8 |
6 |
|
T21 |
3 |
| true |
344 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
108 |
1 |
|
T35 |
1 |
|
T20 |
4 |
|
T387 |
1 |
| others[1] |
108 |
1 |
|
T19 |
1 |
|
T20 |
3 |
|
T251 |
1 |
| others[2] |
111 |
1 |
|
T20 |
1 |
|
T36 |
1 |
|
T251 |
1 |
| others[3] |
185 |
1 |
|
T20 |
5 |
|
T40 |
1 |
|
T206 |
1 |
| false |
46 |
1 |
|
T20 |
2 |
|
T210 |
1 |
|
T90 |
1 |
| true |
13993 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
207 |
1 |
|
T222 |
1 |
|
T290 |
1 |
|
T206 |
1 |
| others[1] |
231 |
1 |
|
T20 |
2 |
|
T394 |
1 |
|
T322 |
1 |
| others[2] |
243 |
1 |
|
T20 |
1 |
|
T210 |
1 |
|
T389 |
1 |
| others[3] |
399 |
1 |
|
T20 |
2 |
|
T55 |
1 |
|
T26 |
1 |
| false |
114 |
1 |
|
T20 |
1 |
|
T24 |
1 |
|
T392 |
1 |
| true |
13357 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8796 |
1 |
|
T5 |
93 |
|
T7 |
56 |
|
T43 |
1 |
| others[1] |
1057 |
1 |
|
T2 |
1 |
|
T43 |
3 |
|
T20 |
3 |
| others[2] |
1036 |
1 |
|
T35 |
1 |
|
T43 |
2 |
|
T20 |
5 |
| others[3] |
1778 |
1 |
|
T3 |
1 |
|
T43 |
2 |
|
T20 |
5 |
| false |
550 |
1 |
|
T8 |
6 |
|
T21 |
3 |
|
T57 |
1 |
| true |
1334 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
195 |
1 |
|
T20 |
1 |
|
T42 |
1 |
|
T90 |
9 |
| others[1] |
253 |
1 |
|
T35 |
1 |
|
T20 |
3 |
|
T165 |
1 |
| others[2] |
216 |
1 |
|
T20 |
2 |
|
T394 |
1 |
|
T387 |
1 |
| others[3] |
392 |
1 |
|
T20 |
2 |
|
T24 |
1 |
|
T40 |
1 |
| false |
115 |
1 |
|
T19 |
1 |
|
T78 |
1 |
|
T391 |
1 |
| true |
13380 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
218 |
1 |
|
T20 |
2 |
|
T78 |
1 |
|
T391 |
1 |
| others[1] |
206 |
1 |
|
T90 |
3 |
|
T104 |
1 |
|
T114 |
8 |
| others[2] |
213 |
1 |
|
T20 |
1 |
|
T389 |
1 |
|
T395 |
1 |
| others[3] |
372 |
1 |
|
T19 |
1 |
|
T20 |
1 |
|
T36 |
1 |
| false |
99 |
1 |
|
T20 |
2 |
|
T165 |
1 |
|
T387 |
1 |
| true |
13443 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8907 |
1 |
|
T5 |
93 |
|
T7 |
56 |
|
T20 |
1 |
| others[1] |
1240 |
1 |
|
T19 |
1 |
|
T43 |
1 |
|
T20 |
2 |
| others[2] |
1280 |
1 |
|
T3 |
1 |
|
T43 |
1 |
|
T20 |
3 |
| others[3] |
2055 |
1 |
|
T35 |
1 |
|
T43 |
4 |
|
T20 |
8 |
| false |
710 |
1 |
|
T2 |
1 |
|
T43 |
2 |
|
T20 |
1 |
| true |
359 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T58 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1285 |
1 |
|
T35 |
1 |
|
T43 |
3 |
|
T20 |
3 |
| others[1] |
1183 |
1 |
|
T43 |
2 |
|
T20 |
3 |
|
T8 |
5 |
| others[2] |
1260 |
1 |
|
T43 |
1 |
|
T20 |
3 |
|
T8 |
11 |
| others[3] |
2067 |
1 |
|
T3 |
1 |
|
T43 |
1 |
|
T20 |
4 |
| false |
679 |
1 |
|
T2 |
1 |
|
T43 |
1 |
|
T20 |
2 |
| true |
351 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
91 |
1 |
|
T20 |
2 |
|
T206 |
1 |
|
T90 |
3 |
| others[1] |
109 |
1 |
|
T20 |
2 |
|
T55 |
1 |
|
T89 |
1 |
| others[2] |
118 |
1 |
|
T19 |
1 |
|
T20 |
2 |
|
T40 |
1 |
| others[3] |
168 |
1 |
|
T20 |
6 |
|
T251 |
2 |
|
T388 |
1 |
| false |
51 |
1 |
|
T20 |
3 |
|
T36 |
1 |
|
T114 |
2 |
| true |
6288 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T20 |
1 |
|
T78 |
1 |
|
T388 |
1 |
| others[1] |
246 |
1 |
|
T23 |
1 |
|
T176 |
1 |
|
T206 |
1 |
| others[2] |
201 |
1 |
|
T20 |
2 |
|
T90 |
12 |
|
T114 |
10 |
| others[3] |
401 |
1 |
|
T35 |
1 |
|
T20 |
2 |
|
T25 |
1 |
| false |
109 |
1 |
|
T20 |
1 |
|
T290 |
1 |
|
T395 |
1 |
| true |
5639 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1048 |
1 |
|
T35 |
1 |
|
T43 |
2 |
|
T20 |
2 |
| others[1] |
1111 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T19 |
1 |
| others[2] |
1050 |
1 |
|
T3 |
1 |
|
T43 |
2 |
|
T58 |
1 |
| others[3] |
1721 |
1 |
|
T2 |
1 |
|
T43 |
2 |
|
T20 |
7 |
| false |
535 |
1 |
|
T43 |
1 |
|
T20 |
2 |
|
T8 |
2 |
| true |
1360 |
1 |
|
T55 |
1 |
|
T23 |
1 |
|
T24 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
211 |
1 |
|
T20 |
4 |
|
T23 |
1 |
|
T392 |
1 |
| others[1] |
212 |
1 |
|
T20 |
2 |
|
T290 |
1 |
|
T251 |
1 |
| others[2] |
211 |
1 |
|
T35 |
1 |
|
T20 |
1 |
|
T165 |
1 |
| others[3] |
352 |
1 |
|
T20 |
2 |
|
T39 |
1 |
|
T391 |
1 |
| false |
106 |
1 |
|
T20 |
1 |
|
T90 |
3 |
|
T114 |
4 |
| true |
5733 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
240 |
1 |
|
T391 |
1 |
|
T388 |
1 |
|
T90 |
10 |
| others[1] |
227 |
1 |
|
T20 |
2 |
|
T39 |
1 |
|
T290 |
1 |
| others[2] |
203 |
1 |
|
T20 |
1 |
|
T90 |
9 |
|
T104 |
1 |
| others[3] |
362 |
1 |
|
T19 |
1 |
|
T20 |
3 |
|
T36 |
1 |
| false |
111 |
1 |
|
T165 |
1 |
|
T90 |
2 |
|
T114 |
4 |
| true |
5682 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1197 |
1 |
|
T35 |
1 |
|
T43 |
1 |
|
T20 |
1 |
| others[1] |
1214 |
1 |
|
T3 |
1 |
|
T43 |
1 |
|
T20 |
3 |
| others[2] |
1292 |
1 |
|
T2 |
1 |
|
T43 |
1 |
|
T20 |
3 |
| others[3] |
2081 |
1 |
|
T43 |
5 |
|
T20 |
7 |
|
T8 |
20 |
| false |
668 |
1 |
|
T20 |
1 |
|
T8 |
3 |
|
T55 |
1 |
| true |
373 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1185 |
1 |
|
T2 |
1 |
|
T20 |
3 |
|
T8 |
7 |
| others[1] |
1257 |
1 |
|
T3 |
1 |
|
T43 |
1 |
|
T20 |
4 |
| others[2] |
1259 |
1 |
|
T43 |
1 |
|
T20 |
2 |
|
T8 |
19 |
| others[3] |
2086 |
1 |
|
T35 |
1 |
|
T43 |
4 |
|
T20 |
5 |
| false |
688 |
1 |
|
T43 |
2 |
|
T20 |
1 |
|
T8 |
8 |
| true |
350 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
114 |
1 |
|
T20 |
4 |
|
T206 |
1 |
|
T210 |
1 |
| others[1] |
102 |
1 |
|
T35 |
1 |
|
T20 |
4 |
|
T90 |
3 |
| others[2] |
107 |
1 |
|
T20 |
3 |
|
T388 |
1 |
|
T212 |
1 |
| others[3] |
166 |
1 |
|
T20 |
4 |
|
T389 |
1 |
|
T395 |
1 |
| false |
54 |
1 |
|
T251 |
1 |
|
T114 |
1 |
|
T393 |
1 |
| true |
6282 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
237 |
1 |
|
T35 |
1 |
|
T20 |
1 |
|
T36 |
1 |
| others[1] |
217 |
1 |
|
T19 |
1 |
|
T20 |
1 |
|
T52 |
1 |
| others[2] |
235 |
1 |
|
T20 |
1 |
|
T78 |
1 |
|
T206 |
1 |
| others[3] |
357 |
1 |
|
T20 |
2 |
|
T55 |
1 |
|
T212 |
1 |
| false |
137 |
1 |
|
T20 |
1 |
|
T39 |
1 |
|
T90 |
6 |
| true |
5642 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1015 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T43 |
2 |
| others[1] |
1076 |
1 |
|
T35 |
1 |
|
T43 |
1 |
|
T20 |
3 |
| others[2] |
1049 |
1 |
|
T17 |
1 |
|
T19 |
1 |
|
T58 |
1 |
| others[3] |
1780 |
1 |
|
T4 |
1 |
|
T43 |
2 |
|
T20 |
7 |
| false |
562 |
1 |
|
T43 |
3 |
|
T20 |
1 |
|
T8 |
6 |
| true |
1343 |
1 |
|
T55 |
1 |
|
T9 |
1 |
|
T23 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
232 |
1 |
|
T20 |
1 |
|
T40 |
1 |
|
T391 |
1 |
| others[1] |
209 |
1 |
|
T20 |
3 |
|
T24 |
1 |
|
T36 |
1 |
| others[2] |
239 |
1 |
|
T35 |
1 |
|
T20 |
2 |
|
T78 |
1 |
| others[3] |
386 |
1 |
|
T20 |
2 |
|
T176 |
1 |
|
T210 |
1 |
| false |
99 |
1 |
|
T20 |
1 |
|
T322 |
1 |
|
T90 |
2 |
| true |
5660 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T20 |
3 |
|
T55 |
1 |
|
T90 |
7 |
| others[1] |
232 |
1 |
|
T20 |
1 |
|
T212 |
1 |
|
T90 |
10 |
| others[2] |
240 |
1 |
|
T290 |
1 |
|
T251 |
1 |
|
T90 |
13 |
| others[3] |
364 |
1 |
|
T20 |
3 |
|
T206 |
1 |
|
T319 |
1 |
| false |
105 |
1 |
|
T36 |
1 |
|
T90 |
8 |
|
T114 |
1 |
| true |
5668 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1265 |
1 |
|
T35 |
1 |
|
T43 |
1 |
|
T20 |
4 |
| others[1] |
1182 |
1 |
|
T3 |
1 |
|
T43 |
2 |
|
T20 |
2 |
| others[2] |
1257 |
1 |
|
T43 |
3 |
|
T20 |
3 |
|
T8 |
13 |
| others[3] |
2096 |
1 |
|
T2 |
1 |
|
T43 |
2 |
|
T20 |
4 |
| false |
675 |
1 |
|
T20 |
2 |
|
T8 |
3 |
|
T55 |
1 |
| true |
350 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1218 |
1 |
|
T2 |
1 |
|
T43 |
2 |
|
T20 |
3 |
| others[1] |
1290 |
1 |
|
T43 |
2 |
|
T20 |
2 |
|
T8 |
12 |
| others[2] |
1283 |
1 |
|
T43 |
1 |
|
T20 |
6 |
|
T8 |
11 |
| others[3] |
2023 |
1 |
|
T3 |
1 |
|
T35 |
1 |
|
T43 |
2 |
| false |
664 |
1 |
|
T43 |
1 |
|
T20 |
1 |
|
T8 |
7 |
| true |
347 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T19 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
114 |
1 |
|
T20 |
3 |
|
T40 |
1 |
|
T78 |
1 |
| others[1] |
99 |
1 |
|
T388 |
1 |
|
T387 |
1 |
|
T90 |
4 |
| others[2] |
92 |
1 |
|
T20 |
4 |
|
T389 |
1 |
|
T90 |
2 |
| others[3] |
170 |
1 |
|
T20 |
7 |
|
T55 |
1 |
|
T36 |
1 |
| false |
54 |
1 |
|
T20 |
1 |
|
T387 |
1 |
|
T114 |
1 |
| true |
6296 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T19 |
1 |
|
T77 |
1 |
|
T251 |
1 |
| others[1] |
225 |
1 |
|
T20 |
2 |
|
T176 |
1 |
|
T322 |
1 |
| others[2] |
216 |
1 |
|
T20 |
3 |
|
T36 |
1 |
|
T165 |
1 |
| others[3] |
392 |
1 |
|
T20 |
3 |
|
T40 |
1 |
|
T78 |
1 |
| false |
135 |
1 |
|
T210 |
1 |
|
T177 |
1 |
|
T89 |
1 |
| true |
5641 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1105 |
1 |
|
T43 |
3 |
|
T20 |
4 |
|
T8 |
9 |
| others[1] |
1072 |
1 |
|
T43 |
1 |
|
T20 |
2 |
|
T8 |
13 |
| others[2] |
1094 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
| others[3] |
1690 |
1 |
|
T43 |
3 |
|
T20 |
5 |
|
T8 |
18 |
| false |
534 |
1 |
|
T43 |
1 |
|
T20 |
1 |
|
T8 |
7 |
| true |
1330 |
1 |
|
T17 |
1 |
|
T19 |
1 |
|
T55 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
218 |
1 |
|
T20 |
2 |
|
T39 |
1 |
|
T391 |
1 |
| others[1] |
252 |
1 |
|
T20 |
3 |
|
T322 |
1 |
|
T319 |
1 |
| others[2] |
233 |
1 |
|
T20 |
2 |
|
T33 |
1 |
|
T90 |
8 |
| others[3] |
362 |
1 |
|
T19 |
1 |
|
T35 |
1 |
|
T20 |
1 |
| false |
135 |
1 |
|
T20 |
2 |
|
T176 |
1 |
|
T210 |
1 |
| true |
5625 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
212 |
1 |
|
T20 |
2 |
|
T78 |
1 |
|
T387 |
1 |
| others[1] |
210 |
1 |
|
T392 |
1 |
|
T290 |
1 |
|
T90 |
6 |
| others[2] |
230 |
1 |
|
T20 |
3 |
|
T395 |
1 |
|
T387 |
1 |
| others[3] |
357 |
1 |
|
T20 |
3 |
|
T36 |
1 |
|
T251 |
2 |
| false |
105 |
1 |
|
T20 |
1 |
|
T90 |
3 |
|
T114 |
9 |
| true |
5711 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1244 |
1 |
|
T3 |
1 |
|
T19 |
1 |
|
T43 |
1 |
| others[1] |
1247 |
1 |
|
T35 |
1 |
|
T43 |
2 |
|
T20 |
3 |
| others[2] |
1246 |
1 |
|
T43 |
2 |
|
T20 |
3 |
|
T8 |
11 |
| others[3] |
2101 |
1 |
|
T2 |
1 |
|
T43 |
3 |
|
T20 |
4 |
| false |
618 |
1 |
|
T8 |
6 |
|
T21 |
8 |
|
T51 |
4 |
| true |
369 |
1 |
|
T4 |
1 |
|
T17 |
1 |
|
T58 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |