Unified Coverage Report :: Group :: tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

Group : tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_cov_0/flash_ctrl_phy_cov_if.sv

---

Summary for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	99	0	99	100.00

Variables for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[0].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
read_interval	99	0	99	100.00	100	1	1	0

Summary for Variable read_interval

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	99	0	99	100.00

User Defined Bins for read_interval

Excluded/Illegal bins

NAME	COUNT	STATUS
others	5481768	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
duration[1]	342456	1		T2	3974		T8	9		T21	6
duration[2]	662460	1		T2	4427		T7	7		T35	200
duration[3]	39774	1		T2	462		T8	13		T21	3
duration[4]	753251	1		T2	1190		T5	1024		T7	624
duration[5]	36447	1		T2	273		T8	6		T21	10
duration[6]	173133	1		T2	132		T5	1536		T7	936
duration[7]	24809	1		T2	140		T8	16		T21	7
duration[8]	16309	1		T2	118		T8	13		T21	6
duration[9]	16072	1		T2	62		T5	1		T7	2
duration[10]	16991	1		T2	72		T8	10		T21	8
duration[11]	17199	1		T2	32		T8	6		T21	4
duration[12]	19201	1		T2	39		T8	11		T21	6
duration[13]	18000	1		T2	12		T5	1		T8	4
duration[14]	18232	1		T2	19		T5	1		T20	2
duration[15]	17672	1		T2	23		T7	1		T8	4
duration[16]	17202	1		T2	11		T5	1		T7	1
duration[17]	18362	1		T2	75		T7	2		T8	1
duration[18]	15653	1		T2	6		T7	1		T8	1
duration[19]	16344	1		T2	63		T7	1		T21	2
duration[20]	14104	1		T2	20		T21	6		T24	1
duration[21]	13126	1		T2	69		T21	1		T24	1
duration[22]	12386	1		T2	31		T7	1		T51	1
duration[23]	8903	1		T2	1		T21	1		T70	2
duration[24]	8549	1		T2	34		T7	1		T24	1
duration[25]	7709	1		T2	1		T5	1		T39	6
duration[26]	7202	1		T2	2		T7	1		T8	1
duration[27]	4607	1		T2	4		T7	1		T40	1
duration[28]	4051	1		T5	1		T8	1		T70	3
duration[29]	3044	1		T2	2		T8	1		T40	1
duration[30]	2534	1		T2	3		T8	1		T29	45
duration[31]	2146	1		T2	4		T8	4		T29	31
duration[32]	1508	1		T2	3		T7	1		T8	2
duration[33]	1861	1		T2	30		T8	1		T39	1
duration[34]	1102	1		T5	1		T7	1		T8	3
duration[35]	1178	1		T39	4		T29	17		T245	1
duration[36]	835	1		T2	1		T70	1		T29	12
duration[37]	1335	1		T2	1		T5	1		T7	1
duration[38]	608	1		T2	2		T5	1		T70	2
duration[39]	1268	1		T7	1		T29	7		T41	3
duration[40]	919	1		T2	3		T5	1		T40	1
duration[41]	699	1		T29	3		T426	2		T83	1
duration[42]	10452	1		T29	1		T41	3		T245	1
duration[43]	577	1		T29	2		T41	1		T245	1
duration[44]	289	1		T5	1		T29	2		T426	1
duration[45]	252	1		T29	1		T41	1		T426	1
duration[46]	1244	1		T7	1		T70	2		T426	1
duration[47]	229	1		T245	1		T172	1		T83	2
duration[48]	445	1		T7	2		T41	2		T83	1
duration[49]	202	1		T7	1		T426	1		T245	1
duration[50]	160353	1		T5	1		T37	3984		T426	1
duration[51]	308220	1		T5	2		T41	4		T37	7618
duration[52]	7681	1		T7	2		T41	1		T37	117
duration[53]	213273	1		T7	1		T37	6277		T32	4253
duration[54]	9608	1		T5	1		T7	1		T70	1
duration[55]	8538	1		T5	1		T70	1		T41	1
duration[56]	1233	1		T7	1		T41	1		T37	6
duration[57]	1962	1		T5	1		T7	1		T37	19
duration[58]	3522	1		T5	3		T7	1		T37	11
duration[59]	1883	1		T37	4		T32	11		T172	2
duration[60]	1484	1		T37	13		T32	7		T172	1
duration[61]	1334	1		T7	1		T41	1		T37	9
duration[62]	810	1		T5	2		T41	1		T37	1
duration[63]	799	1		T5	1		T41	1		T37	6
duration[64]	2125	1		T5	1		T7	2		T43	1
duration[65]	484	1		T70	1		T78	1		T32	2
duration[66]	3840	1		T41	2		T37	339		T78	1
duration[67]	368	1		T5	1		T7	1		T41	1
duration[68]	2200	1		T7	1		T41	1		T78	1
duration[69]	262	1		T37	3		T32	5		T83	6
duration[70]	3351	1		T37	7		T32	4		T83	4
duration[71]	215	1		T41	1		T32	3		T172	1
duration[72]	5796	1		T7	1		T37	1		T78	1
duration[73]	212	1		T43	2		T37	4		T78	1
duration[74]	1717	1		T5	2		T7	1		T41	1
duration[75]	143	1		T5	1		T24	1		T37	1
duration[76]	570	1		T5	1		T7	1		T32	3
duration[77]	159	1		T37	1		T172	1		T83	2
duration[78]	2002	1		T5	2		T237	1		T238	437
duration[79]	144	1		T5	4		T7	3		T37	2
duration[80]	2923	1		T41	1		T37	217		T32	1
duration[81]	95	1		T9	1		T32	2		T38	1
duration[82]	121	1		T5	1		T7	1		T37	1
duration[83]	101	1		T5	1		T7	1		T41	1
duration[84]	96	1		T5	1		T41	1		T37	1
duration[85]	129	1		T5	2		T37	3		T32	4
duration[86]	92	1		T37	1		T108	1		T237	2
duration[87]	75	1		T5	1		T7	1		T37	2
duration[88]	91	1		T5	2		T41	2		T37	4
duration[89]	74	1		T38	1		T238	1		T427	2
duration[90]	115	1		T7	1		T25	1		T37	1
duration[91]	88	1		T5	2		T37	4		T193	1
duration[92]	86	1		T7	1		T60	1		T40	1
duration[93]	110	1		T2	1		T41	1		T37	3
duration[94]	129	1		T5	2		T24	1		T37	3
duration[95]	73	1		T5	1		T20	3		T176	1
duration[96]	67	1		T5	1		T7	1		T194	1
duration[97]	80	1		T5	2		T39	1		T37	2
duration[98]	94	1		T8	3		T9	1		T70	1
duration[99]	86	1		T41	1		T37	2		T426	2