Unified Coverage Report :: Group :: tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[1].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

Group : tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[1].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_cov_0/flash_ctrl_phy_cov_if.sv

---

Summary for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[1].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	99	0	99	100.00

Variables for Group tb.dut.u_eflash.u_flash.gen_generic.u_impl_generic.gen_prim_flash_banks[1].u_prim_flash_bank.u_phy_cov_if::b2b_read_interval_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
read_interval	99	0	99	100.00	100	1	1	0

Summary for Variable read_interval

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	99	0	99	100.00

User Defined Bins for read_interval

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4587813	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
duration[1]	343926	1		T2	3875		T8	12		T9	3
duration[2]	567060	1		T2	5801		T35	211		T43	81
duration[3]	39794	1		T2	378		T8	9		T21	4
duration[4]	516408	1		T2	2537		T35	336		T43	124
duration[5]	34669	1		T2	261		T8	9		T21	11
duration[6]	23894	1		T2	158		T8	5		T23	110
duration[7]	17369	1		T2	131		T8	17		T21	9
duration[8]	14188	1		T2	87		T8	17		T23	4
duration[9]	13000	1		T2	75		T8	11		T21	5
duration[10]	12315	1		T2	45		T8	11		T21	8
duration[11]	10849	1		T2	37		T8	3		T21	8
duration[12]	11450	1		T2	29		T8	5		T21	5
duration[13]	7859	1		T2	22		T8	2		T21	6
duration[14]	8151	1		T2	22		T8	2		T21	5
duration[15]	7252	1		T2	14		T8	4		T23	1
duration[16]	7001	1		T2	14		T8	2		T23	1
duration[17]	7672	1		T2	49		T21	3		T26	1
duration[18]	6042	1		T2	7		T8	1		T21	1
duration[19]	6572	1		T2	15		T8	1		T23	1
duration[20]	6103	1		T2	36		T23	2		T51	3
duration[21]	5489	1		T2	62		T21	1		T39	31
duration[22]	6248	1		T2	66		T23	2		T26	1
duration[23]	3671	1		T21	1		T41	2		T52	2
duration[24]	3670	1		T23	1		T26	1		T41	1
duration[25]	2950	1		T41	1		T52	1		T172	1
duration[26]	2286	1		T8	1		T41	5		T172	2
duration[27]	1875	1		T26	1		T83	16		T394	2
duration[28]	1787	1		T8	3		T26	1		T77	1
duration[29]	1385	1		T2	16		T41	1		T83	12
duration[30]	1064	1		T2	16		T23	1		T39	31
duration[31]	1223	1		T2	32		T8	1		T23	2
duration[32]	927	1		T2	16		T8	4		T83	2
duration[33]	1668	1		T2	45		T23	1		T39	8
duration[34]	1064	1		T2	31		T8	2		T218	61
duration[35]	802	1		T8	1		T23	2		T41	1
duration[36]	705	1		T78	3		T83	1		T218	15
duration[37]	1019	1		T23	1		T78	9		T83	60
duration[38]	209	1		T2	16		T41	1		T172	1
duration[39]	928	1		T2	47		T39	14		T83	31
duration[40]	435	1		T2	32		T172	1		T221	25
duration[41]	274	1		T23	1		T33	1		T428	5
duration[42]	10106	1		T41	1		T77	1		T172	2
duration[43]	685	1		T41	1		T428	2		T198	1
duration[44]	14	1		T41	1		T177	1		T84	1
duration[45]	27	1		T172	1		T83	1		T195	1
duration[46]	280	1		T172	1		T83	2		T120	1
duration[47]	40	1		T83	1		T84	2		T195	3
duration[48]	173	1		T172	1		T83	9		T177	1
duration[49]	69	1		T83	1		T110	1		T218	1
duration[50]	153387	1		T2	1		T41	1		T37	3857
duration[51]	277317	1		T37	6136		T32	7542		T83	62
duration[52]	9384	1		T41	1		T37	161		T32	166
duration[53]	203465	1		T37	4494		T32	3789		T83	13
duration[54]	7238	1		T37	53		T32	55		T83	308
duration[55]	9231	1		T37	6		T194	1		T32	11
duration[56]	1535	1		T37	1		T193	1		T32	13
duration[57]	2810	1		T37	17		T32	8		T83	153
duration[58]	3393	1		T37	9		T32	8		T172	1
duration[59]	2609	1		T41	1		T37	2		T32	14
duration[60]	1981	1		T41	1		T37	14		T32	5
duration[61]	1938	1		T37	7		T32	6		T83	114
duration[62]	1216	1		T32	3		T172	1		T83	55
duration[63]	1086	1		T41	1		T37	6		T32	6
duration[64]	2290	1		T37	122		T32	60		T83	31
duration[65]	660	1		T32	2		T83	26		T38	6
duration[66]	4036	1		T37	256		T32	125		T83	21
duration[67]	500	1		T43	1		T37	6		T32	2
duration[68]	2504	1		T32	2		T172	1		T83	20
duration[69]	349	1		T41	1		T37	3		T32	3
duration[70]	3113	1		T37	4		T32	3		T172	1
duration[71]	265	1		T37	3		T83	14		T38	3
duration[72]	5449	1		T32	3		T83	6		T38	7
duration[73]	239	1		T37	3		T32	1		T172	1
duration[74]	1943	1		T32	2		T172	1		T83	2
duration[75]	195	1		T41	1		T32	2		T172	1
duration[76]	748	1		T41	1		T37	4		T32	3
duration[77]	122	1		T37	1		T32	2		T172	1
duration[78]	2151	1		T32	2		T83	2		T38	3
duration[79]	133	1		T32	3		T83	4		T38	1
duration[80]	2880	1		T37	131		T83	6		T237	1
duration[81]	98	1		T172	1		T38	3		T237	2
duration[82]	131	1		T41	1		T37	2		T32	1
duration[83]	98	1		T172	1		T237	3		T238	2
duration[84]	93	1		T41	1		T83	2		T237	3
duration[85]	93	1		T37	2		T32	2		T38	3
duration[86]	83	1		T32	1		T172	1		T237	1
duration[87]	68	1		T37	2		T32	2		T38	2
duration[88]	85	1		T37	3		T193	1		T83	1
duration[89]	70	1		T43	1		T47	1		T37	1
duration[90]	73	1		T37	2		T32	2		T172	1
duration[91]	75	1		T37	3		T32	2		T38	2
duration[92]	53	1		T32	1		T238	2		T347	3
duration[93]	49	1		T41	1		T37	1		T38	3
duration[94]	79	1		T37	2		T193	1		T32	2
duration[95]	47	1		T193	1		T32	1		T172	1
duration[96]	52	1		T43	1		T37	3		T32	2
duration[97]	58	1		T37	1		T32	1		T172	1
duration[98]	48	1		T8	2		T32	3		T172	1
duration[99]	42	1		T41	1		T112	1		T34	1