Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
196 |
1 |
|
T24 |
10 |
|
T37 |
1 |
|
T22 |
6 |
| others[1] |
230 |
1 |
|
T24 |
7 |
|
T51 |
1 |
|
T22 |
12 |
| others[2] |
225 |
1 |
|
T3 |
1 |
|
T4 |
1 |
|
T24 |
8 |
| others[3] |
418 |
1 |
|
T14 |
1 |
|
T24 |
18 |
|
T28 |
1 |
| false |
134 |
1 |
|
T24 |
4 |
|
T22 |
6 |
|
T75 |
7 |
| true |
5752 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
201 |
1 |
|
T15 |
1 |
|
T24 |
8 |
|
T22 |
10 |
| others[1] |
216 |
1 |
|
T24 |
9 |
|
T33 |
1 |
|
T22 |
12 |
| others[2] |
222 |
1 |
|
T24 |
11 |
|
T37 |
1 |
|
T28 |
1 |
| others[3] |
394 |
1 |
|
T24 |
20 |
|
T37 |
1 |
|
T22 |
11 |
| false |
108 |
1 |
|
T24 |
5 |
|
T22 |
9 |
|
T75 |
3 |
| true |
5814 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1204 |
1 |
|
T24 |
21 |
|
T26 |
16 |
|
T21 |
1 |
| others[1] |
1289 |
1 |
|
T18 |
1 |
|
T24 |
26 |
|
T26 |
16 |
| others[2] |
1269 |
1 |
|
T3 |
1 |
|
T24 |
18 |
|
T26 |
19 |
| others[3] |
2102 |
1 |
|
T15 |
2 |
|
T24 |
30 |
|
T26 |
39 |
| false |
636 |
1 |
|
T24 |
6 |
|
T113 |
1 |
|
T26 |
10 |
| true |
455 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1219 |
1 |
|
T15 |
1 |
|
T24 |
15 |
|
T26 |
17 |
| others[1] |
1348 |
1 |
|
T24 |
23 |
|
T26 |
22 |
|
T21 |
3 |
| others[2] |
1237 |
1 |
|
T18 |
1 |
|
T24 |
24 |
|
T113 |
1 |
| others[3] |
2069 |
1 |
|
T24 |
31 |
|
T26 |
33 |
|
T21 |
5 |
| false |
653 |
1 |
|
T15 |
1 |
|
T24 |
8 |
|
T26 |
8 |
| true |
429 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
96 |
1 |
|
T15 |
1 |
|
T24 |
4 |
|
T37 |
1 |
| others[1] |
105 |
1 |
|
T24 |
4 |
|
T22 |
5 |
|
T75 |
7 |
| others[2] |
118 |
1 |
|
T24 |
2 |
|
T37 |
1 |
|
T22 |
5 |
| others[3] |
188 |
1 |
|
T15 |
1 |
|
T24 |
10 |
|
T22 |
10 |
| false |
50 |
1 |
|
T24 |
4 |
|
T22 |
2 |
|
T84 |
3 |
| true |
6398 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
224 |
1 |
|
T24 |
6 |
|
T34 |
1 |
|
T22 |
13 |
| others[1] |
267 |
1 |
|
T24 |
9 |
|
T30 |
1 |
|
T22 |
13 |
| others[2] |
208 |
1 |
|
T24 |
7 |
|
T22 |
8 |
|
T75 |
11 |
| others[3] |
396 |
1 |
|
T2 |
1 |
|
T14 |
1 |
|
T15 |
1 |
| false |
108 |
1 |
|
T24 |
4 |
|
T22 |
1 |
|
T75 |
2 |
| true |
5752 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1127 |
1 |
|
T4 |
1 |
|
T24 |
27 |
|
T26 |
8 |
| others[1] |
1062 |
1 |
|
T1 |
1 |
|
T15 |
1 |
|
T55 |
1 |
| others[2] |
1110 |
1 |
|
T15 |
1 |
|
T24 |
20 |
|
T113 |
1 |
| others[3] |
1757 |
1 |
|
T14 |
1 |
|
T17 |
1 |
|
T24 |
29 |
| false |
521 |
1 |
|
T18 |
1 |
|
T24 |
12 |
|
T26 |
4 |
| true |
1378 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
241 |
1 |
|
T24 |
8 |
|
T37 |
1 |
|
T22 |
11 |
| others[1] |
225 |
1 |
|
T24 |
12 |
|
T22 |
8 |
|
T75 |
11 |
| others[2] |
196 |
1 |
|
T14 |
1 |
|
T4 |
1 |
|
T24 |
8 |
| others[3] |
400 |
1 |
|
T15 |
1 |
|
T24 |
20 |
|
T37 |
1 |
| false |
121 |
1 |
|
T24 |
4 |
|
T22 |
7 |
|
T75 |
6 |
| true |
5772 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
211 |
1 |
|
T24 |
7 |
|
T33 |
1 |
|
T22 |
12 |
| others[1] |
225 |
1 |
|
T24 |
7 |
|
T22 |
9 |
|
T75 |
13 |
| others[2] |
223 |
1 |
|
T24 |
13 |
|
T22 |
12 |
|
T75 |
12 |
| others[3] |
346 |
1 |
|
T55 |
1 |
|
T24 |
10 |
|
T6 |
1 |
| false |
106 |
1 |
|
T24 |
3 |
|
T22 |
5 |
|
T75 |
7 |
| true |
5844 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1240 |
1 |
|
T24 |
24 |
|
T26 |
15 |
|
T21 |
1 |
| others[1] |
1195 |
1 |
|
T24 |
10 |
|
T26 |
23 |
|
T21 |
2 |
| others[2] |
1272 |
1 |
|
T18 |
1 |
|
T24 |
18 |
|
T113 |
1 |
| others[3] |
2157 |
1 |
|
T3 |
1 |
|
T15 |
2 |
|
T24 |
40 |
| false |
648 |
1 |
|
T24 |
9 |
|
T26 |
10 |
|
T21 |
2 |
| true |
443 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1258 |
1 |
|
T24 |
26 |
|
T26 |
16 |
|
T21 |
3 |
| others[1] |
1267 |
1 |
|
T15 |
1 |
|
T24 |
19 |
|
T26 |
22 |
| others[2] |
1207 |
1 |
|
T24 |
19 |
|
T26 |
19 |
|
T21 |
3 |
| others[3] |
2143 |
1 |
|
T15 |
1 |
|
T18 |
1 |
|
T24 |
36 |
| false |
650 |
1 |
|
T24 |
1 |
|
T113 |
1 |
|
T26 |
9 |
| true |
430 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
106 |
1 |
|
T15 |
1 |
|
T24 |
4 |
|
T22 |
3 |
| others[1] |
97 |
1 |
|
T24 |
5 |
|
T37 |
1 |
|
T22 |
5 |
| others[2] |
113 |
1 |
|
T24 |
9 |
|
T22 |
3 |
|
T75 |
2 |
| others[3] |
179 |
1 |
|
T15 |
1 |
|
T24 |
7 |
|
T37 |
1 |
| false |
64 |
1 |
|
T24 |
4 |
|
T22 |
1 |
|
T75 |
3 |
| true |
6396 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
245 |
1 |
|
T2 |
1 |
|
T24 |
7 |
|
T30 |
1 |
| others[1] |
223 |
1 |
|
T24 |
10 |
|
T22 |
12 |
|
T75 |
7 |
| others[2] |
258 |
1 |
|
T24 |
8 |
|
T51 |
1 |
|
T22 |
14 |
| others[3] |
379 |
1 |
|
T14 |
1 |
|
T24 |
19 |
|
T27 |
1 |
| false |
121 |
1 |
|
T24 |
3 |
|
T37 |
1 |
|
T33 |
1 |
| true |
5729 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1068 |
1 |
|
T15 |
1 |
|
T18 |
1 |
|
T24 |
17 |
| others[1] |
1162 |
1 |
|
T55 |
1 |
|
T24 |
24 |
|
T26 |
5 |
| others[2] |
1034 |
1 |
|
T1 |
1 |
|
T15 |
1 |
|
T24 |
16 |
| others[3] |
1737 |
1 |
|
T14 |
1 |
|
T24 |
35 |
|
T26 |
17 |
| false |
569 |
1 |
|
T24 |
9 |
|
T26 |
3 |
|
T56 |
5 |
| true |
1385 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
218 |
1 |
|
T24 |
9 |
|
T37 |
1 |
|
T22 |
6 |
| others[1] |
221 |
1 |
|
T24 |
8 |
|
T37 |
1 |
|
T22 |
6 |
| others[2] |
199 |
1 |
|
T24 |
9 |
|
T28 |
1 |
|
T34 |
1 |
| others[3] |
390 |
1 |
|
T15 |
1 |
|
T4 |
1 |
|
T24 |
19 |
| false |
113 |
1 |
|
T24 |
5 |
|
T30 |
1 |
|
T22 |
8 |
| true |
5814 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
215 |
1 |
|
T15 |
1 |
|
T24 |
7 |
|
T37 |
1 |
| others[1] |
208 |
1 |
|
T24 |
5 |
|
T22 |
9 |
|
T75 |
13 |
| others[2] |
208 |
1 |
|
T24 |
9 |
|
T22 |
8 |
|
T75 |
6 |
| others[3] |
355 |
1 |
|
T55 |
1 |
|
T24 |
20 |
|
T33 |
1 |
| false |
131 |
1 |
|
T24 |
3 |
|
T28 |
1 |
|
T22 |
7 |
| true |
5838 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1200 |
1 |
|
T18 |
1 |
|
T24 |
19 |
|
T113 |
1 |
| others[1] |
1214 |
1 |
|
T24 |
11 |
|
T26 |
21 |
|
T21 |
2 |
| others[2] |
1318 |
1 |
|
T3 |
1 |
|
T24 |
17 |
|
T26 |
17 |
| others[3] |
2154 |
1 |
|
T15 |
2 |
|
T24 |
41 |
|
T26 |
29 |
| false |
632 |
1 |
|
T24 |
13 |
|
T26 |
10 |
|
T56 |
9 |
| true |
437 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1279 |
1 |
|
T15 |
1 |
|
T24 |
23 |
|
T26 |
25 |
| others[1] |
1216 |
1 |
|
T15 |
1 |
|
T24 |
13 |
|
T26 |
15 |
| others[2] |
1296 |
1 |
|
T24 |
18 |
|
T113 |
1 |
|
T26 |
25 |
| others[3] |
2052 |
1 |
|
T24 |
34 |
|
T26 |
29 |
|
T21 |
8 |
| false |
687 |
1 |
|
T14 |
1 |
|
T18 |
1 |
|
T24 |
13 |
| true |
425 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
111 |
1 |
|
T15 |
1 |
|
T24 |
4 |
|
T22 |
6 |
| others[1] |
97 |
1 |
|
T24 |
5 |
|
T22 |
4 |
|
T75 |
2 |
| others[2] |
117 |
1 |
|
T15 |
1 |
|
T24 |
6 |
|
T37 |
1 |
| others[3] |
165 |
1 |
|
T24 |
6 |
|
T37 |
1 |
|
T22 |
4 |
| false |
55 |
1 |
|
T24 |
3 |
|
T22 |
1 |
|
T75 |
4 |
| true |
6410 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
237 |
1 |
|
T24 |
11 |
|
T51 |
1 |
|
T22 |
11 |
| others[1] |
228 |
1 |
|
T2 |
1 |
|
T55 |
1 |
|
T24 |
11 |
| others[2] |
208 |
1 |
|
T15 |
1 |
|
T24 |
8 |
|
T30 |
1 |
| others[3] |
376 |
1 |
|
T15 |
1 |
|
T24 |
21 |
|
T5 |
1 |
| false |
119 |
1 |
|
T24 |
3 |
|
T22 |
5 |
|
T75 |
3 |
| true |
5787 |
1 |
|
T1 |
1 |
|
T3 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1068 |
1 |
|
T24 |
17 |
|
T113 |
1 |
|
T26 |
4 |
| others[1] |
1083 |
1 |
|
T3 |
1 |
|
T15 |
1 |
|
T24 |
23 |
| others[2] |
1093 |
1 |
|
T24 |
18 |
|
T26 |
13 |
|
T21 |
1 |
| others[3] |
1798 |
1 |
|
T15 |
1 |
|
T18 |
1 |
|
T55 |
1 |
| false |
525 |
1 |
|
T10 |
1 |
|
T24 |
15 |
|
T26 |
2 |
| true |
1388 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T14 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
209 |
1 |
|
T24 |
11 |
|
T32 |
1 |
|
T22 |
9 |
| others[1] |
214 |
1 |
|
T3 |
1 |
|
T14 |
1 |
|
T24 |
4 |
| others[2] |
222 |
1 |
|
T24 |
8 |
|
T22 |
12 |
|
T75 |
7 |
| others[3] |
378 |
1 |
|
T55 |
1 |
|
T24 |
18 |
|
T6 |
1 |
| false |
131 |
1 |
|
T24 |
3 |
|
T22 |
6 |
|
T75 |
4 |
| true |
5801 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T10 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
214 |
1 |
|
T24 |
9 |
|
T22 |
10 |
|
T75 |
15 |
| others[1] |
197 |
1 |
|
T55 |
1 |
|
T24 |
9 |
|
T37 |
1 |
| others[2] |
210 |
1 |
|
T24 |
10 |
|
T51 |
1 |
|
T22 |
9 |
| others[3] |
354 |
1 |
|
T15 |
1 |
|
T24 |
17 |
|
T22 |
15 |
| false |
119 |
1 |
|
T24 |
4 |
|
T6 |
1 |
|
T22 |
4 |
| true |
5861 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1262 |
1 |
|
T15 |
1 |
|
T24 |
15 |
|
T26 |
19 |
| others[1] |
1258 |
1 |
|
T24 |
25 |
|
T26 |
21 |
|
T21 |
1 |
| others[2] |
1241 |
1 |
|
T18 |
1 |
|
T24 |
18 |
|
T113 |
1 |
| others[3] |
2126 |
1 |
|
T15 |
1 |
|
T24 |
31 |
|
T26 |
39 |
| false |
626 |
1 |
|
T24 |
12 |
|
T26 |
6 |
|
T21 |
2 |
| true |
442 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1264 |
1 |
|
T24 |
14 |
|
T113 |
1 |
|
T26 |
19 |
| others[1] |
1296 |
1 |
|
T18 |
1 |
|
T24 |
22 |
|
T26 |
18 |
| others[2] |
1278 |
1 |
|
T15 |
1 |
|
T24 |
20 |
|
T26 |
24 |
| others[3] |
2063 |
1 |
|
T15 |
1 |
|
T24 |
34 |
|
T26 |
32 |
| false |
631 |
1 |
|
T24 |
11 |
|
T26 |
7 |
|
T21 |
4 |
| true |
423 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
91 |
1 |
|
T24 |
5 |
|
T28 |
1 |
|
T22 |
8 |
| others[1] |
108 |
1 |
|
T22 |
5 |
|
T75 |
2 |
|
T107 |
1 |
| others[2] |
99 |
1 |
|
T15 |
1 |
|
T24 |
2 |
|
T22 |
3 |
| others[3] |
179 |
1 |
|
T24 |
5 |
|
T37 |
2 |
|
T34 |
1 |
| false |
59 |
1 |
|
T15 |
1 |
|
T24 |
5 |
|
T22 |
2 |
| true |
6419 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
254 |
1 |
|
T15 |
1 |
|
T24 |
11 |
|
T37 |
1 |
| others[1] |
211 |
1 |
|
T24 |
9 |
|
T22 |
12 |
|
T75 |
11 |
| others[2] |
225 |
1 |
|
T3 |
1 |
|
T24 |
6 |
|
T37 |
1 |
| others[3] |
391 |
1 |
|
T2 |
1 |
|
T14 |
1 |
|
T24 |
17 |
| false |
131 |
1 |
|
T55 |
1 |
|
T24 |
8 |
|
T34 |
1 |
| true |
5743 |
1 |
|
T1 |
1 |
|
T10 |
1 |
|
T15 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1032 |
1 |
|
T10 |
1 |
|
T17 |
1 |
|
T24 |
10 |
| others[1] |
1093 |
1 |
|
T15 |
1 |
|
T24 |
20 |
|
T26 |
14 |
| others[2] |
1058 |
1 |
|
T1 |
1 |
|
T14 |
1 |
|
T55 |
1 |
| others[3] |
1798 |
1 |
|
T15 |
1 |
|
T24 |
34 |
|
T26 |
21 |
| false |
555 |
1 |
|
T18 |
1 |
|
T24 |
15 |
|
T26 |
3 |
| true |
1419 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
197 |
1 |
|
T24 |
6 |
|
T6 |
1 |
|
T22 |
6 |
| others[1] |
245 |
1 |
|
T55 |
1 |
|
T24 |
10 |
|
T5 |
1 |
| others[2] |
231 |
1 |
|
T4 |
1 |
|
T24 |
7 |
|
T37 |
1 |
| others[3] |
366 |
1 |
|
T24 |
19 |
|
T22 |
16 |
|
T75 |
9 |
| false |
128 |
1 |
|
T24 |
3 |
|
T30 |
1 |
|
T22 |
9 |
| true |
5788 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
201 |
1 |
|
T24 |
10 |
|
T51 |
1 |
|
T22 |
10 |
| others[1] |
210 |
1 |
|
T24 |
14 |
|
T6 |
1 |
|
T33 |
1 |
| others[2] |
221 |
1 |
|
T24 |
10 |
|
T22 |
3 |
|
T75 |
15 |
| others[3] |
353 |
1 |
|
T55 |
1 |
|
T24 |
8 |
|
T37 |
2 |
| false |
111 |
1 |
|
T24 |
8 |
|
T22 |
5 |
|
T75 |
2 |
| true |
5859 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1277 |
1 |
|
T24 |
21 |
|
T26 |
22 |
|
T21 |
2 |
| others[1] |
1253 |
1 |
|
T24 |
16 |
|
T26 |
18 |
|
T21 |
3 |
| others[2] |
1240 |
1 |
|
T15 |
1 |
|
T24 |
14 |
|
T26 |
18 |
| others[3] |
2128 |
1 |
|
T3 |
1 |
|
T18 |
1 |
|
T24 |
37 |
| false |
614 |
1 |
|
T15 |
1 |
|
T24 |
13 |
|
T113 |
1 |
| true |
443 |
1 |
|
T1 |
1 |
|
T2 |
1 |
|
T14 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |