Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
202 |
1 |
|
T4 |
10 |
|
T33 |
4 |
|
T9 |
1 |
| others[1] |
203 |
1 |
|
T4 |
7 |
|
T33 |
10 |
|
T373 |
1 |
| others[2] |
216 |
1 |
|
T4 |
9 |
|
T22 |
1 |
|
T33 |
6 |
| others[3] |
380 |
1 |
|
T4 |
15 |
|
T22 |
2 |
|
T33 |
19 |
| false |
103 |
1 |
|
T4 |
8 |
|
T22 |
1 |
|
T33 |
5 |
| true |
12846 |
1 |
|
T1 |
40 |
|
T4 |
52 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8467 |
1 |
|
T1 |
5 |
|
T4 |
13 |
|
T40 |
1 |
| others[1] |
1175 |
1 |
|
T1 |
11 |
|
T4 |
26 |
|
T5 |
1 |
| others[2] |
1198 |
1 |
|
T1 |
11 |
|
T4 |
22 |
|
T42 |
1 |
| others[3] |
2058 |
1 |
|
T1 |
11 |
|
T4 |
29 |
|
T8 |
1 |
| false |
610 |
1 |
|
T1 |
2 |
|
T4 |
11 |
|
T40 |
1 |
| true |
442 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8448 |
1 |
|
T1 |
6 |
|
T4 |
19 |
|
T40 |
3 |
| others[1] |
1234 |
1 |
|
T1 |
9 |
|
T4 |
19 |
|
T5 |
1 |
| others[2] |
1268 |
1 |
|
T1 |
6 |
|
T4 |
24 |
|
T8 |
1 |
| others[3] |
1957 |
1 |
|
T1 |
18 |
|
T4 |
28 |
|
T42 |
1 |
| false |
622 |
1 |
|
T1 |
1 |
|
T4 |
11 |
|
T33 |
8 |
| true |
421 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
102 |
1 |
|
T4 |
2 |
|
T33 |
4 |
|
T372 |
1 |
| others[1] |
95 |
1 |
|
T4 |
7 |
|
T33 |
6 |
|
T114 |
1 |
| others[2] |
88 |
1 |
|
T4 |
1 |
|
T22 |
1 |
|
T33 |
4 |
| others[3] |
179 |
1 |
|
T4 |
7 |
|
T33 |
4 |
|
T373 |
1 |
| false |
44 |
1 |
|
T33 |
2 |
|
T85 |
2 |
|
T210 |
2 |
| true |
13442 |
1 |
|
T1 |
40 |
|
T4 |
84 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
235 |
1 |
|
T4 |
11 |
|
T33 |
8 |
|
T95 |
1 |
| others[1] |
236 |
1 |
|
T4 |
12 |
|
T33 |
9 |
|
T31 |
1 |
| others[2] |
219 |
1 |
|
T4 |
9 |
|
T20 |
1 |
|
T33 |
11 |
| others[3] |
350 |
1 |
|
T4 |
8 |
|
T7 |
1 |
|
T22 |
4 |
| false |
131 |
1 |
|
T4 |
7 |
|
T33 |
6 |
|
T153 |
1 |
| true |
12779 |
1 |
|
T1 |
40 |
|
T4 |
54 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8247 |
1 |
|
T1 |
6 |
|
T4 |
17 |
|
T5 |
1 |
| others[1] |
1034 |
1 |
|
T1 |
10 |
|
T4 |
26 |
|
T40 |
1 |
| others[2] |
1047 |
1 |
|
T1 |
8 |
|
T4 |
16 |
|
T8 |
1 |
| others[3] |
1745 |
1 |
|
T1 |
12 |
|
T4 |
39 |
|
T7 |
1 |
| false |
535 |
1 |
|
T1 |
4 |
|
T4 |
3 |
|
T40 |
2 |
| true |
1342 |
1 |
|
T20 |
1 |
|
T13 |
1 |
|
T22 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
228 |
1 |
|
T4 |
10 |
|
T7 |
1 |
|
T22 |
1 |
| others[1] |
219 |
1 |
|
T4 |
10 |
|
T33 |
7 |
|
T319 |
1 |
| others[2] |
214 |
1 |
|
T4 |
12 |
|
T20 |
1 |
|
T33 |
11 |
| others[3] |
368 |
1 |
|
T4 |
12 |
|
T5 |
1 |
|
T28 |
1 |
| false |
113 |
1 |
|
T4 |
5 |
|
T22 |
1 |
|
T33 |
10 |
| true |
12808 |
1 |
|
T1 |
40 |
|
T4 |
52 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
222 |
1 |
|
T4 |
8 |
|
T27 |
1 |
|
T22 |
1 |
| others[1] |
232 |
1 |
|
T4 |
15 |
|
T22 |
1 |
|
T33 |
11 |
| others[2] |
198 |
1 |
|
T4 |
7 |
|
T33 |
9 |
|
T372 |
1 |
| others[3] |
359 |
1 |
|
T4 |
13 |
|
T7 |
1 |
|
T33 |
19 |
| false |
108 |
1 |
|
T4 |
4 |
|
T33 |
4 |
|
T373 |
1 |
| true |
12831 |
1 |
|
T1 |
40 |
|
T4 |
54 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8430 |
1 |
|
T1 |
5 |
|
T4 |
28 |
|
T40 |
2 |
| others[1] |
1204 |
1 |
|
T1 |
3 |
|
T4 |
20 |
|
T40 |
1 |
| others[2] |
1234 |
1 |
|
T1 |
9 |
|
T4 |
16 |
|
T8 |
1 |
| others[3] |
2013 |
1 |
|
T1 |
13 |
|
T4 |
26 |
|
T5 |
1 |
| false |
638 |
1 |
|
T1 |
10 |
|
T4 |
11 |
|
T40 |
1 |
| true |
431 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1197 |
1 |
|
T1 |
10 |
|
T4 |
16 |
|
T8 |
1 |
| others[1] |
1222 |
1 |
|
T1 |
11 |
|
T4 |
23 |
|
T5 |
1 |
| others[2] |
1226 |
1 |
|
T1 |
7 |
|
T4 |
17 |
|
T40 |
4 |
| others[3] |
2027 |
1 |
|
T1 |
10 |
|
T4 |
38 |
|
T40 |
4 |
| false |
599 |
1 |
|
T1 |
2 |
|
T4 |
7 |
|
T40 |
1 |
| true |
430 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
81 |
1 |
|
T4 |
2 |
|
T33 |
2 |
|
T372 |
1 |
| others[1] |
110 |
1 |
|
T4 |
4 |
|
T33 |
3 |
|
T84 |
4 |
| others[2] |
110 |
1 |
|
T4 |
6 |
|
T33 |
8 |
|
T372 |
1 |
| others[3] |
176 |
1 |
|
T4 |
12 |
|
T22 |
1 |
|
T33 |
6 |
| false |
46 |
1 |
|
T33 |
2 |
|
T84 |
3 |
|
T85 |
1 |
| true |
6178 |
1 |
|
T1 |
40 |
|
T4 |
77 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
223 |
1 |
|
T4 |
9 |
|
T22 |
2 |
|
T33 |
6 |
| others[1] |
244 |
1 |
|
T4 |
10 |
|
T33 |
11 |
|
T95 |
1 |
| others[2] |
244 |
1 |
|
T4 |
8 |
|
T33 |
11 |
|
T9 |
4 |
| others[3] |
367 |
1 |
|
T4 |
12 |
|
T5 |
1 |
|
T27 |
1 |
| false |
119 |
1 |
|
T4 |
3 |
|
T28 |
1 |
|
T33 |
8 |
| true |
5504 |
1 |
|
T1 |
40 |
|
T4 |
59 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1031 |
1 |
|
T1 |
9 |
|
T4 |
17 |
|
T8 |
1 |
| others[1] |
979 |
1 |
|
T1 |
13 |
|
T4 |
22 |
|
T5 |
1 |
| others[2] |
1009 |
1 |
|
T1 |
3 |
|
T4 |
17 |
|
T40 |
1 |
| others[3] |
1733 |
1 |
|
T1 |
12 |
|
T4 |
30 |
|
T42 |
1 |
| false |
532 |
1 |
|
T1 |
3 |
|
T4 |
15 |
|
T40 |
1 |
| true |
1417 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
239 |
1 |
|
T4 |
6 |
|
T33 |
10 |
|
T31 |
1 |
| others[1] |
246 |
1 |
|
T4 |
12 |
|
T22 |
1 |
|
T33 |
13 |
| others[2] |
239 |
1 |
|
T4 |
7 |
|
T33 |
15 |
|
T95 |
1 |
| others[3] |
331 |
1 |
|
T4 |
14 |
|
T20 |
1 |
|
T22 |
1 |
| false |
108 |
1 |
|
T4 |
7 |
|
T33 |
2 |
|
T30 |
1 |
| true |
5538 |
1 |
|
T1 |
40 |
|
T4 |
55 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
239 |
1 |
|
T4 |
6 |
|
T7 |
1 |
|
T33 |
12 |
| others[1] |
182 |
1 |
|
T4 |
9 |
|
T33 |
12 |
|
T372 |
1 |
| others[2] |
202 |
1 |
|
T4 |
7 |
|
T27 |
1 |
|
T22 |
2 |
| others[3] |
357 |
1 |
|
T4 |
18 |
|
T22 |
2 |
|
T33 |
13 |
| false |
116 |
1 |
|
T4 |
4 |
|
T33 |
5 |
|
T372 |
1 |
| true |
5605 |
1 |
|
T1 |
40 |
|
T4 |
57 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1196 |
1 |
|
T1 |
5 |
|
T4 |
23 |
|
T8 |
1 |
| others[1] |
1224 |
1 |
|
T1 |
7 |
|
T4 |
14 |
|
T5 |
1 |
| others[2] |
1171 |
1 |
|
T1 |
4 |
|
T4 |
21 |
|
T13 |
1 |
| others[3] |
2058 |
1 |
|
T1 |
21 |
|
T4 |
38 |
|
T40 |
3 |
| false |
604 |
1 |
|
T1 |
3 |
|
T4 |
5 |
|
T33 |
11 |
| true |
448 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T28 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1262 |
1 |
|
T1 |
8 |
|
T4 |
20 |
|
T40 |
2 |
| others[1] |
1192 |
1 |
|
T1 |
9 |
|
T4 |
17 |
|
T40 |
4 |
| others[2] |
1226 |
1 |
|
T1 |
7 |
|
T4 |
18 |
|
T40 |
2 |
| others[3] |
1980 |
1 |
|
T1 |
16 |
|
T4 |
36 |
|
T40 |
1 |
| false |
618 |
1 |
|
T4 |
10 |
|
T5 |
1 |
|
T8 |
1 |
| true |
423 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
116 |
1 |
|
T4 |
9 |
|
T33 |
1 |
|
T372 |
1 |
| others[1] |
109 |
1 |
|
T4 |
4 |
|
T33 |
8 |
|
T372 |
1 |
| others[2] |
99 |
1 |
|
T4 |
6 |
|
T33 |
4 |
|
T84 |
2 |
| others[3] |
166 |
1 |
|
T4 |
7 |
|
T33 |
4 |
|
T373 |
1 |
| false |
38 |
1 |
|
T4 |
4 |
|
T33 |
1 |
|
T51 |
1 |
| true |
6173 |
1 |
|
T1 |
40 |
|
T4 |
71 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
241 |
1 |
|
T4 |
10 |
|
T27 |
1 |
|
T22 |
1 |
| others[1] |
249 |
1 |
|
T4 |
10 |
|
T22 |
1 |
|
T33 |
11 |
| others[2] |
230 |
1 |
|
T4 |
10 |
|
T33 |
15 |
|
T30 |
1 |
| others[3] |
368 |
1 |
|
T4 |
22 |
|
T22 |
2 |
|
T33 |
10 |
| false |
119 |
1 |
|
T4 |
4 |
|
T33 |
1 |
|
T84 |
5 |
| true |
5494 |
1 |
|
T1 |
40 |
|
T4 |
45 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
990 |
1 |
|
T1 |
7 |
|
T4 |
18 |
|
T42 |
1 |
| others[1] |
1055 |
1 |
|
T1 |
6 |
|
T4 |
21 |
|
T40 |
1 |
| others[2] |
1005 |
1 |
|
T1 |
7 |
|
T4 |
22 |
|
T8 |
1 |
| others[3] |
1721 |
1 |
|
T1 |
16 |
|
T4 |
31 |
|
T5 |
1 |
| false |
550 |
1 |
|
T1 |
4 |
|
T4 |
9 |
|
T40 |
1 |
| true |
1380 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T4 |
8 |
|
T20 |
1 |
|
T33 |
8 |
| others[1] |
217 |
1 |
|
T4 |
12 |
|
T22 |
1 |
|
T33 |
11 |
| others[2] |
206 |
1 |
|
T4 |
5 |
|
T5 |
1 |
|
T22 |
1 |
| others[3] |
374 |
1 |
|
T4 |
16 |
|
T27 |
1 |
|
T22 |
1 |
| false |
109 |
1 |
|
T4 |
3 |
|
T33 |
3 |
|
T47 |
1 |
| true |
5579 |
1 |
|
T1 |
40 |
|
T4 |
57 |
|
T7 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T4 |
6 |
|
T5 |
1 |
|
T22 |
1 |
| others[1] |
211 |
1 |
|
T4 |
19 |
|
T20 |
1 |
|
T33 |
14 |
| others[2] |
216 |
1 |
|
T4 |
4 |
|
T7 |
1 |
|
T33 |
8 |
| others[3] |
362 |
1 |
|
T4 |
8 |
|
T33 |
15 |
|
T305 |
1 |
| false |
101 |
1 |
|
T4 |
7 |
|
T33 |
3 |
|
T376 |
1 |
| true |
5577 |
1 |
|
T1 |
40 |
|
T4 |
57 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1167 |
1 |
|
T1 |
15 |
|
T4 |
17 |
|
T5 |
1 |
| others[1] |
1229 |
1 |
|
T1 |
7 |
|
T4 |
16 |
|
T40 |
3 |
| others[2] |
1246 |
1 |
|
T1 |
10 |
|
T4 |
18 |
|
T40 |
2 |
| others[3] |
2005 |
1 |
|
T1 |
8 |
|
T4 |
39 |
|
T42 |
1 |
| false |
602 |
1 |
|
T4 |
11 |
|
T40 |
3 |
|
T22 |
1 |
| true |
452 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1236 |
1 |
|
T1 |
7 |
|
T4 |
20 |
|
T42 |
1 |
| others[1] |
1231 |
1 |
|
T1 |
11 |
|
T4 |
21 |
|
T40 |
2 |
| others[2] |
1255 |
1 |
|
T1 |
8 |
|
T4 |
28 |
|
T5 |
1 |
| others[3] |
1945 |
1 |
|
T1 |
11 |
|
T4 |
25 |
|
T40 |
3 |
| false |
609 |
1 |
|
T1 |
3 |
|
T4 |
7 |
|
T8 |
1 |
| true |
425 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
112 |
1 |
|
T4 |
2 |
|
T27 |
1 |
|
T33 |
3 |
| others[1] |
104 |
1 |
|
T4 |
3 |
|
T33 |
5 |
|
T84 |
1 |
| others[2] |
100 |
1 |
|
T4 |
2 |
|
T33 |
7 |
|
T84 |
2 |
| others[3] |
151 |
1 |
|
T4 |
5 |
|
T33 |
8 |
|
T373 |
1 |
| false |
54 |
1 |
|
T4 |
2 |
|
T33 |
2 |
|
T84 |
4 |
| true |
6180 |
1 |
|
T1 |
40 |
|
T4 |
87 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
227 |
1 |
|
T4 |
11 |
|
T22 |
1 |
|
T33 |
11 |
| others[1] |
225 |
1 |
|
T4 |
14 |
|
T33 |
7 |
|
T24 |
1 |
| others[2] |
228 |
1 |
|
T4 |
10 |
|
T33 |
11 |
|
T47 |
1 |
| others[3] |
382 |
1 |
|
T4 |
23 |
|
T33 |
15 |
|
T374 |
1 |
| false |
110 |
1 |
|
T4 |
2 |
|
T22 |
1 |
|
T33 |
8 |
| true |
5529 |
1 |
|
T1 |
40 |
|
T4 |
41 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1016 |
1 |
|
T1 |
9 |
|
T4 |
14 |
|
T27 |
1 |
| others[1] |
1021 |
1 |
|
T1 |
6 |
|
T4 |
21 |
|
T5 |
1 |
| others[2] |
970 |
1 |
|
T1 |
12 |
|
T4 |
18 |
|
T20 |
1 |
| others[3] |
1741 |
1 |
|
T1 |
12 |
|
T4 |
33 |
|
T40 |
4 |
| false |
555 |
1 |
|
T1 |
1 |
|
T4 |
15 |
|
T40 |
4 |
| true |
1398 |
1 |
|
T7 |
1 |
|
T13 |
1 |
|
T28 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
231 |
1 |
|
T4 |
11 |
|
T28 |
1 |
|
T22 |
1 |
| others[1] |
226 |
1 |
|
T4 |
8 |
|
T22 |
1 |
|
T33 |
9 |
| others[2] |
222 |
1 |
|
T4 |
5 |
|
T22 |
1 |
|
T33 |
13 |
| others[3] |
363 |
1 |
|
T4 |
16 |
|
T20 |
1 |
|
T27 |
1 |
| false |
122 |
1 |
|
T4 |
9 |
|
T33 |
8 |
|
T84 |
3 |
| true |
5537 |
1 |
|
T1 |
40 |
|
T4 |
52 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
222 |
1 |
|
T4 |
4 |
|
T27 |
1 |
|
T33 |
11 |
| others[1] |
179 |
1 |
|
T4 |
9 |
|
T33 |
11 |
|
T376 |
1 |
| others[2] |
204 |
1 |
|
T4 |
8 |
|
T22 |
2 |
|
T33 |
8 |
| others[3] |
370 |
1 |
|
T4 |
17 |
|
T33 |
18 |
|
T95 |
1 |
| false |
97 |
1 |
|
T4 |
7 |
|
T33 |
1 |
|
T84 |
2 |
| true |
5629 |
1 |
|
T1 |
40 |
|
T4 |
56 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1159 |
1 |
|
T1 |
12 |
|
T4 |
13 |
|
T42 |
1 |
| others[1] |
1244 |
1 |
|
T1 |
8 |
|
T4 |
22 |
|
T33 |
23 |
| others[2] |
1205 |
1 |
|
T1 |
8 |
|
T4 |
22 |
|
T40 |
6 |
| others[3] |
2009 |
1 |
|
T1 |
9 |
|
T4 |
32 |
|
T5 |
1 |
| false |
641 |
1 |
|
T1 |
3 |
|
T4 |
12 |
|
T40 |
1 |
| true |
443 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T13 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1170 |
1 |
|
T1 |
5 |
|
T4 |
29 |
|
T5 |
1 |
| others[1] |
1236 |
1 |
|
T1 |
7 |
|
T4 |
15 |
|
T40 |
1 |
| others[2] |
1220 |
1 |
|
T1 |
9 |
|
T4 |
16 |
|
T8 |
1 |
| others[3] |
2024 |
1 |
|
T1 |
15 |
|
T4 |
29 |
|
T42 |
1 |
| false |
631 |
1 |
|
T1 |
4 |
|
T4 |
12 |
|
T33 |
13 |
| true |
420 |
1 |
|
T7 |
1 |
|
T20 |
1 |
|
T13 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |