Group : flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg
Summary for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
12 |
1 |
11 |
91.67 |
Variables for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::hw_error_cg
Summary for Variable cp_arb_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_arb_err
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| seen |
5 |
1 |
|
T17 |
1 |
|
T185 |
1 |
|
T186 |
1 |
Summary for Variable cp_host_gnt_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
1 |
0 |
0.00 |
User Defined Bins for cp_host_gnt_err
Uncovered bins
| NAME | COUNT | AT LEAST | NUMBER |
| seen |
0 |
1 |
1 |
Summary for Variable cp_mp_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_mp_err
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| seen |
16 |
1 |
|
T1 |
1 |
|
T24 |
1 |
|
T97 |
1 |
Summary for Variable cp_op_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_op_err
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| seen |
9 |
1 |
|
T280 |
1 |
|
T291 |
1 |
|
T292 |
1 |
Summary for Variable cp_phy_relbl_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_phy_relbl_err
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| seen |
21 |
1 |
|
T77 |
5 |
|
T339 |
1 |
|
T172 |
5 |
Summary for Variable cp_phy_storage_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_phy_storage_err
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| seen |
5 |
1 |
|
T122 |
1 |
|
T123 |
1 |
|
T187 |
1 |
Summary for Variable cp_prog_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_prog_err
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| seen |
11 |
1 |
|
T97 |
1 |
|
T103 |
1 |
|
T104 |
1 |
Summary for Variable cp_prog_type_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_prog_type_err
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| seen |
5 |
1 |
|
T98 |
1 |
|
T99 |
1 |
|
T296 |
1 |
Summary for Variable cp_prog_win_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_prog_win_err
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| seen |
4 |
1 |
|
T115 |
1 |
|
T167 |
1 |
|
T295 |
1 |
Summary for Variable cp_rd_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_rd_err
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| seen |
6 |
1 |
|
T339 |
1 |
|
T340 |
1 |
|
T341 |
1 |
Summary for Variable cp_seed_err
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_seed_err
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| seen |
14 |
1 |
|
T339 |
1 |
|
T172 |
5 |
|
T340 |
1 |
Summary for Variable cp_spurious_ack
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
1 |
0 |
1 |
100.00 |
User Defined Bins for cp_spurious_ack
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| seen |
5 |
1 |
|
T129 |
1 |
|
T132 |
1 |
|
T130 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |