d498f91d6d498f91d6| Milestone | Name | Tests | Passing | Total | Pass Rate |
|---|---|---|---|---|---|
| V1 | smoke | gpio_smoke | 50 | 50 | 100.00 |
| gpio_smoke_no_pullup_pulldown | 50 | 50 | 100.00 | ||
| V1 | csr_hw_reset | gpio_csr_hw_reset | 5 | 5 | 100.00 |
| V1 | csr_rw | gpio_csr_rw | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | gpio_csr_bit_bash | 5 | 5 | 100.00 |
| V1 | csr_aliasing | gpio_csr_aliasing | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | gpio_csr_mem_rw_with_rand_reset | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | gpio_csr_rw | 20 | 20 | 100.00 |
| gpio_csr_aliasing | 5 | 5 | 100.00 | ||
| V1 | TOTAL | 155 | 155 | 100.00 | |
| V2 | direct_and_masked_out | gpio_random_dout_din | 48 | 50 | 96.00 |
| gpio_random_dout_din_no_pullup_pulldown | 48 | 50 | 96.00 | ||
| V2 | out_in_regs_read_write | gpio_dout_din_regs_random_rw | 47 | 50 | 94.00 |
| V2 | gpio_interrupt_programming | gpio_intr_rand_pgm | 49 | 50 | 98.00 |
| V2 | random_interrupt_trigger | gpio_rand_intr_trigger | 50 | 50 | 100.00 |
| V2 | interrupt_and_noise_filter | gpio_intr_with_filter_rand_intr_event | 50 | 50 | 100.00 |
| V2 | noise_filter_stress | gpio_filter_stress | 50 | 50 | 100.00 |
| V2 | regs_long_reads_and_writes | gpio_random_long_reg_writes_reg_reads | 49 | 50 | 98.00 |
| V2 | full_random | gpio_full_random | 50 | 50 | 100.00 |
| V2 | stress_all | gpio_stress_all | 50 | 50 | 100.00 |
| V2 | alert_test | gpio_alert_test | 50 | 50 | 100.00 |
| V2 | intr_test | gpio_intr_test | 49 | 50 | 98.00 |
| V2 | tl_d_oob_addr_access | gpio_tl_errors | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | gpio_tl_errors | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | gpio_csr_rw | 20 | 20 | 100.00 |
| gpio_same_csr_outstanding | 20 | 20 | 100.00 | ||
| gpio_csr_aliasing | 5 | 5 | 100.00 | ||
| gpio_csr_hw_reset | 5 | 5 | 100.00 | ||
| V2 | tl_d_partial_access | gpio_csr_rw | 20 | 20 | 100.00 |
| gpio_same_csr_outstanding | 20 | 20 | 100.00 | ||
| gpio_csr_aliasing | 5 | 5 | 100.00 | ||
| gpio_csr_hw_reset | 5 | 5 | 100.00 | ||
| V2 | TOTAL | 630 | 640 | 98.44 | |
| V2S | tl_intg_err | gpio_tl_intg_err | 20 | 20 | 100.00 |
| V2S | sec_cm_bus_integrity | sec_cm_bus_integrity | 0 | 0 | -- |
| V2S | TOTAL | 20 | 20 | 100.00 | |
| V3 | stress_all_with_rand_reset | gpio_stress_all_with_rand_reset | 48 | 50 | 96.00 |
| V3 | TOTAL | 48 | 50 | 96.00 | |
| TOTAL | 853 | 865 | 98.61 |
| Items | Total | Written | Passing | Progress |
|---|---|---|---|---|
| V1 | 7 | 7 | 7 | 100.00 |
| V2 | 14 | 14 | 8 | 57.14 |
| V2S | 2 | 1 | 1 | 50.00 |
| V3 | 1 | 1 | 0 | 0.00 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 97.68 | 99.61 | 87.47 | 100.00 | -- | 100.00 | 99.04 | 99.99 |
Exit reason: Error: User command failed Job returned non-zero exit code has 12 failures:
Test gpio_intr_test has 1 failures.
4.gpio_intr_test.1713191822
Log /container/opentitan-public/scratch/os_regression/gpio-sim-vcs/4.gpio_intr_test/out/run.log
[make]: simulate
cd /workspace/4.gpio_intr_test/out && /workspace/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW +prim_cdc_rand_delay_mode=disable -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1713191822 -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.gpio_intr_test.1713191822
Chronologic VCS simulator copyright 1991-2021
Contains Synopsys proprietary information.
Compiler version S-2021.09-SP2-1_Full64; Runtime version S-2021.09-SP2-1_Full64; May 18 01:20 2022
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:99: simulate] Error 255
Test gpio_random_dout_din has 2 failures.
20.gpio_random_dout_din.4135287279
Log /container/opentitan-public/scratch/os_regression/gpio-sim-vcs/20.gpio_random_dout_din/out/run.log
[make]: simulate
cd /workspace/20.gpio_random_dout_din/out && /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW +prim_cdc_rand_delay_mode=disable -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4135287279 -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.gpio_random_dout_din.4135287279
Chronologic VCS simulator copyright 1991-2021
Contains Synopsys proprietary information.
Compiler version S-2021.09-SP2-1_Full64; Runtime version S-2021.09-SP2-1_Full64; May 18 01:23 2022
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:99: simulate] Error 255
26.gpio_random_dout_din.3302370357
Log /container/opentitan-public/scratch/os_regression/gpio-sim-vcs/26.gpio_random_dout_din/out/run.log
[make]: simulate
cd /workspace/26.gpio_random_dout_din/out && /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW +prim_cdc_rand_delay_mode=disable -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3302370357 -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_dout_din_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 26.gpio_random_dout_din.3302370357
Chronologic VCS simulator copyright 1991-2021
Contains Synopsys proprietary information.
Compiler version S-2021.09-SP2-1_Full64; Runtime version S-2021.09-SP2-1_Full64; May 18 01:23 2022
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:99: simulate] Error 255
Test gpio_dout_din_regs_random_rw has 3 failures.
20.gpio_dout_din_regs_random_rw.443731760
Log /container/opentitan-public/scratch/os_regression/gpio-sim-vcs/20.gpio_dout_din_regs_random_rw/out/run.log
[make]: simulate
cd /workspace/20.gpio_dout_din_regs_random_rw/out && /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW +prim_cdc_rand_delay_mode=disable -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=443731760 -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.gpio_dout_din_regs_random_rw.443731760
Chronologic VCS simulator copyright 1991-2021
Contains Synopsys proprietary information.
Compiler version S-2021.09-SP2-1_Full64; Runtime version S-2021.09-SP2-1_Full64; May 18 01:23 2022
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:99: simulate] Error 255
24.gpio_dout_din_regs_random_rw.2828751662
Log /container/opentitan-public/scratch/os_regression/gpio-sim-vcs/24.gpio_dout_din_regs_random_rw/out/run.log
[make]: simulate
cd /workspace/24.gpio_dout_din_regs_random_rw/out && /workspace/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW +prim_cdc_rand_delay_mode=disable -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2828751662 -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_dout_din_regs_random_rw_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 24.gpio_dout_din_regs_random_rw.2828751662
Chronologic VCS simulator copyright 1991-2021
Contains Synopsys proprietary information.
Compiler version S-2021.09-SP2-1_Full64; Runtime version S-2021.09-SP2-1_Full64; May 18 01:24 2022
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:99: simulate] Error 255
... and 1 more failures.
Test gpio_intr_rand_pgm has 1 failures.
20.gpio_intr_rand_pgm.2857809179
Log /container/opentitan-public/scratch/os_regression/gpio-sim-vcs/20.gpio_intr_rand_pgm/out/run.log
[make]: simulate
cd /workspace/20.gpio_intr_rand_pgm/out && /workspace/default/simv +do_clear_all_interrupts=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW +prim_cdc_rand_delay_mode=disable -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2857809179 -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_intr_rand_pgm_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.gpio_intr_rand_pgm.2857809179
Chronologic VCS simulator copyright 1991-2021
Contains Synopsys proprietary information.
Compiler version S-2021.09-SP2-1_Full64; Runtime version S-2021.09-SP2-1_Full64; May 18 01:23 2022
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:99: simulate] Error 255
Test gpio_random_long_reg_writes_reg_reads has 1 failures.
20.gpio_random_long_reg_writes_reg_reads.673768586
Log /container/opentitan-public/scratch/os_regression/gpio-sim-vcs/20.gpio_random_long_reg_writes_reg_reads/out/run.log
[make]: simulate
cd /workspace/20.gpio_random_long_reg_writes_reg_reads/out && /workspace/default/simv +do_clear_all_interrupts=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW +prim_cdc_rand_delay_mode=disable -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=673768586 -assert nopostproc +UVM_TESTNAME=gpio_base_test +UVM_TEST_SEQ=gpio_random_long_reg_writes_reg_reads_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/default.vdb -cm_log /dev/null -cm_name 20.gpio_random_long_reg_writes_reg_reads.673768586
Chronologic VCS simulator copyright 1991-2021
Contains Synopsys proprietary information.
Compiler version S-2021.09-SP2-1_Full64; Runtime version S-2021.09-SP2-1_Full64; May 18 01:24 2022
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:99: simulate] Error 255
... and 2 more tests.